DS30430C-J2-page 2 : 1998 Microchip Technology Inc.
|
|
|
- みずき なかじゅく
- 5 years ago
- Views:
Transcription
1 ( ) RAM ( ) EERPOM ( ) (MHz) 14 8 RA2 RA3 RA4/T0CKI MCLR VSS RB0/INT RB1 RB2 RB PDIP, SOIC PIC16F8X PIC16CR8X RA1 RA0 OSC1/CLKIN OSC2/CLKOUT VDD RB7 RB6 RB5 RB Microchip Technology Inc. DS30430C-J2-page 1 :
2 DS30430C-J2-page 2 : 1998 Microchip Technology Inc.
3 1998 Microchip Technology Inc. DS30430C-J2-page 3 :
4 PIC16F83 PIC16CR83 PIC16F84 PIC16CR84 DS30430C-J2-page 4 : 1998 Microchip Technology Inc.
5 PIC16F8X 4 F PIC16F84 LF PIC16LF84 CR PIC16CR83 ROM LCR PIC16LCR84 ROM F CR LF LCR Microchip Technology Inc. DS30430C-J2-page 5 :
6 NOTES: DS30430C-J2-page 6 : 1998 Microchip Technology Inc.
7 1998 Microchip Technology Inc. DS30430C-J2-page 7 :
8 Flash/ROM Program Memory PIC16F83/CR x 14 PIC16F84/CR84 1K x 14 Program Bus 14 Instruction reg 13 Program Counter 8 Level Stack (13-bit) Data Bus RAM File Registers PIC16F83/CR83 36 x 8 PIC16F84/CR84 68 x 8 7 Addr Mux 8 RAM Addr EEPROM Data Memory EEDATA EEPROM Data Memory 64 x 8 EEADR 5 Direct Addr 7 Indirect Addr TMR0 FSR reg 8 STATUS reg RA4/T0CKI Instruction Decode & Control Power-up Timer Oscillator Start-up Timer Power-on Reset ALU MUX 8 I/O Ports RA3:RA0 Timing Generation Watchdog Timer W reg RB7:RB1 RB0/INT OSC2/CLKOUT OSC1/CLKIN MCLR VDD, VSS DS30430C-J2-page 8 : 1998 Microchip Technology Inc.
9 OSC1/CLKIN I ST/CMOS (3) OSC2/CLKOUT O MCLR 4 4 I/P ST RA I/O TTL RA I/O TTL RA2 1 1 I/O TTL RA3 2 2 I/O TTL RA4/T0CKI 3 3 I/O ST RB0/INT 6 6 I/O TTL/ST (1) RB1 7 7 I/O TTL RB2 8 8 I/O TTL RB3 9 9 I/O TTL RB I/O TTL RB I/O TTL RB I/O TTL/ST (2) RB I/O TTL/ST (2) VSS 5 5 P VDD P 1998 Microchip Technology Inc. DS30430C-J2-page 9 :
10 OSC1 Q1 Q2 Q3 Q4 PC OSC2/CLKOUT (RC mode) Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 PC PC+1 PC+2 Fetch INST (PC) Execute INST (PC-1) Fetch INST (PC+1) Execute INST (PC) Fetch INST (PC+2) Execute INST (PC+1) Internal phase clock 1. MOVLW 55h 2. MOVWF PORTB 3. CALL SUB_1 4. BSF PORTA, BIT3 DS30430C-J2-page 10 : 1998 Microchip Technology Inc.
11 PIC16F8X 2 RAM (SFR) " " SFR EEPROM EEPROM 64 EEPROM 0h 3Fh 7.0 PIC16FXX 8K x PIC16F83 PIC16CR x 14 (0000h-01FFh) ( 4-1) PIC16F84 PIC16CR84 1K x 14 (0000h-03FFh) ( 4-2) PIC16F84 20h 420h 820h C20h 1020h 1420h 1820h 1C20h 0000h 0004h PC<12:0> CALL, RETURN 13 RETFIE, RETLW Stack Level 1 User Memory Space Stack Level 8 Reset Vector Peripheral Interrupt Vector 0000h 0004h 1FFh 1FFFh PC<12:0> CALL, RETURN 13 RETFIE, RETLW Stack Level 1 Stack Level 8 Reset Vector Peripheral Interrupt Vector 0000h 0004h User Memory Space 3FFh 1FFFh 1998 Microchip Technology Inc. DS30430C-J2-page 11 :
12 2 1 (SFR) 1 (GPR) SFR SFR GPR GPR 116 RAM SFR STATUS MOVWF MOVF W ("F) (FSR) (4.5 ) RP1:RP0 0 RP0 (STATUS<5>) RP0 Bank 1 7Fh (128 ) 12 RAM (GPR) GPR 8 FSR (4.5 ) 1 GPR 0 0Ch 8Ch GPR ( ) CPU RAM 2 DS30430C-J2-page 12 : 1998 Microchip Technology Inc.
13 File Address File Address 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch Indirect addr. (1) TMR0 PCL STATUS FSR PORTA PORTB EEDATA EEADR PCLATH INTCON Indirect addr. (1) OPTION PCL STATUS FSR TRISA TRISB EECON1 EECON2 (1) PCLATH INTCON 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h 8Ah 8Bh 8Ch 36 General Mapped Purpose (accesses) registers in Bank 0 (SRAM) 2Fh 30h AFh B0h File Address File Address 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch Indirect addr. (1) TMR0 PCL STATUS FSR PORTA PORTB EEDATA EEADR PCLATH INTCON Indirect addr. (1) OPTION PCL STATUS FSR TRISA TRISB EECON1 EECON2 (1) PCLATH INTCON 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h 8Ah 8Bh 8Ch 68 General Purpose registers (SRAM) Mapped (accesses) in Bank 0 4Fh 50h CFh D0h 7Fh FFh Bank 0 Bank 1 Unimplemented data memory location; read as '0'. 1: 7Fh FFh Bank 0 Bank 1 Unimplemented data memory location; read as '0'. 1: 1998 Microchip Technology Inc. DS30430C-J2-page 13 :
14 Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on Power-on Reset Value on all other resets (Note3) Bank 0 00h INDF FSR ( ) h TMR0 8 xxxx xxxx uuuu uuuu 02h PCL h STATUS (2) IRP RP1 RP0 TO PD Z DC C xxx 000q quuu 04h FSR xxxx xxxx uuuu uuuu 05h PORTA RA4/T0CKI RA3 RA2 RA1 RA0 ---x xxxx ---u uuuu 06h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0/INT xxxx xxxx uuuu uuuu 07h h EEDATA EEDATAEEPROM xxxx xxxx uuuu uuuu 09h EEADR EEADREEPROM xxxx xxxx uuuu uuuu 0Ah PCLATH PC 5 (1 ) Bh INTCON GIE EEIE T0IE INTE RBIE T0IF INTF RBIF x u Bank 1 80h INDF FSR ( ) h OPTION_ RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 REG 82h PCL (PC) h STATUS (2) IRP RP1 RP0 TO PD Z DC C xxx 000q quuu 84h FSR xxxx xxxx uuuu uuuu 85h TRISA PORTA h TRISB PORTB h h EECON1 EEIF WRERR WREN WR RD ---0 x q000 89h EECON2 EEPROM 2 ( ) Ah PCLATH PC 5 (1 ) Bh INTCON GIE EEIE T0IE INTE RBIE T0IF INTF RBIF x u : x = u = - = 0 q = 1: PCLATH PC<12:8> PCLATH PC<12:8> PCLATH 2: STATUS TO PD MCLR 3: ( ) MCLR DS30430C-J2-page 14 : 1998 Microchip Technology Inc.
15 STATUS ALU STATUS STATUS Z DC C 3 TO PD STATUS CLRF STATUS 3 Z STATUS 000u uluu (u = ) BCF BSF SWAPF MOVWF STATUS ( 9-2) R/W-0 R/W-0 R/W-0 R-1 R-1 R/W-x R/W-x R/W-x IRP RP1 RP0 TO PD Z DC C bit0 bit 7: IRP: ( ) IRP PICI 6F8X IRP bit 6-5: RPI :RPO: ( ) 00 = 0 (00h - 7Fh) 01 * 1 (80h - FFh) 10 = 2 (100h - 17Fh) 11 = 3 (180h - 1FFh) 128 RP0 PICI 6F8X RPI bit 4: TO: 1 = CLRWT SLEEP 0 = WDT bit 3: PD: 1 = CLRWDT 0 = SLEEP bit 2: Z: 1 = 0 = bit 1: DC: (ADDWF ADDLW ) ( ) 1 = 4 0 = 4 bit 0: C: (ADDWF ADDLW ) 1 = 0 = : 2 2 : (RRF RLF) 1998 Microchip Technology Inc. DS30430C-J2-page 15 :
16 OPTION_REG PORTB TMR0/WDT INT TMR0 : WDT (PSA = '1') TMR0 1:1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 bit7 bit TMR0 WDT 1 : 2 1 : 4 1 : 8 1 : 16 1 : 32 1 : 64 1 : : : 1 1 : 2 1 : 4 1 : 8 1 : 16 1 : 32 1 : 64 1 : 128 DS30430C-J2-page 16 : 1998 Microchip Technology Inc.
17 INTCON : GIE (INTCON<7>) R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-x GIE EEIE T0IE INTE RBIE T0IF INTF RBIF bit0 bit 7: bit 6: bit 5: bit 4: bit 3: bit 2: bit 1: bit 0: GIE: 1 = 0 = : 8.5 EEIE: EE 1 = EE 0 = EE T0IE: TMR0 1 = TMR0 0 = TMR0 INTE: RB0/INT 1 = RB0/INT 0 = RB0/INT RBIE: RB 1 = RB 0 = RB T0IF: TMR0 1 = TMR0 ( ) 0 = TMR0 INTF: RB0/INT 1 = RB0/INT ( ) 0 = RB0/INT RBIF: RB 1 = 1 RB7:RB4 ( ) 0 = RB7:RB Microchip Technology Inc. DS30430C-J2-page 17 :
18 PCH PCL PC PC 5 PCLATH<4:0> PCLATH PCH PCL PCLATH<4:3> PCLATH PCL ALU GOTO, CALL <10:0> 11 8 : PIC16F8X (0800h - 1FFFh) PCLATN<4:3> PCLATH<4:3> R/W : CALL RETURN RETLW RETFIE : DS30430C-J2-page 18 : 1998 Microchip Technology Inc.
19 movlw 0x20 ;initialize pointer movwf FSR ; to RAM NEXT clrf INDF ;clear INDF register incf FSR ;inc pointer btfss FSR,4 ;all done? goto NEXT ;NO, clear next CONTINUE : ;YES, continue Direct Addressing Indirect Addressing RP1 RP0 6 from opcode 0 IRP 7 (FSR) 0 bank select location select bank select location select 00h not used not used 00h 0Bh 0Ch Data Memory (3) 2Fh (1) 30h (1) 4Fh (2) 50h (2) 7Fh Bank 0 Bank 1 Bank 2 Bank 3 7Fh 1998 Microchip Technology Inc. DS30430C-J2-page 19 :
20 NOTES: DS30430C-J2-page 20 : 1998 Microchip Technology Inc.
21 Data bus D Q WR Port D CK Q Data Latch Q VDD P N I/O pin Data bus WR PORT WR TRIS RD PORT D CK Data Latch D CK TRIS Latch TMR0 clock input Q Q Q Q RD TRIS N VSS Schmitt Trigger input buffer RA4 pin Q D EN WR TRIS CK Q VSS TRIS Latch TTL input buffer RD TRIS Q D EN RD PORT 1998 Microchip Technology Inc. DS30430C-J2-page 21 :
22 DS30430C-J2-page Microchip Technology Inc. :
23 RBPU (1) Data bus WR Port WR TRIS Set RBIF From other RB7:RB4 pins Data Latch D CK Q TRIS Latch D Q CK RD TRIS RD Port Latch Q D Q EN D EN VDD P RD Port weak pull-up I/O pin (2) TTL Input Buffer RBPU (1) Data bus WR Port WR TRIS RB0/INT Data Latch D Q CK TRIS Latch D Q CK RD TRIS RD Port Schmitt Trigger Buffer Q TTL Input Buffer D EN VDD P weak pull-up I/O pin (2) RD Port 1998 Microchip Technology Inc. DS30430C-J2-page 23 :
24 RB0/INT bit0 TTL/ST (1) RB1 bit1 TTL RB2 bit2 TTL RB3 bit3 TTL RB4 bit4 TTL RB5 bit5 TTL RB6 bit6 TTL/ST (2) RB7 bit7 TTL/ST (2) 06h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0/INT xxxx xxxx uuuu uuuu 86h TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB h OPTION_ RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 REG DS30430C-J2-page Microchip Technology Inc. :
25 ;Initial PORT settings: PORTB<7:4> Inputs ; PORTB<3:0> Outputs ;PORTB<7:6> have external pull-ups and are ;not connected to other circuitry ; ; PORT latch PORT pins ; BCF PORTB, 7 ; 01pp ppp 11pp ppp BCF PORTB, 6 ; 10pp ppp 11pp ppp BSF STATUS, RP0 ; BCF TRISB, 7 ; 10pp ppp 11pp ppp BCF TRISB, 6 ; 10pp ppp 10pp ppp ; ;Note that the user may have expected the ;pin values to be 00pp ppp. The 2nd BCF ;caused RB7 to be latched as the pin value ;(high). PC Instruction fetched RB7:RB0 Instruction executed Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 PC PC + 1 PC + 2 PC + 3 MOVWF PORTB write to PORTB MOVF PORTB,W MOVWF PORTB write to PORTB TPD NOP Port pin sampled here MOVF PORTB,W NOP NOP 1998 Microchip Technology Inc. DS30430C-J2-page 25 :
26 NOTES: DS30430C-J2-page Microchip Technology Inc. :
27 RA4/T0CKI pin T0SE FOSC/4 0 1 T0CS Programmable Prescaler 3 PS2, PS1, PS0 1 0 PSA Data bus PSout 8 Sync with Internal TMR0 register clocks PSout (2 cycle delay) Set bit T0IF on Overflow Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 PC Instruction Fetch PC-1 PC PC+1 PC+2 PC+3 PC+4 PC+5 PC+6 MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W TMR0 T0 T0+1 T0+2 NT0 NT0 NT0 NT0+1 NT0+2 T0 Instruction Executed Write TMR0 executed Read TMR0 reads NT0 Read TMR0 reads NT0 Read TMR0 reads NT0 Read TMR0 reads NT0 + 1 Read TMR0 reads NT Microchip Technology Inc. DS30430C-J2-page 27 :
28 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 PC Instruction Fetch PC-1 PC PC+1 PC+2 PC+3 PC+4 PC+5 PC+6 MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W TMR0 T0 T0+1 NT0 NT0+1 Instruction Execute Write TMR0 executed Read TMR0 reads NT0 Read TMR0 reads NT0 Read TMR0 reads NT0 Read TMR0 reads NT0 Read TMR0 reads NT0 + 1 OSC1 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 CLKOUT (3) TMR0 timer T0IF bit 4 (INTCON<2>) FEh 1 1 FFh 00h 01h 02h GIE bit (INTCON<7>) INSTRUCTION FLOW PC Interrupt Latency (2) PC PC +1 PC h 0005h Instruction fetched Inst (PC) Inst (PC+1) Inst (0004h) Inst (0005h) Instruction executed Inst (PC-1) Inst (PC) Dummy cycle Dummy cycle Inst (0004h) DS30430C-J2-page Microchip Technology Inc. :
29 1998 Microchip Technology Inc. DS30430C-J2-page 29 :
30 Ext. Clock Input or Prescaler Out (Note 2) Ext. Clock/Prescaler Output After Sampling Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 (Note 3) Increment TMR0 (Q4) TMR0 T0 T0 + 1 T0 + 2 CLKOUT (= Fosc/4) Data Bus RA4/T0CKI pin 0 M U 1 X 1 0 M U X SYNC 2 Cycles 8 TMR0 register T0SE T0CS PSA Set bit T0IF on overflow Watchdog Timer 0 1 M U X 8-bit Prescaler 8 PSA 8 - to - 1MUX PS2:PS0 WDT Enable bit 0 1 M U X PSA WDT time-out DS30430C-J2-page Microchip Technology Inc. :
31 BCF STATUS, RP0 ;Bank 0 CLRF TMR0 ;Clear TMR0 ; and Prescaler BSF STATUS, RP0 ;Bank 1 CLRWDT ;Clears WDT MOVLW b'xxxx1xxx' ;Select new MOVWF OPTION_REG ; prescale value BCF STATUS, RP0 ;Bank 0 CLRWDT ;Clear WDT and ; prescaler BSF STATUS, RP0 ;Bank 1 MOVLW b'xxxx0xxx' ;Select TMR0, new ; prescale value and clock source MOVWF OPTION_REG ; BCF STATUS, RP0 ;Bank 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 01h TMR0 xxxx xxxx uuuu uuuu 0Bh INTCON GIE EEIE T0IE INTE RBIE T0IF INTF RBIF x h OPTION_ REG RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS h TRISA TRISA4 TRISA3 TRISA2 TRISA1 TRISA Microchip Technology Inc. DS30430C-J2-page 31 :
32 NOTES: DS30430C-J2-page Microchip Technology Inc. :
33 U U U R/W-0 R/W-x R/W-0 R/S-0 R/S-x EEIF WRERR WREN WR RD bit7 bit Microchip Technology Inc. DS30430C-J2-page 33 :
34 BCF STATUS, RP0 ; Bank 0 MOVLW CONFIG_ADDR ; MOVWF EEADR ; Address to read BSF STATUS, RP0 ; Bank 1 BSF EECON1, RD ; EE Read BCF STATUS, RP0 ; Bank 0 MOVF EEDATA, W ; W = EEDATA BSF STATUS, RP0 ; Bank 1 BCF INTCON, GIE ; Disable INTs. BSF EECON1, WREN ; Enable Write MOVLW 55h ; MOVWF EECON2 ; Write 55h MOVLW AAh ; MOVWF EECON2 ; Write AAh BSF EECON1,WR ; Set WR bit ; begin write BSF INTCON, GIE ; Enable INTs. DS30430C-J2-page Microchip Technology Inc. :
35 BCF STATUS, RP0 ; Bank 0 : ; Any code can go here : ; MOVF EEDATA, W ; Must be in Bank 0 BSF STATUS, RP0 ; Bank 1 READ BSF EECON1, RD ; YES, Read the ; value written BCF STATUS, RP0 ; Bank 0 ; ; Is the value written (in W reg) and ; read (in EEDATA) the same? ; SUBWF EEDATA, W ; BTFSS STATUS, Z ; Is difference 0? GOTO WRITE_ERR ; NO, Write error : ; YES, Good write : ; Continue program Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 08h EEDATA xxxx xxxx uuuu uuuu 09h EEADR xxxx xxxx uuuu uuuu 88h EECON1 EEIF WRERR WREN WR RD ---0 x q000 89h EECON Microchip Technology Inc. DS30430C-J2-page 35 :
36 NOTES: DS30430C-J2-page Microchip Technology Inc. :
37 1998 Microchip Technology Inc. DS30430C-J2-page 37 :
38 R-u R-u R-u R-u R-u R-u R/P-u R-u R-u R-u R-u R-u R-u R-u CP CP CP CP CP CP DP CP CP CP PWRTE WDTE FOSC1 FOSC0 bit13 bit0 R/P-u R/P-u R/P-u R/P-u R/P-u R/P-u R/P-u R/P-u R/P-u R/P-u R/P-u R/P-u R/P-u R/P-u CP CP CP CP CP CP CP CP CP CP PWRTE WDTE FOSC1 FOSC0 bit13 bit0 DS30430C-J2-page 38 : 1998 Microchip Technology Inc.
39 C1 (1) C2 (1) Clock from ext. system OSC1 XTAL OSC2 RS (2) RF (3) SLEEP To internal logic PIC16FXX Open OSC1 OSC2 PIC16FXX Mode Freq OSC1/C1 OSC2/C2 XT 455 khz 2.0 MHz 4.0 MHz pf pf pf pf pf pf HS 8.0 MHz 10.0 MHz pf pf pf pf 455 khz Panasonic EFO-A455K04B ± 0.3% 2.0 MHz Murata Erie CSA2.00MG ± 0.5% 4.0 MHz Murata Erie CSA4.00MG ± 0.5% 8.0 MHz Murata Erie CSA8.00MT ± 0.5% 10.0 MHz Murata Erie CSA10.00MTZ ± 0.5% Mode Freq OSC1/C1 OSC2/C2 LP 32 khz pf pf 200 khz pf pf XT HS 100 khz 2 MHz 4 MHz 4 MHz 10 MHz pf pf pf pf pf pf pf pf pf pf khz Epson C-001R32.768K-A ± 20 PPM 100 khz Epson C KC-P ± 20 PPM 200 khz STD XTL KHz ± 20 PPM 1.0 MHz ECS ECS ± 50 PPM 2.0 MHz ECS ECS-20-S-2 ± 50 PPM 4.0 MHz ECS ECS-40-S-4 ± 50 PPM 10.0 MHz ECS ECS-100-S-4 ± 50 PPM 1998 Microchip Technology Inc. DS30430C-J2-page 39 :
40 10k +5V 10k 4.7k 20 pf 74AS04 XTAL 20 pf 10k 74AS04 To Other Devices PIC16FXX CLKIN Rext Cext VDD OSC1 Internal clock PIC16FXX 330 kω 74AS µf XTAL 330 kω 74AS04 74AS04 To Other Devices PIC16FXX CLKIN VSS OSC2/CLKOUT Fosc/4 DS30430C-J2-page 40 : 1998 Microchip Technology Inc.
41 External Reset MCLR WDT Module SLEEP WDT Time_Out Reset VDD OSC1/ CLKIN VDD rise detect OST/PWRT On-chip RC OSC (1) Power_on_Reset OST 10-bit Ripple counter PWRT 10-bit Ripple counter S R Q Chip_Reset Enable PWRT Enable OST 1998 Microchip Technology Inc. DS30430C-J2-page 41 :
42 000h xxx 000h 000u uuuu 000h uuu 000h uuu PC + 1 uuu0 0uuu PC + 1 (1) uuu1 0uuu W xxxx xxxx uuuu uuuu uuuu uuuu INDF 00h TMR0 01h xxxx xxxx uuuu uuuu uuuu uuuu PCL 02h 0000h 0000h PC + 1 (2) STATUS 03h xxx 000q quuu (3) uuuq quuu (3) FSR 04h xxxx xxxx uuuu uuuu uuuu uuuu PORTA 05h ---x xxxx ---u uuuu ---u uuuu PORTB 06h xxxx xxxx uuuu uuuu uuuu uuuu EEDATA 08h xxxx xxxx uuuu uuuu uuuu uuuu EEADR 09h xxxx xxxx uuuu uuuu uuuu uuuu PCLATH 0Ah u uuuu INTCON 0Bh x u uuuu uuuu (1) INDF 80h OPTION_REG 81h uuuu uuuu PCL 82h 0000h 0000h PC + 1 STATUS 83h xxx 000q quuu (3) uuuq quuu (3) FSR 84h xxxx xxxx uuuu uuuu uuuu uuuu TRISA 85h u uuuu TRISB 86h uuuu uuuu EECON1 88h ---0 x q uuuu EECON2 89h PCLATH 8Ah u uuuu INTCON 8Bh x u uuuu uuuu (1) DS30430C-J2-page 42 : 1998 Microchip Technology Inc.
43 VDD D VDD R C R1 MCLR PIC16FXX 1998 Microchip Technology Inc. DS30430C-J2-page 43 :
44 VDD MCLR INTERNAL POR TPWRT PWRT TIME-OUT TOST OST TIME-OUT INTERNAL RESET VDD MCLR INTERNAL POR TPWRT PWRT TIME-OUT TOST OST TIME-OUT INTERNAL RESET DS30430C-J2-page 44 : 1998 Microchip Technology Inc.
45 VDD MCLR INTERNAL POR TPWRT PWRT TIME-OUT TOST OST TIME-OUT INTERNAL RESET V1 VDD MCLR INTERNAL POR TPWRT PWRT TIME-OUT TOST OST TIME-OUT INTERNAL RESET 1998 Microchip Technology Inc. DS30430C-J2-page 45 :
46 Oscillator Configuration PWRT Enabled XT, HS, LP 72 ms TOSC Power-up PWRT Disabled 1024TOSC Wake-up from SLEEP 1024TOSC RC 72 ms TO PD x x k VDD VDD R1 R2 10k 40k Q1 40k VDD MCLR PIC16F8X VDD MCLR PIC16F8X VDD R1 R1 + R2 = 0.7V DS30430C-J2-page 46 : 1998 Microchip Technology Inc.
47 T0IF T0IE INTF INTE RBIF RBIE EEIF EEIE Wake-up (If in SLEEP mode) Interrupt to CPU GIE 1998 Microchip Technology Inc. DS30430C-J2-page 47 :
48 OSC1 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 CLKOUT INT pin INTF flag 5 (INTCON<1>) Interrupt Latency 2 GIE bit (INTCON<7>) INSTRUCTION FLOW PC PC PC+1 PC h 0005h Instruction fetched Inst (PC) Inst (PC+1) Inst (0004h) Inst (0005h) Instruction executed Inst (PC-1) Inst (PC) Dummy Cycle Dummy Cycle Inst (0004h) DS30430C-J2-page 48 : 1998 Microchip Technology Inc.
49 PUSH MOVWF W_TEMP ; Copy W to TEMP register, SWAPF STATUS, W ; Swap status to be saved into W MOVWF STATUS_TEMP ; Save status to STATUS_TEMP register ISR : : : ; Interrupt Service Routine : ; should configure Bank as required : ; POP SWAPF STATUS_TEMP, W ; Swap nibbles in STATUS_TEMP register ; and place result into W MOVWF STATUS ; Move W into STATUS register ; (sets bank to original state) SWAPF W_TEMP, F ; Swap nibbles in W_TEMP and place result in W_TEMP SWAPF W_TEMP, W ; Swap nibbles in W_TEMP and place result into W FSR PCLATCH 1998 Microchip Technology Inc. DS30430C-J2-page 49 :
50 From TMR0 Clock Source (Figure 6-6) WDT Timer 0 1 M U X Postscaler to -1 MUX PS2:PS0 WDT Enable Bit PSA To TMR0 (Figure 6-6) 0 1 MUX PSA WDT Time-out Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit h Config. bits (2) (2) (2) (2) PWRTE (1) WDTE FOSC1 FOSC0 (2) 81h OPTION_ RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 REG DS30430C-J2-page 50 : 1998 Microchip Technology Inc.
51 OSC1 CLKOUT(4) Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 TOST(2) INT pin INTF flag (INTCON<1>) GIE bit (INTCON<7>) Processor in SLEEP Interrupt Latency (Note 2) INSTRUCTION FLOW PC Instruction fetched Instruction executed PC PC+1 PC+2 Inst(PC) = SLEEP Inst(PC - 1) Inst(PC + 1) SLEEP PC+2 Inst(PC + 2) Inst(PC + 1) PC h 0005h Inst(0004h) Inst(0005h) Dummy cycle Dummy cycle Inst(0004h) 1998 Microchip Technology Inc. DS30430C-J2-page 51 :
52 External Connector Signals +5V 0V VPP CLK Data I/O To Normal Connections To Normal Connections PIC16FXX VDD VSS MCLR/VPP RB6 RB7 VDD DS30430C-J2-page 52 : 1998 Microchip Technology Inc.
53 f W b k x d label TOS PC PCLATH GIE WDT TO PD dest [ ] ( ) < > OPCODE d f (FILE #) d = 0 d = 1 f = OPCODE b (BIT #) f (FILE #) b = f = OPCODE k (literal) k = OPCODE k (literal) k = Microchip Technology Inc. DS30430C-J2-page 53 :
54 ADDWF ANDWF CLRF CLRW COMF DECF DECFSZ INCF INCFSZ IORWF MOVF MOVWF NOP RLF RRF SUBWF SWAPF XORWF BCF BSF BTFSC BTFSS ADDLW ANDLW CALL CLRWDT GOTO IORLW MOVLW RETFIE RETLW RETURN SLEEP SUBLW XORLW f, d f, d f - f, d f, d f, d f, d f, d f, d f, d f - f, d f, d f, d f, d f, d f, b f, b f, b f, b k k k - k k k - k - - k k Add W and f AND W with f Clear f Clear W Complement f Decrement f Decrement f, Skip if 0 Increment f Increment f, Skip if 0 Inclusive OR W with f Move f Move W to f No Operation Rotate Left f through Carry Rotate Right f through Carry Subtract W from f Swap nibbles in f Exclusive OR W with f Bit Clear f Bit Set f Bit Test f, Skip if Clear Bit Test f, Skip if Set Add literal and W AND literal with W Call subroutine Clear Watchdog Timer Go to address Inclusive OR literal with W Move literal to W Return from interrupt Return with literal in W Return from Subroutine Go into standby mode Subtract W from literal Exclusive OR literal with W (2) 1 1(2) (2) 1 (2) bb 01bb 10bb 11bb 111x kkk kkk xx xx x 1010 dfff dfff lfff 0xxx dfff dfff dfff dfff dfff dfff dfff lfff 0xx0 dfff dfff dfff dfff dfff bfff bfff bfff bfff kkkk kkkk kkkk 0110 kkkk kkkk kkkk 0000 kkkk kkkk kkkk ffff ffff ffff xxxx ffff ffff ffff ffff ffff ffff ffff ffff 0000 ffff ffff ffff ffff ffff ffff ffff ffff ffff kkkk kkkk kkkk 0100 kkkk kkkk kkkk 1001 kkkk kkkk kkkk C,DC,Z Z Z Z Z Z Z Z Z C C C,DC,Z Z C,DC,Z Z TO,PD Z TO,PD C,DC,Z Z 1,2 1,2 2 1,2 1,2 1,2,3 1,2 1,2,3 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1,2 3 3 DS30430C-J2-page 54 : 1998 Microchip Technology Inc.
55 ADDLW Add Literal and W Syntax: [label] ADDLW k Operands: 0 k 255 Operation: (W) + k (W) Status Affected: C, DC, Z Encoding: x kkkk kkkk Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read literal 'k' Process data Write to W ANDLW AND Literal with W Syntax: [label] ANDLW k Operands: 0 k 255 Operation: (W).AND. (k) (W) Status Affected: Z Encoding: kkkk kkkk Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read literal "k" Process data Write to W Example: ADDLW 0x15 W = 0x10 W = 0x25 Example ANDLW 0x5F W = 0xA3 W = 0x03 ADDWF Add W and f Syntax: [label] ADDWF f,d Operands: 0 f 127 d [0,1] Operation: (W) + (f) (destination) Status Affected: C, DC, Z Encoding: dfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination Example ADDWF FSR, 0 W = 0x17 FSR = 0xC2 W = 0xD9 FSR = 0xC2 ANDWF AND W with f Syntax: [label] ANDWF f,d Operands: 0 f 127 d [0,1] Operation: (W).AND. (f) (destination) Status Affected: Z Encoding: dfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination Example ANDWF FSR, 1 W = 0x17 FSR = 0xC2 W = 0x17 FSR = 0x Microchip Technology Inc. DS30430C-J2-page 55 :
56 BCF Bit Clear f Syntax: [label] BCF f,b Operands: 0 f b 7 Operation: 0 (f<b>) Status Affected: None Encoding: 01 00bb bfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write register 'f' Example BCF FLAG_REG, 7 FLAG_REG = 0xC7 FLAG_REG = 0x47 BTFSC Bit Test, Skip if Clear Syntax: [label] BTFSC f,b Operands: 0 f b 7 Operation: skip if (f<b>) = 0 Status Affected: None Encoding: 01 10bb bfff ffff Description: Words: 1 Cycles: 1(2) Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data No-Operat ion If Skip: (2nd Cycle) Q1 Q2 Q3 Q4 No-Operat ion No-Operati on No-Opera tion No-Operat ion BSF Bit Set f Syntax: [label] BSF f,b Operands: 0 f b 7 Operation: 1 (f<b>) Status Affected: None Encoding: 01 01bb bfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write register 'f' Example HERE FALSE TRUE BTFSC GOTO FLAG,1 PROCESS_CODE PC = address HERE if FLAG<1> = 0, PC = address TRUE if FLAG<1>=1, PC = address FALSE Example BSF FLAG_REG, 7 FLAG_REG = 0x0A FLAG_REG = 0x8A DS30430C-J2-page Microchip Technology Inc. :
57 BTFSS Bit Test f, Skip if Set Syntax: [label] BTFSS f,b Operands: 0 f b < 7 Operation: skip if (f<b>) = 1 Status Affected: None Encoding: 01 11bb bfff ffff Description: Words: 1 Cycles: 1(2) Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data No-Operat ion Example If Skip: (2nd Cycle) Q1 Q2 Q3 Q4 No-Operat ion HERE FALSE TRUE No-Operati on BTFSC GOTO No-Opera tion No-Operat ion FLAG,1 PROCESS_CODE PC = address HERE if FLAG<1> = 0, PC = address FALSE if FLAG<1> = 1, PC = address TRUE CALL Call Subroutine Syntax: [ label ] CALL k Operands: 0 k 2047 Operation: (PC)+ 1 TOS, k PC<10:0>, (PCLATH<4:3>) PC<12:11> Status Affected: None Encoding: 10 0kkk kkkk kkkk Description: Words: 1 Cycles: 2 Q Cycle Activity: Q1 Q2 Q3 Q4 1st Cycle Decode Read literal 'k', Push PC to Stack 2nd Cycle No-Opera tion No-Opera tion Process data No-Opera tion Example HERE CALL THERE Write to PC No-Operat ion PC = Address HERE PC = Address THERE TOS = Address HERE Microchip Technology Inc. DS30430C-J2-page 57 :
58 CLRF Clear f Syntax: [label] CLRF f Operands: 0 f 127 Operation: 00h (f) 1 Z Status Affected: Z Encoding: fff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write register 'f' CLRW Clear W Syntax: [ label ] CLRW Operands: None Operation: 00h (W) 1 Z Status Affected: Z Encoding: xxx xxxx Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode No-Opera tion Process data Write to W Example CLRF FLAG_REG FLAG_REG = 0x5A FLAG_REG = 0x00 Z = 1 Example CLRW W = 0x5A W = 0x00 Z = 1 CLRWDT Syntax: Operands: Operation: Status Affected: Clear Watchdog Timer [ label ] CLRWDT None 00h WDT 0 WDT prescaler, 1 TO 1 PD TO, PD Encoding: Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode No-Opera tion Process data Clear WDT Counter Example CLRWDT WDT counter =? WDT counter = 0x00 WDT prescaler= 0 TO = 1 PD = 1 DS30430C-J2-page Microchip Technology Inc. :
59 COMF Complement f Syntax: [ label ] COMF f,d Operands: 0 f 127 d [0,1] Operation: (f) (destination) Status Affected: Z Encoding: dfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination Example COMF REG1,0 REG1 = 0x13 REG1 = 0x13 W = 0xEC DECF Decrement f Syntax: [label] DECF f,d Operands: 0 f 127 d [0,1] Operation: (f) - 1 (destination) Status Affected: Z Encoding: dfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination DECFSZ Decrement f, Skip if 0 Syntax: [ label ] DECFSZ f,d Operands: 0 f 127 d [0,1] Operation: (f) - 1 (destination); skip if result = 0 Status Affected: None Encoding: dfff ffff Description: Words: 1 Cycles: 1(2) Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination If Skip: (2nd Cycle) Q1 Q2 Q3 Q4 No-Operat ion No-Opera tion No-Operat ion Example HERE DECFSZ CNT, 1 GOTO LOOP CONTINUE PC = address HERE CNT = CNT - 1 if CNT = 0, PC = address CONTINUE if CNT 0, PC = address HERE+1 No-Operati on Example DECF CNT, 1 CNT = 0x01 Z = 0 CNT = 0x00 Z = Microchip Technology Inc. DS30430C-J2-page 59 :
60 GOTO Unconditional Branch Syntax: [ label ] GOTO k Operands: 0 k 2047 Operation: k PC<10:0> PCLATH<4:3> PC<12:11> Status Affected: None Encoding: 10 1kkk kkkk kkkk Description: Words: 1 Cycles: 2 Q Cycle Activity: Q1 Q2 Q3 Q4 Example 1st Cycle Decode Read literal 'k' 2nd Cycle No-Operat ion GOTO THERE No-Operat ion Process data No-Opera tion Write to PC No-Operat ion PC = Address THERE INCF Increment f Syntax: [ label ] INCF f,d Operands: 0 f 127 d [0,1] Operation: (f) + 1 (destination) Status Affected: Z Encoding: dfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination Example INCF CNT, 1 CNT = 0xFF Z = 0 CNT = 0x00 Z = 1 DS30430C-J2-page Microchip Technology Inc. :
61 INCFSZ Increment f, Skip if 0 Syntax: [ label ] INCFSZ f,d Operands: 0 f 127 d [0,1] Operation: (f) + 1 (destination), skip if result = 0 Status Affected: None Encoding: dfff ffff Description: Words: 1 Cycles: 1(2) Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination If Skip: (2nd Cycle) Q1 Q2 Q3 Q4 No-Operat ion No-Opera tion No-Opera tion No-Operati on IORLW Inclusive OR Literal with W Syntax: [ label ] IORLW k Operands: 0 k 255 Operation: (W).OR. k (W) Status Affected: Z Encoding: kkkk kkkk Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read literal 'k' Process data Write to W Example IORLW 0x35 W = 0x9A W = 0xBF Z = 1 Example HERE INCFSZ CNT, 1 GOTO LOOP CONTINUE PC = address HERE CNT = CNT + 1 if CNT= 0, PC = address CONTINUE if CNT 0, PC = address HERE Microchip Technology Inc. DS30430C-J2-page 61 :
62 IORWF Inclusive OR W with f Syntax: [ label ] IORWF f,d Operands: 0 f 127 d [0,1] Operation: (W).OR. (f) (destination) Status Affected: Z Encoding: dfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination Example IORWF RESULT, 0 RESULT = 0x13 W = 0x91 RESULT = 0x13 W = 0x93 Z = 1 MOVF Move f Syntax: [ label ] MOVF f,d Operands: 0 f 127 d [0,1] Operation: (f) (destination) Status Affected: Z Encoding: dfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination Example MOVF FSR, 0 W = value in FSR register Z = 1 MOVLW Move Literal to W Syntax: [ label ] MOVLW k Operands: 0 k 255 Operation: k (W) Status Affected: None Encoding: 11 00xx kkkk kkkk Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read literal 'k' Process data Write to W Example MOVLW 0x5A W = 0x5A MOVWF Move W to f Syntax: [ label ] MOVWF f Operands: 0 f 127 Operation: (W) (f) Status Affected: None Encoding: fff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write register 'f' Example MOVWF OPTION_REG OPTION = 0xFF W = 0x4F OPTION = 0x4F W = 0x4F DS30430C-J2-page Microchip Technology Inc. :
63 NOP No Operation Syntax: [ label ] NOP Operands: None Operation: No operation Status Affected: None Encoding: xx Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode No-Opera tion No-Opera tion No-Operat ion Example NOP RETFIE Return from Interrupt Syntax: [ label ] RETFIE Operands: None Operation: TOS PC, 1 GIE Status Affected: None Encoding: Description: Words: 1 Cycles: 2 Q Cycle Activity: Q1 Q2 Q3 Q4 1st Cycle Decode No-Opera tion 2nd Cycle No-Operat ion No-Opera tion Set the GIE bit No-Opera tion Pop from the Stack No-Operat ion OPTION Load Option Register Syntax: [ label ] OPTION Operands: Operation: None Status Affected: None (W) OPTION Encoding: Description: Words: 1 Cycles: 1 Example Example RETFIE PC = TOS GIE = Microchip Technology Inc. DS30430C-J2-page 63 :
64 RETLW Return with Literal in W Syntax: [ label ] RETLW k Operands: 0 k 255 Operation: k (W); TOS PC Status Affected: None Encoding: 11 01xx kkkk kkkk Description: Words: 1 Cycles: 2 Q Cycle Activity: Q1 Q2 Q3 Q4 Example 1st Cycle Decode Read literal 'k' 2nd Cycle TABLE No-Operat ion No-Opera tion No-Opera tion No-Opera tion Write to W, Pop from the Stack No-Operat ion CALL TABLE ;W contains table ;offset value ;W now has table value ADDWF PC ;W = offset RETLW k1 RETLW k2 ; RETLW kn ;Begin table ; End of table W = 0x07 W = value of k8 RETURN Return from Subroutine Syntax: [ label ] RETURN Operands: None Operation: TOS PC Status Affected: None Encoding: Description: Words: 1 Cycles: 2 Q Cycle Activity: Q1 Q2 Q3 Q4 Example 1st Cycle Decode No-Opera tion 2nd Cycle No-Operat ion RETURN No-Opera tion PC = TOS No-Opera tion No-Opera tion Pop from the Stack No-Opera tion DS30430C-J2-page Microchip Technology Inc. :
65 RLF Rotate Left f through Carry Syntax: [ label ] RLF f,d Operands: 0 f 127 d [0,1] Operation: See description below Status Affected: C Encoding: dfff ffff Description: Register f Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination C RRF Rotate Right f through Carry Syntax: [ label ] RRF f,d Operands: 0 f 127 d [0,1] Operation: See description below Status Affected: C Encoding: dfff ffff Description: C Register f Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination Example RLF REG1,0 REG1 = C = 0 REG1 = W = C = 1 Example RRF REG1,0 REG1 = C = 0 REG1 = W = C = Microchip Technology Inc. DS30430C-J2-page 65 :
66 SLEEP Syntax: [ label ] SLEEP Operands: None Operation: 00h WDT, 0 WDT prescaler, 1 TO, 0 PD Status Affected: TO, PD Encoding: Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Example: Decode SLEEP No-Opera tion No-Opera tion Go to Sleep SUBLW Subtract W from Literal Syntax: [ label ] SUBLW k Operands: 0 k 255 Operation: k - (W) (W) Status Affected: C, DC, Z Encoding: x kkkk kkkk Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read literal 'k' Process data Write to W Example 1: SUBLW 0x02 W = 1 C =? Z =? Example 2: Example 3: W = 1 C = 1; result is positive Z = 0 W = 2 C =? Z =? W = 0 C = 1; result is zero Z = 1 W = 3 C =? Z =? W = 0xFF C = 0; result is negative Z = 0 DS30430C-J2-page Microchip Technology Inc. :
67 SUBWF Subtract W from f Syntax: [ label ] SUBWF f,d Operands: 0 f 127 d [0,1] Operation: (f) - (W) (destination) Status Affected: C, DC, Z Encoding: dfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination Example 1: SUBWF REG1,1 REG1 = 3 W = 2 C =? Z =? Example 2: Example 3: REG1 = 1 W = 2 C = 1; result is positive Z = 0 REG1 = 2 W = 2 C =? Z =? REG1 = 0 W = 2 C = 1; result is zero Z = 1 REG1 = 1 W = 2 C =? Z =? REG1 = 0xFF W = 2 C = 0; result is negative Z = 0 SWAPF Swap Nibbles in f Syntax: [ label ] SWAPF f,d Operands: 0 f 127 d [0,1] Operation: (f<3:0>) (destination<7:4>), (f<7:4>) (destination<3:0>) Status Affected: None Encoding: dfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination Example SWAPF REG, 0 REG1 = 0xA5 REG1 = 0xA5 W = 0x5A TRIS Load TRIS Register Syntax: [label] TRIS f Operands: 5 f 7 Operation: (W) TRIS register f; Status Affected: None Encoding: fff Description: Words: 1 Cycles: 1 Example 1998 Microchip Technology Inc. DS30430C-J2-page 67 :
68 XORLW Exclusive OR Literal with W Syntax: [label] XORLW k Operands: 0 k 255 Operation: (W).XOR. k (W) Status Affected: Z Encoding: kkkk kkkk Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read literal 'k' Process data Write to W Example: XORLW 0xAF W = 0xB5 W = 0x1A XORWF Exclusive OR W with f Syntax: [label] XORWF f,d Operands: 0 f 127 d [0,1] Operation: (W).XOR. (f) (destination) Status Affected: Z Encoding: dfff ffff Description: Words: 1 Cycles: 1 Q Cycle Activity: Q1 Q2 Q3 Q4 Decode Read register 'f' Process data Write to destination Example XORWF REG 1 REG = 0xAF W = 0xB5 REG = 0x1A W = 0xB5 DS30430C-J2-page Microchip Technology Inc. :
69 1998 Microchip Technology Inc. DS30430C-J2-page 69 :
70 DS30430C-J2-page Microchip Technology Inc. :
71 1998 Microchip Technology Inc. DS30430C-J2-page 71 :
72 : DS30430C-J2-page Microchip Technology Inc. PIC16F8X
73 PIC16F83/84 PIC16F8X 1998 Microchip Technology Inc. DS30430C-J2-page 73 :
74 PIC16F83/84 PIC16F84-04 PIC16F83-04 PIC16F84-10 PIC16F83-10 PIC16LF84-04 PIC16LF83-04 RC XT VDD: IDD: IPD: Freq: VDD: IDD: IPD: Freq: VDD: IDD: IPD: Freq: VDD: IDD: IPD: Freq: HS VDD: VDD: VDD: IDD: IPD: Freq: VDD: IDD: IPD: Freq: LP IDD: IPD: Freq: VDD: IDD: IPD: Freq: IDD: IPD: Freq: VDD: IDD: IPD: Freq: DS30430C-J2-page Microchip Technology Inc. :
75 PIC16F83/84 PIC16F8X D001 D001A VDD D002 VDR * D003 VPOR D004 SVDD D010 D010A D013 D020 D021 D021A * IDD FOSC = 4.0 MHz, VDD = 5.5V FOSC = 4.0 MHz, VDD = 5.5V FOSC = 10 MHz, VDD = 5.5V IPD VDD = VDD = VDD = 1998 Microchip Technology Inc. DS30430C-J2-page 75 :
76 PIC16F83/84 D001 VDD D002 VDR * D003 VPOR D004 SVDD D010 D010A D013 D020 D021 D021A * IDD FOSC = 2.0 MHz, VDD = 5.5V FOSC = 2.0 MHz, VDD = 5.5V LP FOSC = 10 MHz, VDD = 5.5V IPD VDD = 2 VDD = 2 VDD = 2 DS30430C-J2-page Microchip Technology Inc. :
77 PIC16F83/84 PIC16F8X Low VIL D030 V 4.5 V VDD 5.5V (4) D030A D031 D032 D033 MCLR, RA4/T0CKI 1998 Microchip Technology Inc. DS30430C-J2-page 77 : D034 High VIH D040 D040A 4.5 V VDD 5.5V (4) D041 D042 D043 D050 VHYS D070 IPURB * * * VDD = 5.0V, VPIN = VSS (2,3) D060 IIL Vss VPIN VDD, D061 MCLR, RA4/T0CKI Vss VPIN VDD D063 OSC1 Vss VPIN VDD, XT, HS, LP Low D080 VOL IOL = 8.5 ma, VDD = 4.5V D083 OSC2/CLKOUT IOL = 1.6 ma, VDD = 4.5V High D090 VOH (3) IOH = -3.0 ma, VDD = 4.5V D092 High IOH = -1.3 ma, VDD = 4.5V
78 PIC16F83/84 D100 COSC2 D101 CIO EEPROM D120 ED 25 C at 5V D121 VDRW VMIN = D122 TDEW * D130 EP D131 VPR VMIN = D132 VPEW D133 TPEW DS30430C-J2-page Microchip Technology Inc. :
79 PIC16F83/84 PIC16F8X 1. TppS2ppS 2. TppS T F T pp 2 to os,osc OSC1 ck CLKOUT ost cy pwrt io rbt inp t0 T0CKI mc MCLR wdt S F P H High R I V L Low Z 0.7 VDD XTAL 0.8 VDD RC (High) 0.3 VDD XTAL 0.15 VDD RC (Low) 0.9 VDD (High) 0.1 VDD (Low) 2 VDD/2 Pin RL CL Pin VSS CL VSS 1998 Microchip Technology Inc. DS30430C-J2-page 79 :
80 PIC16F83/84 Q4 Q1 Q2 Q3 Q4 Q1 OSC CLKOUT FOSC MHz XT, RC osc PIC16LF8X-04 MHz XT, RC osc PIC16F8X-04 MHz HS osc PIC16F8X-10 khz LP osc PIC16LF8X-04 MHz RC osc PIC16LF8X-04 MHz RC osc PIC16F8X-04 MHz XT osc PIC16LF8X-04 MHz XT osc PIC16F8X-04 MHz HS osc PIC16F8X-10 khz LP osc PIC16LF8X-04 1 Tosc ns XT, RC osc PIC16LF8X-04 ns XT, RC osc PIC16F8X-04 ns HS osc PIC16F8X-10 µs LP osc PIC16LF8X-04 ns RC osc PIC16LF8X-04 ns RC osc PIC16F8X-04 ns XT osc PIC16LF8X-04 ns XT osc PIC16F8X-04 ns HS osc PIC16F8X-10 µs LP osc PIC16LF8X-04 2 TCY µs 3 TosL, TosH 4 TosR, TosF High Low * ns XT osc PIC16LF8X-04 * ns XT osc PIC16F8X-04 * µs LP osc PIC16LF8X-04 * ns HS osc PIC16F8X-10 * ns XT osc PIC16F8X-04 * ns LP osc PIC16LF8X-04 * ns HS osc PIC16F8X-10 DS30430C-J2-page Microchip Technology Inc. :
81 PIC16F83/84 PIC16F8X Q4 Q1 Q2 Q3 OSC1 CLKOUT I/O Pin (input) I/O Pin (output) old value 17 20, Microchip Technology Inc. DS30430C-J2-page 81 : 10 TosH2ckL OSC1 to CLKOUT PIC16F8X * ns 10A PIC16LF8X * ns 11 TosH2ckH OSC1 to CLKOUT PIC16F8X * ns 11A PIC16LF8X * ns 12 TckR PIC16F8X * ns 12A PIC16LF8X * ns 13 TckF PIC16F8X * ns 13A PIC16LF8X * ns 14 TckL2ioV * ns 15 TioV2ckH PIC16F8X * ns PIC16LF8X * ns 16 TckH2ioI * ns 17 TosH2ioV PIC16F8X * ns PIC16LF8X * ns 18 TosH2ioI PIC16F8X * ns PIC16LF8X * ns 19 TioV2osH PIC16F8X * ns PIC16LF8X * ns 20 TioR PIC16F8X * ns 20A PIC16LF8X * ns 21 TioF PIC16F8X * ns 21A PIC16LF8X * ns 22 Tinp High PIC16F8X * ns 22A Low PIC16LF8X * ns 23 Trbp PIC16F8X ns 23A High Low PIC16LF8X ns 15 new value 1
82 PIC16F83/84 VDD MCLR 30 Internal POR PWRT Time-out OSC Time-out Internal RESET Watchdog Timer RESET I/O Pins 30 TmcL Low * ns 2.0V VDD 6.0V 31 Twdt * * ms VDD = 5.0V 32 Tost ms TOSC = OSC1 period 33 Tpwrt * * ms VDD = 5.0V 34 TIOZ Low * ns DS30430C-J2-page Microchip Technology Inc. :
83 PIC16F83/84 PIC16F8X RA4/T0CKI Tt0H High * ns * * 41 Tt0L Low * ns * * ns ns ns ns 2.0V VDD 3.0V 3.0V VDD 6.0V 2.0V VDD 3.0V 3.0V VDD 6.0V 42 Tt0P * ns 1998 Microchip Technology Inc. DS30430C-J2-page 83 :
84 PIC16F83/84 NOTES: DS30430C-J2-page Microchip Technology Inc. :
85 PIC16CR83/84 PIC16F8X 1998 Microchip Technology Inc. DS30430C-J2-page 85 :
86 PIC16CR83/84 PIC16CR84-04 PIC16CR83-04 PIC16CR84-10 PIC16CR83-10 PIC16LCR84-04 PIC16LCR83-04 RC XT VDD: IDD: IPD: Freq: VDD: IDD: IPD: Freq: VDD: IDD: IPD: Freq: VDD: IDD: IPD: Freq: HS VDD: VDD: VDD: IDD: IPD: Freq: VDD: IDD: IPD: Freq: LP IDD: IPD: Freq: VDD: IDD: IPD: Freq: IDD: IPD: Freq: VDD: IDD: IPD: Freq: DS30430C-J2-page Microchip Technology Inc. :
87 PIC16CR83/84 PIC16F8X D001 D001A VDD D002 VDR * D003 VPOR D004 SVDD D010 D010A D013 D020 D021 D021A * IDD FOSC = 4.0 MHz, VDD = 5.5V FOSC = 4.0 MHz, VDD = 5.5V R FOSC = 10 MHz, VDD = 5.5V IPD VDD = VDD = VDD = 1998 Microchip Technology Inc. DS30430C-J2-page 87 :
88 PIC16CR83/84 D001 VDD D002 VDR * D003 VPOR D004 SVDD D010 D010A D013 D020 D021 D021A * IDD FOSC = 2.0 MHz, VDD = 5.5V FOSC = 2.0 MHz, VDD = 5.5V LP FOSC = 10 MHz, VDD = 5.5V IPD VDD = 2 VDD = 2 VDD = 2 DS30430C-J2-page Microchip Technology Inc. :
89 PIC16CR83/84 PIC16F8X Low VIL D030 V 4.5 V VDD 5.5V (4) D030A D031 D032 D033 D034 D040 D040A VIH MCLR, RA4/T0CKI High 1998 Microchip Technology Inc. DS30430C-J2-page 89 : 4.5 V VDD 5.5V (4) D041 D042 D043 D050 VHYS D070 IPURB * * * VDD = 5.0V, VPIN = VSS (2,3) D060 IIL Vss VPIN VDD, D061 MCLR, RA4/T0CKI Vss VPIN VDD D063 OSC1 Vss VPIN VDD, XT, HS, LP Low D080 VOL IOL = 8.5 ma, VDD = 4.5V D083 OSC2/CLKOUT IOL = 1.6 ma, VDD = 4.5V High D090 VOH (3) IOH = -3.0 ma, VDD = 4.5V D092 High IOH = -1.3 ma, VDD = 4.5V
90 PIC16CR83/84 D100 COSC2 D101 CIO D120 ED 25 C at 5V D121 VDRW VMIN = D122 TDEW * DS30430C-J2-page Microchip Technology Inc. :
91 PIC16CR83/84 PIC16F8X 1. TppS2ppS 2. TppS T F T pp 2 to os,osc OSC1 ck CLKOUT ost cy pwrt io rbt inp t0 T0CKI mc MCLR wdt S F P H High R I V L Low Z 0.7 VDD XTAL 0.8 VDD RC (High) 0.3 VDD XTAL 0.15 VDD RC (Low) 0.9 VDD (High) 0.1 VDD (Low) Load Condition 1 Load Condition 2 VDD/2 Pin RL CL Pin VSS CL VSS 1998 Microchip Technology Inc. DS30430C-J2-page 91 :
92 PIC16CR83/84 Q4 Q1 Q2 Q3 Q4 Q1 OSC CLKOUT FOSC MHz XT, RC osc PIC16LCR8X-04 MHz XT, RC osc PIC16CR8X-04 MHz HS osc PIC16CR8X-10 khz LP osc PIC16LCR8X-04 MHz RC osc PIC16LCR8X-04 MHz RC osc PIC16CR8X-04 MHz XT osc PIC16LCR8X-04 MHz XT osc PIC16CR8X-04 MHz HS osc PIC16CR8X-10 khz LP osc PIC16LCR8X-04 1 Tosc ns XT, RC osc PIC16LCR8X-04 ns XT, RC osc PIC16CR8X-04 ns HS osc PIC16CR8X-10 µs LP osc PIC16LCR8X-04 ns RC osc PIC16LCR8X-04 ns RC osc PIC16CR8X-04 ns XT osc PIC16LCR8X-04 ns XT osc PIC16CR8X-04 ns HS osc PIC16CR8X-10 µs LP osc PIC16LCR8X-04 2 TCY µs 3 TosL, TosH High Low * ns XT osc PIC16LCR8X-04 * ns XT osc PIC16CR8X-04 * µs LP osc PIC16LCR8X-04 * ns HS osc PIC16CR8X-10 4 TosR, * ns XT osc PIC16CR8X-04 TosF * ns LP osc PIC16LCR8X-04 * ns HS osc PIC16CR8X-10 DS30430C-J2-page Microchip Technology Inc. :
93 PIC16CR83/84 PIC16F8X Q4 Q1 Q2 Q3 OSC1 CLKOUT I/O Pin (input) I/O Pin (output) old value 17 20, new value Microchip Technology Inc. DS30430C-J2-page 93 : 10 TosH2ckL OSC1 to CLKOUT PIC16CR8X * ns 10A PIC16LCR8X * ns 11 TosH2ckH OSC1 to CLKOUT PIC16CR8X * ns 11A PIC16LCR8X * ns 12 TckR PIC16CR8X * ns 12A PIC16LCR8X * ns 13 TckF PIC16CR8X * ns 13A PIC16LCR8X * ns 14 TckL2ioV * ns 15 TioV2ckH PIC16CR8X * ns PIC16LCR8X * ns 16 TckH2ioI * ns 17 TosH2ioV PIC16CR8X * ns PIC16LCR8X * ns 18 TosH2ioI PIC16CR8X * ns PIC16LCR8X * ns 19 TioV2osH PIC16CR8X * ns PIC16LCR8X * ns 20 TioR PIC16CR8X * ns 20A PIC16LCR8X * ns 21 TioF PIC16CR8X * ns 21A PIC16LCR8X * ns 22 Tinp High PIC16CR8X * ns 22A Low PIC16LCR8X * ns 23 Trbp PIC16CR8X ns 23A High Low PIC16LCR8X ns
94 PIC16CR83/84 VDD MCLR 30 Internal POR PWRT Time-out OSC Time-out Internal RESET Watchdog Timer RESET I/O Pins 30 TmcL Low * ns 2.0V VDD 6.0V 31 Twdt * * ms VDD = 5.0V 32 Tost ms TOSC = OSC1 period 33 Tpwrt * * ms VDD = 5.0V 34 TIOZ Low * ns DS30430C-J2-page Microchip Technology Inc. :
95 PIC16CR83/84 PIC16F8X RA4/T0CKI Tt0H High * ns * * 41 Tt0L * ns * * ns ns ns ns 2.0V VDD 3.0V 3.0V VDD 6.0V 2.0V VDD 3.0V 3.0V VDD 6.0V 42 Tt0P * ns 1998 Microchip Technology Inc. DS30430C-J2-page 95 :
96 PIC16CR83/84 NOTES: DS30430C-J2-page Microchip Technology Inc. :
97 FOSC FOSC (25 C) Frequency normalized to +25 C Rext = 10 kω Cext = 100 pf VDD = 5.5 V VDD = 3.5 V T( C) Cext Rext 20 pf 5 k 10 k 100 k 100 pf 5 k 10 k 100 k 300 pf 5 k 10 k 100 k 1998 Microchip Technology Inc. DS30430C-J2-page 97 :
98 R = 5k Fosc (MHz) R = 10k R = 100k VDD (Volts) DS30430C-J2-page Microchip Technology Inc. :
99 R = 5k 1.4 Fosc (MHz) R = 10k R = 100k VDD (Volts) R = 5k FOSC (MHz) R = 10k R = 100k VDD (Volts) 1998 Microchip Technology Inc. DS30430C-J2-page 99 :
100 IPD (µa) IPD (µa) VDD (Volts) VDD (Volts) 1.40 VTH (Volts) Typ (+25 C) VDD (Volts) DS30430C-J2-page Microchip Technology Inc. :
101 VTH (Volts) Typ (+25 C) VDD (Volts) VIH, VIL (Volts) VIH typ +25 C VIL typ +25 C VDD (Volts) Microchip Technology Inc. DS30430C-J2-page 101 :
102 TYPICAL IDD vs FREQ (RC V 5.5V 5.0V V 4.0V 3.5V 3.0V 2.5V 2.0V FREQ (Hz) DS30430C-J2-page Microchip Technology Inc. :
103 1998 Microchip Technology Inc. DS30430C-J2-page 103 :
104 DS30430C-J2-page Microchip Technology Inc. :
105 WDT period (ms) Typ +25 C gm (µa/v) Typ +25 C VDD (Volts) VDD (Volts) 1998 Microchip Technology Inc. DS30430C-J2-page 105 :
106 gm (µa/v) Typ +25 C gm (µa/v) 1000 Typ +25 C VDD (Volts) VDD (Volts) DS30430C-J2-page Microchip Technology Inc. :
107 IOH (ma) Typ +25 C IOL (ma) Typ +25 C VOH (Volts) VOL (Volts) IOH (ma) Typ +25 C IOL (ma) Typ +25 C VOH (Volts) VOL (Volts) Microchip Technology Inc. DS30430C-J2-page 107 :
108 VDD (Volts) L PDIP (pf) 18L SOIC PORTA PORTB MCLR OSC1/CLKIN OSC2/CLKOUT T0CKI DS30430C-J2-page Microchip Technology Inc. :
109 18L PDIP XXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXX AABBCDE Example PIC16F84-04I/P 9632SAW 18L SOIC XXXXXXXXXXXX XXXXXXXXXXXX XXXXXXXXXXXX AABBCDE Example PIC16F84-04 /SO 9648SAN 1998 Microchip Technology Inc. DS30430C-J2-page 109 :
110 E D 2 n 1 α E1 A1 A β R eb c A2 B B1 p L Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX PCB Row Spacing Number of Pins n Pitch p Lower Lead Width B Upper Lead Width B1 Shoulder Radius R Lead Thickness c Top to Seating Plane A Top of Lead to Seating Plane A1 Base to Seating Plane A2 Tip to Seating Plane L Package Length D Molded Package Width E Radius to Radius Width E1 Overall Row Spacing eb Mold Draft Angle Top α Mold Draft Angle Bottom β DS30430C-J2-page 110 : 1998 Microchip Technology Inc.
111 p E1 E D B n 2 1 X α 45 L c R2 A A1 β R1 L1 φ A2 Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Pitch p Number of Pins n Overall Pack. Height Shoulder Height A A1 Standoff A2 Molded Package Length D Molded Package Width E Outside Dimension E1 Chamfer Distance Shoulder Radius X R1 Gull Wing Radius R2 Foot Length L Foot Angle Radius Centerline φ L1 Lead Thickness c Lower Lead Width B Mold Draft Angle Top α Mold Draft Angle Bottom β 1998 Microchip Technology Inc. DS30430C-J2-page 111 :
112 NOTES: DS30430C-J2-page 112 : 1998 Microchip Technology Inc.
113 1998 Microchip Technology Inc. DS30430C-J2-page 113 :
114 DS30430C-J2-page Microchip Technology Inc. :
115 PIC16C84 PIC16F Microchip Technology Inc. DS30430C-J2-page 115 :
116 NOTES: DS30430C-J2-page Microchip Technology Inc. :
117 INDEX Numerics 8.1 Configuration Bits A Absolute Maximum Ratings... 73, 85 ALU... 7 Architectural Overview... 7 Assembler MPASM Assembler B Block Diagram Interrupt Logic On-Chip Reset Circuit RA3:RA0 and RA5 Port Pins RA4 Pin RB7:RB4 Port Pins TMR0/WDT Prescaler Watchdog Timer Brown-out Protection Circuit C Carry... 7 CLKIN... 9 CLKOUT... 9 Code Protection... 37, 52 Compatibility, upward... 3 Computed GOTO Configuration Bits D DC Characteristics... 75, 76, 77, 78, 87, 88, 89, 90 Development Support Development Tools Digit Carry... 7 E Electrical Characteristics... 73, 85 External Power-on Reset Circuit F Family of Devices PIC16C8X... 3 FSR... 19, 42 Fuzzy Logic Dev. System (fuzzytech -MP) G GIE I I/O Ports I/O Programming Considerations ICEPIC Low-Cost PIC16CXXX In-Circuit Emulator In-Circuit Serial Programming... 37, 52 INDF Instruction Format Instruction Set ADDLW ADDWF ANDLW ANDWF BCF BSF BTFSC BTFSS CALL CLRF CLRW CLRWDT COMF DECF DECFSZ GOTO INCF INCFSZ IORLW IORWF MOVF MOVLW MOVWF NOP OPTION RETFIE RETLW RETURN RLF RRF SLEEP SUBLW SUBWF SWAPF TRIS XORLW XORWF Section Summary Table INT Interrupt INTCON... 17, 42, 47, 48 INTEDG Interrupts Flag Interrupt on Change Feature Interrupts... 37, 47 K KeeLoq Evaluation and Programming Tools L Loading of PC M MCLR... 9, 41, 42 Memory Organization Data Memory Memory Organization Program Memory MP-DriveWay - Application Code Generator MPLAB C MPLAB Integrated Development Environment Software O OPCODE OPTION... 16, 42, 48 OSC selection OSC OSC Oscillator HS... 39, 46 LP... 39, 46 RC... 39, 40 XT Oscillator Configurations Microchip Technology Inc. DS30430C-J2-page 117 :
PIC12C5XX日本語データシート
, CMOS Device EPROM RAM PIC12C508 512 x 12 25 PIC12C508A 512 x 12 25 PIC12C509 1024 x 12 41 PIC12C509A 1024 x 12 41 : < < PDIP, SOIC, Windowed Ceramic Side Brazed VDD GP5/OSC1/CLKIN GP4/OSC2 GP3/MCLR/VPP
untitled
PIC Pic MPLAB HEX Pic PIC 18CXXX 14000 17CXXX 16C92X 16F8XX 16C7XX 16C6XX 16C62X 16F8X 12C5XX 16C5X 16C55X 12C6XX d f b f k k PIC 4 2 1 2 1 SPI SPI,SSART SPI 4 5 8 1 2 SPI,USART 1 64 128 256 8 (10bit)
前付（念）.indd
図解 PIC マイコン実習 ( 第 2 版 ) サンプルページ この本の定価 判型などは, 以下の URL からご覧いただけます. http://www.morikita.co.jp/books/mid/078332 このサンプルページの内容は, 第 2 版 1 刷発行時のものです. i 第 2 版 まえがき 10 MPLAB PIC USB MPLAB X 2 PIC16F84A PIC PIC
3 4 PIC
PIC 16 2 9 3 4 PIC 5 7 4-1 4-2 4-3 4-4 4-5 4-6 4-7 4-8 4-9 7 7 7 0 7 0 7 11 13 14 15 19 5-1 5-2 5-3 19 19 19 5-4 20 5-5 20 5-6 22 5-7 23 5-8 25 5-9 26 5-10 27 29 6-1 29 6-2 29 6-3 29 1 6-4 IC 30 6-5 31
スライド 1
9. 割り込みを学ぼう 9.1 外部からの割り込み (SW1 を押すことにより割り込みをかける方法 ) 9.2 タイマ 0 による割り込み ( 処理タイミングの管理方法 : 一定時間毎に LED1, 2, 3 を点滅させる方法 ) 回路製作の詳細は第 0 章を参照してください. 1 9.1 外部からの割り込み (SW1 を押すことにより割り込みをかける方法 ) ;Interrupt test program
スライド 1
4. 演算命令 ( つづき ) ( 足し算の桁上がり,Rotate, etc.) を学ぼう 本稿の Web ページ http://www.cmplx.cse.nagoya-u.ac.jp/~furuhashi/education/pic/index.html 1 本章では足し算の桁上がり情報の格納場所の確認をするプログラムを学びます. PIC16F マイコンではデータは 8 ビットで表されています.
Taro11-…e…L…X…g.jtd
PIC アセンブラの基礎 年組番氏名 群馬県立利根実業高等学校 工業技術科情報技術コース 1.PICとは? PIC( ピック ) とは Peripheral Interface Controllerの頭文字から名付けられ 周辺インターフェイス コントローラを意味する 米国のMicrochip Technology 社により開発されたワンチップマイコン ( マイクロコントローラ ) 製品のシリーズ名称である
3 1EEPROMElectrically Erasable PROM PROMProgrammable ROM 2 EEPROM 3
1 ROM 3 1EEPROMElectrically Erasable PROM PROMProgrammable ROM 2 EEPROM 3 000 001 EEPROM 3FF 14bit1024 A B 00 INDIRECT ADDR 80 INDIRECT ADDR 01 TMR0 81 OPTION 02 PCL 82 PCL 03 STATUS 83 STATUS 04 FSR 84
PIC18 Istructios PIC16, PIC x Microchip Techology Icorporated. All Rights Reserved. PICmicro PIC18 52
PIC18 2003 Microchip Techology Icorporated. All Rights Reserved. PICmicro PIC18 51 PIC18 Istructios PIC16, PIC17 16 16 8x8 2003 Microchip Techology Icorporated. All Rights Reserved. PICmicro PIC18 52 PIC18
2. アーキテクチャ 概 要 PIC16F8x ファミリは 命 令 語 長 14bit の RISC[1]で 命 令 は35 種 類 である 1 命 令 は4クロックで 実 行 されるが 実 際 にはパイプライン 処 理 [2]されている ノイマン 型 コンピュータ[3]と 違 いプログラムとデータ
![2. アーキテクチャ 概 要 PIC16F8x ファミリは 命 令 語 長 14bit の RISC[1]で 命 令 は35 種 類 である 1 命 令 は4クロックで 実 行 されるが 実 際 にはパイプライン 処 理 [2]されている ノイマン 型 コンピュータ[3]と 違 いプログラムとデータ](/thumbs/43/23149901.jpg "2. アーキテクチャ 概 要 PIC16F8x ファミリは 命 令 語 長 14bit の RISC[1]で 命 令 は35 種 類 である 1 命 令 は4クロックで 実 行 されるが 実 際 にはパイプライン 処 理 [2]されている ノイマン 型 コンピュータ[3]と 違 いプログラムとデータ")
1. PIC とは PIC とはその 挙 動 をプログラムできる IC のことである Peripheral Interface Controller の 略 でコン ピュータの 周 辺 機 器 の 接 続 部 分 をコントロールするために 開 発 されたマイクロコントローラである 開 発 元 は Microchip Tecnology Inc. 社 で PIC とは 同 社 の PICmicro(R)マイクロコントローラを
スライド 1
6.LED( 発光ダイオード ) の制御を学ぼう 本稿の Web ページ http://www.cmplx.cse.nagoya-u.ac.jp/~furuhashi/education/pic/index.html 1 5V R 4 SW 1 R 3 R 2 SW 2 SW 3 PIC16F84A 1 RA2 RA1 18 2 RA3 RA0 17 3 RA4 OSC1 16 4 MCLR OSC2
,, ( ) 5 ma ( ) 5V V 5 6 A B C D E F G H I J , LED LED, LED, 7 LED,, 7 LED ( ) V LED VCC 5V 7 LED VCC f g f a g b a b c e d e d c dp dp VCC (
[] PIC 8 (/6, 6/ ) (/, 6/) (5/7, 6/8) PIC PIC PIC (5/, 6/5) V 5 (5/, 7/ ) V LED ( LED ( /, 6/) V V V ( 5/8, 6/9) V ( 5/5, 6/6) ( V 5/8, 7/ 9) V % 6%, LED, LED /7, 6/ 5) 7,, LED, LED LED ,, ( ) 5 ma ( )
PowerPoint プレゼンテーション
マイコンプログラミング演習 I 第 04-05 回 LEDを用いたI/O 制御担当 : 植村 実験の目的 本実験ではマイコンシステムを用いた信号の入出力の制御方法を理解することを目的とし, マイコンのアーキテクチャを理解 実装するとともに, アセンブラによるプログラミング技術の習得を行う. 回路の構成として,PIC16F84A を用いてスイッチを入力とする LED の点灯 / 消灯の出力操作を行う回路ならびにアセンブラプログラムを実装する.
untitled
1050259 16 2 22 1 1 DC DC 2 20 TRIZ PIC PIC MPLAB IDE PIC16F84A PIC16F876 DC 3 20 20 PIC 4 16*32 24*72 ( 1-1) 5 ON,OFF 1-2 & 10ms 6 7 2-1 8 2 PWM Microchip Technology PIC 9 1 H PIC 10 PID 90g PWM P I PWM
Microsoft PowerPoint - 工学ゼミⅢLED１回_2018
工学ゼミ Ⅲ 安全 環境活動に役立つ LEDイルミネーションの製作 第 1 回 1. 概要 3~5 名の学生グループで安全 環境活動に役立つ LED イルミネーションを作製する 作品のデザイン画や部品リスト 回路図 動作フロー図等は事前に作成し 計画的に作業を行うことが求められる 2. 達成すべき目標 作品に係る資料を事前にまとめ それに基づいて製作が行える 集団の中で 自身の知識 技術を積極的に応用しながら
PIC16C7X日本語データシート
PIC16C7X PIC16C7X A/D CMOS 1996 Microchip Technology Inc. DS30390B-J00 - page 1 PIC16C7X DS30390B-J00 - page 2 1996 Microchip Technology Inc. PIC16C710 RA2/AN2 RA3/AN3/V REF RA4/T0CKI MCLR/VPP V SS V SS
スライド 1
3. 演算命令を学ぼう 本稿の Web ページ http://www.mybook-pub-site.sakura.ne.jp/pic/index.html 1 ; ADD このソースファイルを各自打ち込んで下さい. EQU 0x0C ; at 0C 足し算を実行するプログラムの例です. MOVLW B 00000001 ; Load 0x01 to W ADDLW B'00000011' ; W
PowerPoint プレゼンテーション
マイコンプログラミング演習 I 第 02-03 回回路構築 /LEDを用いた出力制御担当 : 植村 導入 講義内容 本講義では携帯電話や携帯オーディオプレイヤー 各種ロボットなどの電子機器 情報機器に用いられるマイコン制御技術を 実習を通して理解する PIC: Peripheral Interface Controller 直訳 : 周辺装置インタフェースコントローラー マイクロコンピュータ CPUやメモリをワンチップ化した小型のコンピュータパソコンのような汎用性はないが低コスト
R1RW0408D シリーズ
お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジが合併し 両社の全ての事業が当社に承継されております 従いまして 本資料中には旧社名での表記が残っておりますが 当社の資料として有効ですので ご理解の程宜しくお願い申し上げます ルネサスエレクトロニクスホームページ (http://www.renesas.com)
スライド 1
8. ステッピングモータの制御を学ぼう 秋月電子通商 PIC ステッピングモータドライバキット ( 小型モータ付き ) を参照しました. 回路製作の詳細は第 0 章を参照してください. 1 2 第 0 章図 28 より完成写真 ( マイコン回路 + ステッピングモータ駆動回路 ) PIC マイコンによるステッピングモータの制御 PIC16F84 R 1 R 2 RB6 RB0 ステッピングモータ S
R1RP0416D シリーズ
お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジが合併し 両社の全ての事業が当社に承継されております 従いまして 本資料中には旧社名での表記が残っておりますが 当社の資料として有効ですので ご理解の程宜しくお願い申し上げます ルネサスエレクトロニクスホームページ (http://www.renesas.com)
R1LV1616H-I シリーズ
お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジが合併し 両社の全ての事業が当社に承継されております 従いまして 本資料中には旧社名での表記が残っておりますが 当社の資料として有効ですので ご理解の程宜しくお願い申し上げます ルネサスエレクトロニクスホームページ (http://www.renesas.com)
R1LV0416Dシリーズ データシート
Wide Temperature Range Version 4M SRAM (256-kword 16-bit) RJJ03C0237-0100 Rev. 1.00 2007.05.24 262,144 16 4M RAM TFT 44 TSOP II 48 CSP 0.75mm 3.0V 2.7V 3.6V 55/70ns max 3µW typ V CC =3.0V 2CS 40 +85 C
Timers_JP.fm
14 14.1 14-2 14.2 14-3 14.3 14-6 14.4 14-9 14.5 14-14 14.6 14-14 14.7 16 14-15 14.8 2 32 khz 14-15 14.9 32 14-16 14.10 32 14-18 14.11 32 14-21 14.12 14-21 14.13 14-22 14.14 14-23 14.15 14-24 14.16 14-25
HN58C256A シリーズ/HN58C257A シリーズ データシート
HN58C256A HN58C257A 256k EEPROM (32-kword 8-bit) Ready/Busy and RES function (HN58C257A) RJJ03C0133-0600Z Rev. 6.00 2006. 10. 26 HN58C256A HN58C257A 32768 8 EEPROM ROM MNOS CMOS 64 5V±10% 85ns/100ns (max)
卒 業 研 究 報 告
卒業研究報告 題 目 PIC プロセッサを用いた多機能ライントレース ロボットの設計と製作 指導教員 綿森道夫助教授 報告者 学籍番号 :1050239 氏名 : 高橋壮平 平成 17 年 2 月 21 日 高知工科大学電子 光システム工学科 PIC - 1 - - 2 - PIC - 3 - / PIC MPLAB PIC PIC AKI PIC AKI PIC - 4 - AKI PIC - 5
DS30292A-J-page 2 Preliminary 2000 Microchip Technology Inc. PIC16F876/
PDIP H ) MCLR/VPP/THV RA0/AN0 RA1/AN1 RA2/AN2/VREF- RA3/AN3/VREF+ RA4/T0CKI RA5/AN4/SS RE0/RD/AN5 RE1/WR/AN6 RE2/CS/AN7 VDD VSS OSC1/CLKIN OSC2/CLKOUT RC0/T1OSO/T1CKI RC1/T1OSI/CCP2 RC2/CCP1 RC3/SCK/SCL
HN58V256Aシリーズ/HN58V257Aシリーズ データシート
HN58V256A HN58V257A 256k EEPROM (32-kword 8-bit) Ready/Busy and RES function (HN58V257A) RJJ03C0132-0600 Rev. 6.00 2007. 05. 24 HN58V256A HN58V257A 32768 8 EEPROM ROM MNOS CMOS 64 3V 2.7 5.5V 120ns (max)
PIC (, 2, 3 ) PIC ( 1, 2, 3 ) 1 2 (, 2 ) PIC ( 1, 2 ) 2.1 (p.34) define #define (define ) (p.61) 1 30 (RD 7 /P SP 7 ) 32 (V DD ) IC
PIC 19 12 22 1 (, 2, 3 ) PIC ( 1, 2, 3 ) 1 2 (, 2 ) PIC ( 1, 2 ) 2.1 (p.34) define #define (define ) 2.2 4-1 (p.61) 1 30 (RD 7 /P SP 7 ) 32 (V DD ) IC 2.3 5-2 (p.102) 5 6 ADCON0< 5 >, ADCON0< 4 > ADCON1
R1RW0416DI シリーズ
お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジが合併し 両社の全ての事業が当社に承継されております 従いまして 本資料中には旧社名での表記が残っておりますが 当社の資料として有効ですので ご理解の程宜しくお願い申し上げます ルネサスエレクトロニクスホームページ (http://www.renesas.com)
R1EV5801MBシリーズ データシート
1M EEPROM (128-kword 8-bit) Ready/Busy and function R10DS0209JJ0100 Rev.1.00 131072 8 EEPROM ROM MONOS CMOS 128 2.7V 5.5V 150ns (max) @ Vcc=4.5V 5.5V 250ns(max) @ Vcc=2.7V 5.5V 20mW/MHz (typ) 110µW (max)
untitled
1.0 1. Display Format 8*2 Character 2. Power Supply 3.3V 3. Overall Module Size 30.0mm(W) x 19.5mm(H) x max 5.5mm(D) 4. Viewing Aera(W*H) 27.0mm(W) x 10.5mm(H) 5. Dot Size (W*H) 0.45mm(W) x 0.50mm(H) 6.
XC9500 ISP CPLD JTAG Port 3 JTAG Controller In-System Programming Controller 8 36 Function Block Macrocells to 8 /GCK /GSR /GTS 3 2 or 4 Blocks FastCO
- 5ns - f CNT 25MHz - 800~6,400 36~288 5V ISP - 0,000 / - / 36V8-90 8 - IEEE 49. JTAG 24mA 3.3V 5V PCI -5-7 -0 CMOS 5V FastFLASH XC9500 XC9500CPLD 0,000 / IEEE49. JTAG XC9500 36 288 800 6,400 2 XC9500
LT 低コスト、シャットダウン機能付き デュアルおよびトリプル300MHz 電流帰還アンプ
µ µ LT1398/LT1399 V IN A R G 00Ω CHANNEL A SELECT EN A R F 3Ω B C 97.6Ω CABLE V IN B R G 00Ω EN B R F 3Ω 97.6Ω V OUT OUTPUT (00mV/DIV) EN C V IN C 97.6Ω R G 00Ω R F 3Ω 1399 TA01 R F = R G = 30Ω f = 30MHz
MAX191 EV J
-0; Rev ; / µ µ PART TEMP. RANGE BOARD TYPE MAXEVSYS-DIP 0 C to +0 C Through-Hole MAXEVKIT-DIP 0 C to +0 C Through-Hole 0CMODULE-DIP 0 C to +0 C Through-Hole Evaluates: MAX Maxim Integrated Products Evaluates:
untitled
COPAL ELECTRONICS 32 (DP) DP INC 2 3 3 RH RL RWB 32 C S U/D INC U/D CS 2 2 DP7114 32 SOIC CMOS 2.5 V - 6.0 V / 10 kω 50 kω 100 kω TSSOP MSOP /BFR INC / U/D RH RoHS GND RWB RL CS VCC 2017 6 15 1 : R = 2
Triple 2:1 High-Speed Video Multiplexer (Rev. C
www.tij.co.jp OPA3875 µ ± +5V µ RGB Channel OPA3875 OPA3875 (Patented) RGB Out SELECT ENABLE RED OUT GREEN OUT BLUE OUT 1 R G B RGB Channel 1 R1 G1 B1 X 1 Off Off Off 5V Channel Select EN OPA875 OPA4872
電源監視回路
TPS3820-xx,TPS3823-xx TPS3824-xx,TPS3825-xx TPS3828-xx www.tij.co.jp µ TYPICAL APPLICATION TPS3820, TPS3823, TPS3828: DBV PACKAGE (TOP VIEW) GND MR 1 2 3 5 4 VDD WDI TPS3824: DBV PACKAGE (TOP VIEW) 1 5
DAC121S101/DAC121S101Q 12-Bit Micro Power, RRO Digital-to-Analog Converter (jp)
DAC121S101 DAC121S101/DAC121S101Q 12-Bit Micro Power, RRO Digital-to-Analog Converter Literature Number: JAJSA89 DAC121S101 12 D/A DAC121S101 12 D/A (DAC) 2.7V 5.5V 3.6V 177 A 30MHz 3 SPI TM QSPI MICROWIRE
ADC121S Bit, ksps, Diff Input, Micro Pwr Sampling ADC (jp)
ADC121S625 ADC121S625 12-Bit, 50 ksps to 200 ksps, Differential Input, Micro Power Sampling A/D Converter Literature Number: JAJSAB8 ADC121S625 12 50kSPS 200kSPS A/D ADC121S625 50kSPS 200kSPS 12 A/D 500mV
16-Bit, Serial Input Multiplying Digital-to-Analog Converter (Rev. B
DAC8811 www.tij.co.jp ± ± µ ± µ ± V REF CS Power-On Reset DAC8811 D/A Converter 16 DAC Register 16 R FB I OUT CLK SDI Shift Register GND DAC8811C ±1 ±1 MSOP-8 (DGK) 4to 85 D11 DAC8811ICDGKT DAC8811C ±1
Unidirectional Measurement Current-Shunt Monitor with Dual Comparators (Rev. B
www.tij.co.jp INA206 INA207 INA208 INA206-INA208 INA206-INA208 V S 1 14 V IN+ V S 1 10 V IN+ OUT CMP1 IN /0.6V REF 2 3 1.2V REF 13 12 V IN 1.2V REF OUT OUT CMP1 IN+ 2 3 9 8 V IN CMP1 OUT CMP1 IN+ 4 11
NL-22／NL-32取扱説明書_操作編
MIC / Preamp ATT NL-32 A C ATT AMP 1 AMP 2 AMP 3 FLAT FLAT CAL.SIG. OVER LOAD DET. AMP 4 AMP 5 A/D D/A CONV. AMP 6 AMP 7 A/D CONV. Vref. AMP 8 AMP 10 DC OUT AMP 9 FILTER OUT AC DC OUT AC OUT KEY SW Start
main.dvi
20 II 7. 1 409, 3255 e-mail: namba@faculty.chiba-u.jp 2 1 1 1 4 2 203 2 1 1 1 5 503 1 3 1 2 2 Web http://www.icsd2.tj.chiba-u.jp/~namba/lecture/ 1 2 1 5 501 1,, \,", 2000 7. : 1 1 CPU CPU 1 Intel Pentium
LMC6022 Low Power CMOS Dual Operational Amplifier (jp)
Low Power CMOS Dual Operational Amplifier Literature Number: JAJS754 CMOS CMOS (100k 5k ) 0.5mW CMOS CMOS LMC6024 100k 5k 120dB 2.5 V/ 40fA Low Power CMOS Dual Operational Amplifier 19910530 33020 23900
.,. 0. (MSB). =2, =1/2.,. MSB LSB, LSB MSB. MSB 0 LSB 0 0 P
, 0 (MSB) =2, =1/2, MSB LSB, LSB MSB MSB 0 LSB 0 0 P61 231 1 (100, 100 3 ) 2 10 0 1 1 0 0 1 0 0 100 (64+32+4) 2 10 100 2 5, ( ), & 3 (hardware), (software) (firmware), hardware, software 4 wired logic
LP3470 Tiny Power On Reset Circuit (jp)
Tiny Power On Reset Circuit Literature Number: JAJS547 IC ( C) CMOS IC 2.63V 2.93V 3.08V 3.65V 4.00V 4.38V 4.63V 6 (V RTH ) 2.4V 5.0V V CC (L ow ) ( ) V CC ( ) IC SOT23-5 1 : 2.63V 2.93V 3.08V 3.65V 4.00V
スライド 1
2. 転送命令を学ぼう 2004 年 8 月に本講義ノートを Web にアップして以来, とても多くの方の訪問を受けてきました. 内容が一部古くなっていたので,2012 年 5 月時点の情報に書き改めました. 主な変更点は以下の通りです. 第 0 章に本講座の準備のための章を設け, 以下の更新をしました. 1. プログラム開発環境 (MPLAB IDE) を v8.84 に更新しました. 2012
mbed祭りMar2016_プルアップ.key
1 2 4 5 Table 16. Static characteristics (LPC1100, LPC1100L series) continued T amb = 40 C to +85 C, unless otherwise specified. Symbol Parameter Conditions Min Typ [1] Max Unit Standard port pins, RESET
3 SIMPLE ver 3.2: SIMPLE (SIxteen-bit MicroProcessor for Laboratory Experiment) 1 16 SIMPLE SIMPLE 2 SIMPLE 2.1 SIMPLE (main memo
3 SIMPLE ver 3.2: 20190404 1 3 SIMPLE (SIxteen-bit MicroProcessor for Laboratory Experiment) 1 16 SIMPLE SIMPLE 2 SIMPLE 2.1 SIMPLE 1 16 16 (main memory) 16 64KW a (C )*(a) (register) 8 r[0], r[1],...,
1
Ver.1.04 Reference Document For LCD Module Product No Documenet No 1B3GB02 SPC1B3GB02V104 Version Ver.1.04 REPRO ELECTRONICS CORPORATION Maruwa Building 2F,2-2-19 Sotokanda,Chiyoda-ku,Tokyo 1001-0021 Japan
BANK1 MOVLW b' ' PIC16F648A独自 MOVWF CMCON コンパレータ OFF BCF INTCON,PEIE 周辺割り込み OFF PIC16F648A独自 MOVLW B' ' RB2/TX, RB1/RX PIC16F648A独自 MOVW
Function: PIC16F648A Tiny Monitor Processor: PIC16F648A at 20 MHz using external HS oscillator Hardware: http://www.geocities.jp/jk1brk/misc/pic/pic16f648a.pdf Filename: PicMonV6.asm Author: jk1brk Website:
Microsoft Word - 組込みプログラミング2018テキスト
ロボティクスコース実験 Ⅰ 組込みプログラミング Ⅰ, Ⅱ 平成 30 年度版 1. スケジュール 日付内容 4/16 - コンピュータの機械語 ( ニーモニック ) と MPLAB( プログラム開発環境 ) の使い方 - 実験 1の予備実験 4/23 - 実験 1の予備実験のまとめ - 実験 1の計画書の作成とチェック 5/2 - 実験 1の実施とレポート作成 月曜授業 5/7 - 実験 1のレポートのチェック
DS90CP04 1.5 Gbps 4x4 LVDS Crosspoint Switch (jp)
1.5 Gbps 4x4 LVDS Crosspoint Switch Literature Number: JAJS984 1.5Gbps 4 4 LVDS 4 4 (LVDS) ( ) 4 4:1 4 1 MODE 4 42.5Gb/s LVDS 20010301 33020 23900 11800 ds200287 2007 12 Removed preliminary. Removed old
AN 100: ISPを使用するためのガイドライン
ISP AN 100: In-System Programmability Guidelines 1998 8 ver.1.01 Application Note 100 ISP Altera Corporation Page 1 A-AN-100-01.01/J VCCINT VCCINT VCCINT Page 2 Altera Corporation IEEE Std. 1149.1 TCK
OPA134/2134/4134('98.03)
OPA OPA OPA OPA OPA OPA OPA OPA OPA TM µ Ω ± ± ± ± + OPA OPA OPA Offset Trim Offset Trim Out A V+ Out A Out D In +In V+ Output In A +In A A B Out B In B In A +In A A D In D +In D V NC V +In B V+ V +In
DS90LV V or 5V LVDS Driver/Receiver (jp)
DS90LV019 DS90LV019 3.3V or 5V LVDS Driver/Receiver Literature Number: JAJS563 DS90LV019 LVDS 1 / DS90LV019 Low Voltage Differential Signaling (LVDS) 1 CMOS / DS90LV019 EIA-644 IEEE1596.3 (SCI LVDS) 2
4
I/O 2AO DC0-10V/ 10V 16Bit Ver. 1.0.0 2 750-562 Copyright 2006 by WAGO Kontakttechnik GmbH All rights reserved. 136-0071 1-5-7 ND TEL 03-5627-2059 FAX 03-5627-2055 http://www.wago.co.jp/io/ WAGO Kontakttechnik
Microsoft PowerPoint - 第8α章.ppt [互換モード]
![Microsoft PowerPoint - 第8α章.ppt [互換モード]](/thumbs/40/20578086.jpg "Microsoft PowerPoint - 第8α章.ppt [互換モード]")
第 8α 章 PIC16F88を 用 いたステッピングモータ の 速 度 制 御 本 稿 のWebページ 目 次 8-1. PIC16F88を 用 いたステッピングモータ 制 御 の 実 験 回 路 図 回 路 図 立 体 配 線 図 完 成 写 真 8-2.ステッビングモータの 定 速 駆 動 8-3.タイマ0 割 り 込 みによる 制 御 周 期 管 理 8-4. A/D 変 換 モジュール 8-5.
Lab GPIO_35 GPIO
6,GPIO, PSoC 3/5 GPIO HW Polling and Interrupt PSoC Experiment Lab PSoC 3/5 GPIO Experiment Course Material 6 V2.02 October 15th. 2012 GPIO_35.PPT (65 Slides) Renji Mikami Renji_Mikami@nifty.com Lab GPIO_35
ADC082S021 2 Channel, 50 ksps to 200 ksps, 8-Bit A/D Converter (jp)
2 Channel, 50 ksps to 200 ksps, 8-Bit A/D Converter Literature Number: JAJSAA2 2 200KSPS 8 A/D 2 8 CMOS A/D 50kSPS 200kSPS / IN1 IN2 1 2 SPI QSPI MICROWIRE DSP 2.7V 5.25V 3V 1.6mW 5V 5.8mW 3V 0.12 W 5V
DS90LV011A 3V LVDS 1 回路入り高速差動出力ドライバ
3V LVDS Single High Speed Differential Driver Literature Number: JAJS962 Single High Speed Differential Driver 19961015 23685 ds200149 Input Voltage changed to 3.6V from 5V Updated DC and AC typs basic
4
I/O 2AO 0/4-20mA / DC6-18V 16Bit Ver. 1.0.0 2 750-563 Copyright 2006 by WAGO Kontakttechnik GmbH All rights reserved. 136-0071 1-5-7 ND TEL 03-5627-2059 FAX 03-5627-2055 http://www.wago.co.jp/io/ WAGO
TO-92 Plastic Package (Z) TO-252 (D-Pak) Bottom View Dual-In-Line Packages (N) Surface-Mount Package (M, MM) Front View 8-Lead LLP Top View 4 DAP Top
2951 LP 2950 LP 19850603 33200 24060 LP2950 LP2951 ( 75 A) ( 40mV 100mA 380mV) LP2950-5.0 D-Pak 3 TO-92 5V LP2951 8 (DIP) LLP 8 1 1 / 3V 3.3V 5V ( ) 1.24V 29V ( 0.5%) ( 0.05%) 11800 DS008546 fixed the
DS90LV047A
3V LVDS 4 CMOS 4 CMOS Low Voltage Differential Signaling (LVDS) 400Mbps (200MHz) TLL/CMOS 350mV TRI-STATE 13mW ( ) PCB ENABLE ENABLE* AND TRI- STATE 4 DS90LV04 A (DS90LV048A ) ECL 1 1 Dual-In-Line 3V LVDS
untitled
13 Verilog HDL 16 CPU CPU IP 16 1023 2 reg[ msb: lsb] [ ]; reg [15:0] MEM [0:1023]; //16 1024 16 1 16 2 FF 1 address 8 64 `resetall `timescale 1ns/10ps module mem8(address, readdata,writedata, write, read);
N12866N2P-H.PDF
16Mx64bits PC133 SDRAM SO DIMM Based on 16Mx16 SDRAM with LVTTL, 4 banks & 8K Refresh (16M x 16bit) /. / 1 A0 ~ A12 BA0, BA1 CK0, CK1 CKE0 /S0 /RAS /CAS /WE DQM0 ~ DQM7 DQ0 ~ DQ63 SA0~2 SDA SCL VCC 3.3
LTC 単一5VAppleTalk トランシーバ
LTC µ µ µ µ TYPICAL APPLICATI O LTC 0.µF CHARGE PMP CPEN EN EN O O 0 DO 0 V µf 0.µF µf D D = Ω TO 0Ω Ω TO 0Ω 00pF LTC TA0 - LTC ABSOLTE AXI RATI GS Supply Voltage ( )... V Input Voltage Logic Inputs...
Microsoft PowerPoint - NxLecture ppt [互換モード]
![Microsoft PowerPoint - NxLecture ppt [互換モード]](/thumbs/84/89855106.jpg "Microsoft PowerPoint - NxLecture ppt [互換モード]")
011-05-19 011 年前学期 TOKYO TECH 命令処理のための基本的な 5 つのステップ 計算機アーキテクチャ第一 (E) 5. プロセッサの動作原理と議論 吉瀬謙二計算工学専攻 kise_at_cs.titech.ac.jp W61 講義室木曜日 13:0-1:50 IF(Instruction Fetch) メモリから命令をフェッチする. ID(Instruction Decode)
AN6591FJM
IC AN6591FJM PHS, PLL IC AN6591FJMPHSIF PLL IC QFN (Quad flat non-leaded PKG) (0.63) 34 44 R0.30 6.20±0.10 (6.00) 33 23 1 11 (0.63) 22 12 3-C 0.50 (6.00) 6.20±0.10 0.20±0.10 0.80 max Unit : mm, PLL,, APC
LTC ビット、200ksps シリアル・サンプリングADC
µ CBUSY ANALOG INPUT 10V TO 10V 2. 2. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 V DIG V ANA PWRD BUSY CS R/C TAG SB/BTC DATA EXT/INT DATACLK DGND SY 28 27 26 25 24 23 22 21 20 19 18 17 16 15 10µF 0.1µF SERIAL INTERFACE
MAX7319 EV.J
19-4043; Rev 0; 2/08 PART TYPE MAX7319EVKIT+ EV Kit DESIGNATION QTY DESCRIPTION C1, C5 C9, C17, C18, C37 9 0.1μF ±10%, 16V X7R ceramic capacitors (0603) TDK C1608X7R1C104K C2 0 Not installed, capacitor
HN58X2402SFPIAG/HN58X2404SFPIAG
お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジが合併し 両社の全ての事業が当社に承継されております 従いまして 本資料中には旧社名での表記が残っておりますが 当社の資料として有効ですので ご理解の程宜しくお願い申し上げます ルネサスエレクトロニクスホームページ (http://www.renesas.com)
Power Calculator
1 4... 4... 4... 5 6... 6... 6 isplever... 6... 7... 8... 8... 8 (NCD)... 9 (.vcd)... 10... 11...11... 12 Power Summary... 16 Logic Block... 19 Clocks... 20 I/O... 20 I/O Term... 21 Block RAM... 22 DSP...
XAPP858 - High-Performance DDR2 SDRAM Interface In Virtex-5 Devices
XAPP858 (v1.1) 2007 1 9 : Virtex-5 FPGA Virtex-5 DDR2 SDRAM : Karthi Palanisamy Maria George (v1.1) DDR2 SDRAM Virtex -5 I/O ISERDES (Input Serializer/Deserializer) ODDR (Output Double Data Rate) DDR2
LMC6082 Precision CMOS Dual Operational Amplifier (jp)
Precision CMOS Dual Operational Amplifier Literature Number: JAJS760 CMOS & CMOS LMC6062 CMOS 19911126 33020 23900 11800 ds011297 Converted to nat2000 DTD Edited for 2001 Databook SGMLFIX:PR1.doc Fixed
LTC 高効率同期整流式降圧スイッチング・レギュレータ
µ LTC1735-1 C OSC 47pF C C2 330pF 47pF PGOOD 1 C OSC TG C SS 0.1µF 2 RUN/SS BOOST R C1 33k 3 I TH LTC1735-1 SW C C1 47pF 4 5 PGOOD SENSE V IN 1000pF 6 7 8 SENSE V OSENSE SGND BG PGND EXTV CC 10Ω 10Ω 16
プロセッサ・アーキテクチャ
2. NII51002-8.0.0 Nios II Nios II Nios II 2-3 2-4 2-4 2-6 2-7 2-9 I/O 2-18 JTAG Nios II ISA ISA Nios II Nios II Nios II 2 1 Nios II Altera Corporation 2 1 2 1. Nios II Nios II Processor Core JTAG interface
LM837 Low Noise Quad Operational Amplifier (jp)
Low Noise Quad Operational Amplifier Literature Number: JAJSBB7 600 Low Noise Quad Operational Amplifier 2000 8 Converted to nat2000 DTD ds009047tl/h/9047 33020 19860602 10 V/ s ( ); 8 V/ s ( ) 25 MHz
AD8212: 高電圧の電流シャント・モニタ
7 V typ 7 0 V MSOP : 40 V+ V SENSE DC/DC BIAS CIRCUIT CURRENT COMPENSATION I OUT COM BIAS ALPHA 094-00 V PNP 0 7 V typ PNP PNP REV. A REVISION 007 Analog Devices, Inc. All rights reserved. 0-9 -- 0 40
HardCopy IIIデバイスの外部メモリ・インタフェース
7. HardCopy III HIII51007-1.0 Stratix III I/O HardCopy III I/O R3 R2 R SRAM RII+ RII SRAM RLRAM II R HardCopy III Stratix III LL elay- Locked Loop PLL Phase-Locked Loop On-Chip Termination HR 4 36 HardCopy
LM4663 2 Watt Stereo Class D Audio Pwr Amp w/Stereo Headphone Amplifier (jp)
2 Watt Stereo Class D Audio Power Amplifier with Stereo Headphone Amplifier Literature Number: JAJS693 Boomer 2006 4 A very minor text edit (typo). (MC) Converted to nat2000 DTD. Few edits on Table 1 and
Stratix IIIデバイスの外部メモリ・インタフェース
8. Stratix III SIII51008-1.1 Stratix III I/O R3 SRAM R2 SRAM R SRAM RII+ SRAM RII SRAM RLRAM II 400 MHz R Stratix III I/O On-Chip Termination OCT / HR 4 36 R ouble ata RateStratix III FPGA Stratix III
MAX9471/2 DS.J
19-0524; Rev 0; 5/06 * * ± PART TEMP RANGE PIN- PACKAGE TOP VIEW X2 X1 FSO/SCL FS1/SDA 16 17 18 19 20 + PD FS2 15 14 1 TUNE 2 13 VDD 12 VDD 11 GND MAX9471 VDDA 3 AGND 4 GND 5 CLK1 TQFN (5mm x 5mm) 10 9
HN58X2502/HN58X2504I
お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NE エレクトロニクス株式会社及び株式会社ルネサステクノロジが合併し 両社の全ての事業が当社に承継されております 従いまして 本資料中には旧社名での表記が残っておりますが 当社の資料として有効ですので ご理解の程宜しくお願い申し上げます ルネサスエレクトロニクスホームページ (http://www.renesas.com)
MSM514400E/EL
1 1,08,576-Word x -BiYNAMIC RAM : 2001 1 CMOS 1,08,576 2 CMOS 26/20 SOJ 26/20 TSOP L!"1,08,576!"5V 10%!" : TTL!" : TTL!" : 1,02 16ms 1,02 128ms L-!"!"CAS RAS RAS!"!" : 26/20 300mil SOJ (SOJ26/20-P-300-1.27)
ADC78H90 8-Channel, 500 kSPS, 12-Bit A/D Converter (jp)
8-Channel, 500 ksps, 12-Bit A/D Converter Literature Number: JAJSA63 8 500kSPS 12 A/D 8 12 CMOS A/D 500kSPS / AIN1 AIN8 8 SPI QSPI MICROWIRE DSP (AV DD ) 2.7V 5.25V (DV DD ) 2.7V AV DD 3V 1.5mW 5V 8.3mW
(Making the electronic circuit with use of micro-processor)
(Making the electronic circuit with use of micro-processor) 1055083 1 1 2 3 4 2L T = Vs T = 1 34000 2 = 58.824 5 4069 9V R1 1k Q1 NPN R2 1k
LM2940
1A 3 1A 3 0.5V 1V 1A 3V 1A 5V 30mA (V IN V OUT 3V) 2 (60V) * C Converted to nat2000 DTD updated with tape and reel with the new package name. SN Mil-Aero: Order Info table - moved J-15 part from WG row
A Responsive Processor for Parallel/Distributed Real-time Processing
E-mail: yamasaki@{ics.keio.ac.jp, etl.go.jp} http://www.ny.ics.keio.ac.jp etc. CPU) I/O I/O or Home Automation, Factory Automation, (SPARC) (SDRAM I/F, DMAC, PCI, USB, Timers/Counters, SIO, PIO, )
LM A High Efficiency Synchronous Switching Regulator (jp)
LM2651 LM2651 1.5A High Efficiency Synchronous Switching Regulator Literature Number: JAJS632 LM2651 1.5A 1.5A High Efficiency Switching Regulator 2651 LM Dongyan Zhou 19980610 LM2651 100:1 (1.5A 15mA)
ELCODIS.COM - ELECTRONIC COMPONENTS DISTRIBUTOR
IC : = 2 MHz Max 2 : : TSSOP-20 RJJ03D0873-0200 Rev.2.00 2008.07.01 VIN Vout + DC 5 V DC 5 V DC 5 V DC 5 V DC 5 V Vbias (DC 12 V) VCC OUT -A GND OUT -B CS RAMP R2A20121 RT SYNC SS FB (+) OUT -C DELAY -1
LMC555 CMOSタイマ
CMOS 555 CMOS (SOIC MSOP MDIP) micro SMD (8 micro SMD) LM555 2 1 LMCMOS TM CMOS 19850925 24100 ds008669 Converted to nat2000 DTD added title to the 2 avos on the first page Edited for 2001 Databook fixed
PIN S 5 K 0 K 1 K 2 K 3 K 4 V DD V 0 V 1 V 2 V SS OSC SEG 32 SEG 31 SEG 30 SEG 29 SEG 28 SEG 27 SEG 26 SEG 25 SEG 24 SEG 23 SEG 22 SEG 21 SEG 20 SEG 1
1/3 1/4 LCD NJU6535 LCD 1/3 1/4 LCD key(scan 6 Scan 5) CPU 3 4 42 41 1/3 126 1/4 164 LED NJU6535FH1 LCD 42 126 164 30 Scan 6 Scan 5 1/2, 1/3 LED 4 (,,, CS) (8 ) 4.5 ~ 5.5V 5.5V QFP64-H1 CMOS ( :P) -1-
実習内容 PIC18C242 のポート B に接続した LED を点滅させます ( 他の実習と同じ内容です ) 8 個の LED に表示される値が +3 ずつインクリメントします MPLAB を使って MPASM アセンブラのソース ファイルをアセンブルします MPLAB とソース ファイルは配布し
エンベデッド コントロール セミナー 2000 2000 Microchip Technology Incorporated. All Rights Reserved. S9002A Embedded Control Seminar 2000 1 実習内容 PIC18C242 のポート B に接続した LED を点滅させます ( 他の実習と同じ内容です ) 8 個の LED に表示される値が +3
#define HOUR 0x04 #define DAY 0x05 #define WEEKDAY 0x06 #define MONTH 0x07 #define YEAR 0x08 #define CKOUT 0x0D #define CTRLT 0x0E // CLKOUT // TIMER
****************** RTC clock with thermo & moisture meter by PIC12F1827 LCD display and internal clock By nobcha all right reserved Ver 1.0 10/14/2012 PIC16F1827 4bits paralell LCD PIC12F1827 + LCD + RTC8564NB
Introduction Purpose This training course demonstrates the use of the High-performance Embedded Workshop (HEW), a key tool for developing software for
Introduction Purpose This training course demonstrates the use of the High-performance Embedded Workshop (HEW), a key tool for developing software for embedded systems that use microcontrollers (MCUs)
LM4040.fm
SC70 SOT-23 2.048V 2.500V 3.000V 4.096V 5.000V 8.192V 10.000V -2.5 60 A - 10.0 100 A 15mA 25 0.1 (A ) 1.2V 2 LM4041 LM4041 Precision Micropower Shunt Voltage Reference 19911220 24180 DS011323 Converted
sm1ck.eps
DATA SHEET DS0 0 ASSP, IC,,,,, (VS =. V.%) (VCC = 0. V ) (VR =. V.%) ( ) DIP, SIP, SOP, (DIP-P-M0) (SIP-P-M0) (FPT-P-M0) (FRONT VIEW) (TOP VIEW) C T C T V S V REF V CC V CC V REF V S (DIP-P-M0) (FPT-P-M0)
OPA277/2277/4277 (2000.1)
R OPA OPA OPA OPA OPA OPA OPA OPA OPA µ µ ± ± µ OPA ±± ±± ± µ Offset Trim Offset Trim In OPA +In -Pin DIP, SO- Output NC OPA Out A In A +In A A D Out D In D +In D Out A In A +In A A B Out B In B +In B