LMC555 CMOSタイマ

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1 CMOS 555 CMOS (SOIC MSOP MDIP) micro SMD (8 micro SMD) LM LMCMOS TM CMOS ds Converted to nat2000 DTD added title to the 2 avos on the first page Edited for 2001 Databook fixed page 1 and 2 fixed block and connection diagrams and ordering information fixed elec.table V 1mW 3MHz 1.5V 5V TTL CMOS 10mA 50mA 8 MSOP 8 micro SMD CMOS LMCMOS TM National Semiconductor Corporation DS _JP 1

2 8-Pin SOIC, MSOP, MDIP Top View 8-Bump micro SMD Top View (Bump Side Down) 2

3 (Note 2 3) V Note: AN V V TRIG V RES V CTRL V THRESH 0.3V V S 0.3V V O V DIS I O I DIS MDIP (10 ) SOIC MSOP (60 ) (15 ) 15V 100 ma (Note 2 3) ( JA ) (Note 2) SO /W MSOP /W MDIP /W 8 micro SMD 220 /W 25 C MDIP-8 SO-8 MSOP mW 740mW 555mW 8 micro SMD 568mW (Note 1 2) T 25 RESET V S 3

4 (Note 1 2) ( ) T 25 RESET V S Note 1: Note 2: Note 3: Note 4: Note 5: GND IC IC AC DC (Typical) AN-450 micro-smd AN-1112 RESET 20 V S 2.0V Table 1 Test Circuit (Note 5) Maximum Frequency Test Circuit (Note 5) TABLE 1. Package Pinout Names vs. Pin Function 4

5 (Figure 1) (Trigger) 1/3V S V + Figure 3 RC Note: FIGURE 1. Monostable (One-Shot) t H 1.1R A C 2/3V S Figure 2 FIGURE 3. Time Delay Figure 4 (Trigger Threshold ) R A R B R B 2 V CC 5V TIME 0.1 ms/div. R A 9.1k C 0.01 F Top Trace: Input 5V/Div. Middle Trace: Output 5V/Div. Bottom Trace: Capacitor Voltage 2V/Div. FIGURE 2. Monostable Waveforms (Threshold) t H 20ns 400ns 10 s FIGURE 4. Astable (Variable Duty Cycle Oscillator) 1/3V S 2/3V S Figure 5 5

6 ( ) Figure 1 Figure 7 1/3 V CC 5V TIME 20 s/div. R A 3.9k R B 9k C 0.01 F Top Trace: Output 5V/Div. Bottom Trace: Capacitor Voltage 1V/Div. FIGURE 5. Astable Waveforms ( ) t (R A R B )C ( ) t (R B )C T t 1 t (R A 2R B )C V CC 5V TIME 20 s/div. R A 9.1k C 0.01 F FIGURE 7. Frequency Divider Waveforms Top Trace: Input 4V/Div. Middle Trace: Output 2V/Div. Bottom Trace: Capacitor 2V/Div. (Control) Figure 8 Figure 9 Figure 6 RC FIGURE 8. Pulse Width Modulator FIGURE 6. Free Running Frequency 6

7 ( ) V CC 5V TIME 0.2 ms/div. R A 9.1k C 0.01 F FIGURE 9. Pulse Width Modulator Waveforms Top Trace: Modulation 1V/Div. Middle Trace: Output 2V/Div. Bottom Trace: Capacitor 2V/Div. Figure 10 Figure 11 V CC 5V TIME 0.1 ms/div. R A 3.9 k R B 3 k C 0.01 F FIGURE 11. Pulse Position Modulator Waveforms 50 f 1/(1.4 R C C) Top Trace: Modulation Input 1V/Div. Bottom Trace: Output Voltage 2V/Div. FIGURE 10. Pulse Position Modulator FIGURE Duty Cycle Oscillator micro SMD Marking Orientation Top View 7

8 inches (millimeters) Molded Small Outline (SO) Package (M) NS Package Number M08A millimeters 8-Lead (0.118 Wide) Molded Mini Small Outline Package NS Package Number MUA08A 8

9 inches (millimeters) ( ) Molded Dual-in-line Package (N) NS Package Number N08E 9

10 millimeters ( ) Sn/37 Pb EUTECTIC 3. NSMD (Non-Solder Mask Defined) 4. A1 ( ) 5. XXX X1 X2 X3 6. JEDEC MO-211 VARIATION BC micro SMD Package NS Package Number BPA08EFB X X X

11 millimeters ( ) web ( packaging/) 3. NSMD (Non-Solder Mask Defined) 4. A1 ( ) 5. XXX X1 X2 X3 6. JEDEC MO-211 VARIATION BC 8-Bump micro SMD Package NS Package Number TPA08FGA X X X

12 CMOS (CEO) (GENERAL COUNSEL) a (b) National Semiconductor Copyright 2006 National Semiconductor Corporation / TEL.(03)

13 IMPORTANT NOTICE

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