( ) : 1997

Size: px
Start display at page:

Download "( ) : 1997"

Transcription

1 ( ) : 1997

2 CMOS FET AD-DA All Rights Reserved (c) Yoichi OKABE 2000-present. [ HTML ] [ PDF ] [ ] [ Web ] [ ] [ HTML ] [ PDF ] 1

3 n-mos FET p-mos FET p-mos c-mos SEP (NOT ) NAND NOR c-mos

4 LPF HPF BPF BSF AD AD

5 1 1.1 (electronic circuit) (device) 1.1 FET FET 1.1: 4

6 FET FET C 11 C 1K 10.1 C C (analog) (digital)

7 1.2: 1.3: ( ) 1mm 1µm A/D D/A 1.3 PCM ( ) 6

8 1.3 IC (integrated circuit) FET IC (monolithic IC) ( ) IC IC FET IC IC (hybrid IC) NOT AND OR IC 1.4 SSI (small scale integration) MSI (medium...) LSI (large...) VLSI (very large...) ULSI (ultra large...) ELSI (extra large...) cm 2 7

9 1.4: 8

10 2 2.1 n-mos FET FET FET (field effect transistor) (bipolar transistor) - 2.1: n-mos FET FET 2.1 FET (drain) (source) (gate) FET (negative) FET n-mos FET MOS FET (metal) (oxide) (semiconductor) FET (positive) p-mos FET p-mos FET n-mos FET C g Q = C g V gc = εlw V gc (2.1) t L W t V gc 9

11 Q f Q + Q f = εlw t Q f Q = εlw t V th V gc (2.2) (V gc V th ) (2.3) V ds v = µe (2.4) µ L E = V ds L (2.5) t = L v (2.6) Q I d = Q t = C g(v gc V th ) v L = µεw Lt (V gc V th )V ds (2.7) V gc V gc = (V gs + V gd )/2 = V gs V ds /2 I d = µεw Lt ( V gs V th V ) ds V ds (2.8) 2 V gs V th 0 V gd V th 0 I d V ds 2.2 V ds V gs V th ) - - V gs V ds I d V gs I d V ds I d -V ds I d -V ds - I d V ds 10

12 2.2: n-mos n-mos FET n-mos FET V ds V ds 0 V gs V th x V gd V th A = µεw Lt ( I d = A V gs V th V ) ds V ds : 0 V gs V th V ds 2 I d = 0 : 0 V gs V th (2.9) I d = A 2 (V gs V th ) 2 : V ds V gs V th (2.10)

13 2.10 d s I d I d V gd = V gs V ds V sd = V ds ( I d = A V gs V th V ) ds V ds : V ds V gs V th 0 (2.11) 2 I d = 0 : V ds V gs V th (2.12) I d = A 2 (V gs V th V ds ) 2 : 0 V gs V th (2.13) : n-mos 2.1 I d I d ( I d = A V gd V th V ) sd V : sd 0 V gd V th V sd (2.14) 2 I d = 0 : 0 V gd V th (2.15) I d = A 2 (V gd V th ) 2 : V sd V gd V th (2.16) 12

14 2.3 p-mos FET FET p-mos FET V ds /le0 I d I d < 0 A = µεw Lt (2.17) ( I d = A V gs V th V ) ds V : ds 0 V gs V th V ds (2.18) 2 I d = 0 : 0 V gs V th (2.19) I d = A 2 (V gs V th ) 2 : V ds V gs V th (2.20) V ds V ds > 0 ( I d = A V gs V th V ) ds V : ds V ds V gs V th 0 (2.21) 2 I d = 0 : V ds V gs V th (2.22) I d = A 2 (V gs V th V ds ) 2 : 0 V gs V th (2.23) : p-mos 2.4 FET npn pnp 2.5 npn (emitter) (collector) (base) 13

15 2.5: npn 2.6: V be V ce I c V ge 2.6 FET 1/100 14

16 3 3.1 NOT AND OR V gs I d I d 3.1 n-mos FET FET ( ) FET V dd V dd FET 3.2 V gs I d V ds FET V ds FET V dd RI d I d V ds FET V ds I d V ds 3.3 V gs V gs V ds I d : n-mos FET 15

17 3.2: Vgs 3.3: V gs 3.4: - 3.5: 16

18 3.6: V th V dd FET 10 V gs V ds FET I d FET 17

19 3.7: 3.8: FET FET - V gs V gs V gs FET FET I d V gs V gs V gs FET FET FET FET FET FET V gs FET - 18

20 3.9: n-mos FET = = NOT ( Inverter) n-mos p-mos p-mos FET p-mos FET FET FET n-mos FET p-mos FET R 19

21 3.10: p-mos FET 3.11: p-mos FET FET R FET c-mos 3.7 SEP

22 ( ) (sequential logic circuit) (combinational logic circuit) 4.2 (NOT ) FET 1 FET (NOT ) 4.2 n-mos 4.3 n-mos FET MOS - - (metal-oxide-semiconductor) FET - n-mos n (negative) n-mos : 21

23 4.2: n-mos (NOT ) 4.3: n-mos FET 4.4: p-mos FET 4.5: p-mos (NOT ) 22

24 4.6: c-mos (NOT ) 4.7: c-mos 4.4 FET p-mos FET p-mos FET p-mos FET p-mos 4.5 p-mos n-mos 0 1 FET 1 c-mos c- MOS c-mos 4.6 n-mos p-mos n-mos p-mos p-mos n-mos p-mos FET MOS c-mos (complimentary MOS) n-mos FET p-mos FET 4.7 V o FET n-mos FET n-mos FET V ds n-mos FET p-mos FET p-mos FET V ds V dd V o p-mos FET V dd I d FET FET 4.8 n-mos FET Vth n (a) n-mos FET (V dd 0) V dd (b) V dd /2 (c) (c) 23

25 4.8: c-mos 4.9: c-mos (d) V dd V dd V p th p-mos FET (0, 0) 4.9 FET n-mos p-mos V dd 0 V dd 0 V dd 0 c-mo S 4.3 NAND NOR NOT AND OR AND 1 1 OR 1 1 ON ON ON FET AND OR NAND NOR 4.10: c-mos 24

26 4.11: c-mos NAND 4.12: c-mos NOR c-mos NAND NOT 1 FET ON FET OFF NAND 1 ON OFF 4.11 n-mos FET p-mos FET 0 n-mos OFF p-mos ON 1 NOR 4.12 Buffer AND OR AND NAND OR NOR XOR 4.4 c-mos c-mos 0 (intrinsic delay) n- p-mos FET R c C g τ 0 = C g R c - FET τ 0 τ 0 = C g R c = L v = τ t (channel transit time) L2 µv ds = τ t (4.1) 25

27 (extrinsic delay) 0V V dd p-mos p-mos ( ) R c τ = CR c n-mos n-mos p-mos p-mos R c (n-mos p-mos ) C = fc g (4.2) τ = fτ 0 (4.3) n- p-mos FET C CVdd 2 /2 p-mos n-mos 0 CVdd 2 /2 V dd CV dd CVdd 2 CV dd 2 /2 CVdd 2 /2 p-mos f c P 0 = f c CV 2 dd/2 (4.4) C = fc g p P = pfp 0 (4.5) NAND NOR NAND NOR (fan in) n-mos p-mos 26

28 FET NAND NOR NAND NOR AND NOR NAND NAND ( fan out) FET f t n f f n = f t (4.6) fτ 0 τ t τ t = nfτ 0 (4.7) log n τ t = f τ 0 log f log f t (4.8) f f = e e log f t 2 3 f = 10 f = e AND OR NOT (truth table) 4.13 D (000) 1 (000) (0 0 0) S 0 S 0 = A B C (4.9) 27

29 4.13: NOT AND A A AND AND (A B C) (000) (A, B, C) (111) AND (111) 1 (A B C) (000) S 0 S 7 S 0 = A B C (4.10) S 1 = A B C (4.11) S 2 = A B C (4.12) S 3 = A B C (4.13) S 4 = A B C (4.14) S 5 = A B C (4.15) S 6 = A B C (4.16) S 7 = A B C (4.17) D (001), (010), (100), (111) 1 1 OR D = S 1 + S 2 + S 4 + S 7 = A B C + A B C + A B C + A B C (4.18) NOT AND OR OR + AND + AND AND OR E = S 3 + S 5 + S 6 + S 7 = A B C + A B C + A B C + A B C (4.19) 0 1 NOT AND OR AND OR NAND NOR S 0 S 7 28

30 4.14: NAND-NAND 4.15: NAND-NAND T 0 T 7 T 0 = A B C (4.20) T 1 = A B C (4.21) T 2 = A B C (4.22) T 3 = A B C (4.23) T 4 = A B C (4.24) T 5 = A B C (4.25) T 6 = A B C (4.26) T 7 = A B C (4.27) D = T 1 + T 2 + T 4 + T 7 D = T 1 T 2 T 4 T 7 NOT NAND OR(NOT) NAND De Morgan D 0 OR OR 1 1 OR 0 0 T 1 T 7 T 1 T 7 T 1 T 7 1 D 0 1 AND 1 NAND 0 T 1 T NAND 4.13 NAND 1 A B C 29

31 4.16: D Flip Flop 0 A B C NAND 1 NAND NAND-NAND NAND NOR S 0 = A + B + C S 1 = A + B + C S 2 = A + B + C S 3 = A + B + C S 4 = A + B + C S 5 = A + B + C S 6 = A + B + C S 7 = A + B + C (4.28) de Morgan S 0 OR (000) 0 NOR 1 D S 0 S 3 S 5 S 6 0 D = S 0 + S 3 + S 5 + S 6 (4.29) NOR-NOR 0 NOR-NOR NAND-NAND (inversion logic) 4.6 ( ) 4.16 FET FET t 0 t 1 A B B t 1 B A t 1 t 2 B C 30

32 D t 2 C B D A B D A t 0 t 1 B IC MOS-IC IC MOS-IC [1.4] FET C-MOS 35 IC ( 13) IC 1cm 2 31

33 1 IC IC 35 IC IC IC IC IC 32

34 5 5.1 FET IC Operational Amplifier FET V in R 1 R 2 I = V i /(R 1 + R 2 ) V o = R 1 I = V i R 1 /(R 1 + R 2 ) 5.2 R 1 R 1 + R 2 R 3 R 3 + R 4 5.1: 33

35 5.2: + 5.3: MΩ 1Ω 100, ± 15V

36 + 5.4: V V + A V o V o = A(V + V ) = AV (5.1) V V o V V = R f V i + R i V o R i + R f (5.2) V V i V o V 1/A A, R f /R i V o = 1 + (1 + R f /R i )/A V i (5.3) V o = R f R i V i (5.4) A (inverter) A 5.2 A V o V = V + (5.5) (imaginary short) V + V 0V 5.2 R i V i /R i R f R f V i /R i V o = R f V i /R i R f /R i 35

37 5.5: 5.5 V i V o V R i : R f 0 ±15V V i V o 15V 15V V o 15V V V i +15V A A G i /G f /1.01 = 99 1% A A 1% 10 4 A A 1% 2% A A % R i R f? (1Ω ) (10MΩ ) 100Ω 100kΩ V o 36

38 Q V Q = CV I I = C, dv/dt V = V 0 sin ωt I = ωcv cos ωt I 0 V 0 I 0 /V 0 = ωc ω I 0 V 0 22 I 0 V 0 Φ I Φ = LI V V = L, di/dt V 0 /I 0 = ωl HPF, high pass filter 23???? 24 (LPF, low pass filter ) (BPF band pass filter ) FET V I V = A 0 + A 1 I + A 2 I 2 + A 3 I

39 I 2 I 3 I 2 I I = I 0 cos ωt I o cos ωt I 0 sin ωt I = I1 2 cos 2 ωt = 1 2 (I2 1 + I1 2 cos 2ωt) I I = I 1 cos ω 1 t + I 1 cos(ω θ) I 2 = 1 2 I I2 2 )+ 1 2 I2 1 cos 2ω 1 t+ 1 2 I2 2 cos 2ω 2 t+i 1 I 2 cos[(ω 1 ω 2 )t+θ)]+i 1 I 2 cos[(ω 1 +ω 2 )t+θ)] 3 4 ω 1 ω nω 1 + mω 2 n m 26?? V in V in V out V in V in V in V out V out = 0 V out?? V in 27???? V in V out V in V out V out 5.8? 28 29?? B A A V in B V out 29?????? f 0 (V out /V in ) 38

40 f = f B A A f 0 1 B A f 0 29?? V 0 f 0 V 0 FET FET 18?? I b I c I in = 0 I b I c 8?? 0.6V 4V 34kΩ (4-0.6)V/34kΩ =0.1mA I b ( ) Ic I b = 0.1mA I c V ce I b = 0.1mA 100Ω 100I c V V ce = 4 100I c V?? I b = 0.1mA I c = 10mA V ce = 3V 0.1mA I in I c I in = 0.1mA I b = 0.2mA I c 10mA 20mA I in 0.1mA I c mA β 100Ω 19 I b V be V in 0.6V I in I in β I c 100Ω (V out /V in ) 0.6V V in 3V V out 39

41 FET FET V gs V in ( ) V dd R ( ) V in V ds V th FET

42 6 6.1 (low pass filter, LPF) (high pass filter, HPF) (band pass filter, BPF) (band rejection filter, BRF) 6.2 LPF LPF ω = 1 LPF LPF LPF RC R C C C C x y y = CRs x (6.1) ω s = jω (c.c. ) y ( 2 1 = x 1 + jcrω ) c.c. = (CRω) 2 (6.2) y 1 = x 1 + (CRω) 2 (6.3) ω = 0 100% ω ω = 1/CR 1/ 2 0 LPF s ω y = 1 s n x (6.4) 41

43 s y 1 = x ω 2 n (6.5) ω 2 s s = jω ±ω s 6.3 (Butterworth) x n n x = 1 1 n ω < 1 100% ω > 1 0% x = 1 y 1 = x 1 + ω 2n (6.6) s n = 2 n y 2 1 = x 1 + ω 4 (6.7) jω jω 0 jω α i (jω α i ) y 2 1 = x 1 + ω 4 = 1 (jω + (1 + j)/ 2)(jω + (1 j)/ 2)(jω (1 + j)/ 2)(jω (1 j)/ 2) ( ) 1 = (jω + (1 + j)/ 2)(jω + (1 j)/ (c.c.) (6.8) 2) jω s s y = 1 (s + (1 + j)/ 2)(s + (1 j)/ 2) x = 1 s 2 + 2s + 1 x (6.9) (jω α i ) 4 α i L C R 42

44 6.7 ω s/j s s s = 0 1 s k = sin (2k 1)π 2n + j cos (2k 1)π 2n k = 1, 2,, 2n (6.10) 1 2n 6.4 (Chebyshev) cos(n cos 1 ω) ω 1 C n (ω) = cosh(n cosh 1 ω) ω > 1 (6.11) ω <= 1 1 n (Lissajou) ω = 1 1 ω = 1 ±1 pm1 n 1 n ω > 1 ± ω C 1 (ω) = ω (6.12) C 2 (ω) = 2ω 2 1 (6.13) C 3 (ω) = 4ω 3 3ω (6.14). (6.15) C n (ω) = 2ωC n 1 (ω) C n 2 (ω) (6.16) y 1 = (6.17) x 1 + ɛ2 C n (ω) 2 ω 1 C n (ω) % 1/ 1 + ɛ 2 ɛ ω > 1 1/ω n 43

45 s s k = sinh ( ) ( ) 1 1 (2k 1)π 1 1 (2k 1)π n sinh 1 sin + j cosh ɛ 2n n sinh 1 cos ɛ 2n (6.18) 6.10 n ɛ 6.5 HPF BPF BSF ω = 1 LPF ω c LPF s s s/ω c LPF K a 0 b 1 s + a 0 s 2 + 2a 1 s + b 2 1 b n s 2 + 2a n s + b 2 n (6.19) K 1 1 a < b s = 0 1 s 0 ω c HPF ( ) s ω c /s HPF K s s 2 s + a 0 s 2 + 2a 1 s + b 2 1 s 2 + 2a n s + b 2 n s 2 (6.20) BPF ( ) ω l ω u LPF ω = 1 ω = 1 BPF -1 ω l 1 ω u ω = Aω B ω (6.21) ω LPF 1 = Aω l B ω l 1 = Aω u B ω u (6.22) (6.23) A B 1 A = ω u ω l (6.24) B = ω uω l ω u ω l (6.25) 44

46 A B ω s/j s LPF s As + B/s BPF 2a 1 s 2a n s K s 2 + 2a 1 s + b 2 1 s 2 + 2a n s + b 2 n (6.26) BSF ( ) s s 1/(As + B/s) BSF s 2 + b 2 1 s 2 ( ) + b n 2a 1 s 2a n s K s 2 + 2a 1 s + b 2 1 s 2 + 2a n s + b 2 = K 1 n s 2 + 2a 1 s + b 2 1 s 2 + 2a n s + b 2 n (6.27) 6.6 L C R L C R s Y f Y f V i Y i V Y i - + Y g V o 6.1: 6.1 (MFB: multiple feedback type active filter) 0 Y i V i + Y f V o = (Y i + Y f + Y g + Y i )V (6.28) Y i V + Y f V o = 0 (6.29) Y i Y i (Y i + Y f + Y g + Y i )Y f + Y i Y f (6.30) Y i Y g = 0 Y i Y f + Y f (6.31) 45

47 K a s + a : Y i, Y g = 0, Y f = Cs, Y f = G = ac, Y i = KG (6.32) K s s + a : Y i, Y g = 0, Y f = Cs, Y f = G = ac, Y i = KCs (6.33) b 2 s 2 + 2as + b 2 : Y f = Cs, Y f = G = b2 a C, Y i = KG, Y i = (K + 1)G, ( ) 2 b Y g = (K + 1) Cs (6.34) a Ks 2 s 2 + 2as + b 2 : Y i = Y i = Cs, Y f = 1 K Cs, Y a f = K + 1/2 C, Y g = b2 (K + 1/2) C (6.35) ak LPF HPF BPF BSF BPF BSF = 1 BP F V i BPF V i 6.7 AD (oversampling method) AD (AD convertor) 12 bit ( ) 1 bit AD (AD conversion) bit AD (over-sampling) 1 bit AD Σ AD x + - y Integrator S/H 6.2: AD (delta modulation) 6.2 D (Sample/Hold) 46

48 ± / 1/ input output sum :

49 1400 power : x + - Integrator y S/H 6.5:

50 25 input output sum : power : 49

51 6.7.3 AD AD (sigma-delta AD convertor) AD AD AD AD AD bit (oversampling method) 12 bit 2 12 s 50

52 band stop filter, BSF, 41, 41 AD conversion (AD ), 46 AD convertor (AD ), 46 AD (AD conversion), 46 AD (AD convertor), 46 band pass filter, BPF ( ), 41 band rejection filter, BRF ( ), 41 delta modulation ( ), 46 high pass filter, HPF ( ), 41 low pass filter, LPF ( ), 41 over-sampling ( ), 46 oversampling method ( ), 46, 50 sigma-delta AD convertor ( AD ), 50 (over-sampling), 46 (oversampling method), 46, 50 (high pass filter, HPF), 41 AD (sigma-delta AD convertor), 50 (band rejection filter, BRF), 41 (band pass filter, BPF), 41 (low pass filter, LPF), 41 (delta modulation), 46 51

MOSFET 6-2 CMOS 6-2 TTL Transistor Transistor Logic ECL Emitter Coupled Logic I2L Integrated

MOSFET 6-2 CMOS 6-2 TTL Transistor Transistor Logic ECL Emitter Coupled Logic I2L Integrated 1 -- 7 6 2011 11 1 6-1 MOSFET 6-2 CMOS 6-2 TTL Transistor Transistor Logic ECL Emitter Coupled Logic I2L Integrated Injection Logic 6-3 CMOS CMOS NAND NOR CMOS 6-4 6-5 6-1 6-2 CMOS 6-3 6-4 6-5 c 2011 1/(33)

More information

MOS FET c /(17)

MOS FET c /(17) 1 -- 7 1 2008 9 MOS FT 1-1 1-2 1-3 1-4 c 2011 1/(17) 1 -- 7 -- 1 1--1 2008 9 1 1 1 1(a) VVS: Voltage ontrolled Voltage Source v in µ µ µ 1 µ 1 vin 1 + - v in 2 2 1 1 (a) VVS( ) (b) S( ) i in i in 2 2 1

More information

sikepuri.dvi

sikepuri.dvi 2009 2 2 2. 2.. F(s) G(s) H(s) G(s) F(s) H(s) F(s),G(s) H(s) : V (s) Z(s)I(s) I(s) Y (s)v (s) Z(s): Y (s): 2: ( ( V V 2 I I 2 ) ( ) ( Z Z 2 Z 2 Z 22 ) ( ) ( Y Y 2 Y 2 Y 22 ( ) ( ) Z Z 2 Y Y 2 : : Z 2 Z

More information

main.dvi

main.dvi 5 IIR IIR z 5.1 5.1.1 1. 2. IIR(Infinite Impulse Response) FIR(Finite Impulse Response) 3. 4. 5. 5.1.2 IIR FIR 5.1 5.1 5.2 104 5. IIR 5.1 IIR FIR IIR FIR H(z) = a 0 +a 1 z 1 +a 2 z 2 1+b 1 z 1 +b 2 z 2

More information

B1 Ver ( ), SPICE.,,,,. * : student : jikken. [ ] ( TarouOsaka). (, ) 1 SPICE ( SPICE. *1 OrCAD

B1 Ver ( ), SPICE.,,,,. * : student : jikken. [ ] ( TarouOsaka). (, ) 1 SPICE ( SPICE. *1 OrCAD B1 er. 3.05 (2019.03.27), SPICE.,,,,. * 1 1. 1. 1 1.. 2. : student : jikken. [ ] ( TarouOsaka). (, ) 1 SPICE ( SPICE. *1 OrCAD https://www.orcad.com/jp/resources/orcad-downloads.. 1 2. SPICE 1. SPICE Windows

More information

? FPGA FPGA FPGA : : : ? ( ) (FFT) ( ) (Localization) ? : 0. 1 2 3 0. 4 5 6 7 3 8 6 1 5 4 9 2 0. 0 5 6 0 8 8 ( ) ? : LU Ax = b LU : Ax = 211 410 221 x 1 x 2 x 3 = 1 0 0 21 1 2 1 0 0 1 2 x = LUx = b 1 31

More information

電気系技術資料1.PDF

電気系技術資料1.PDF FET RS232C RS422 RS485 USB EL01010 EL01020 EL01030 EL01040 EL01050 EL02010 EL02020 EL02030 EL02040 EL02050 EL02060 EL02070 EL02080 EL03010 EL03020 EL04010 EL05010 EL05020 EL05030 EL05040 EL05050 EL05110

More information

2014.3.10 @stu.hirosaki-u.ac.jp 1 1 1.1 2 3 ( 1) x ( ) 0 1 ( 2)NOT 0 NOT 1 1 NOT 0 ( 3)AND 1 AND 1 3 AND 0 ( 4)OR 0 OR 0 3 OR 1 0 1 x NOT x x AND x x OR x + 1 1 0 x x 1 x 0 x 0 x 1 1.2 n ( ) 1 ( ) n x

More information

V s d d 2 d n d n 2 n R 2 n V s q n 2 n Output q 2 q Decoder 2 R 2 2R 2R 2R 2R A R R R 2R A A n A n 2R R f R (a) 0 (b) 7.4 D-A (a) (b) FET n H ON p H

V s d d 2 d n d n 2 n R 2 n V s q n 2 n Output q 2 q Decoder 2 R 2 2R 2R 2R 2R A R R R 2R A A n A n 2R R f R (a) 0 (b) 7.4 D-A (a) (b) FET n H ON p H 3 ( ) 208 2 3 7.5 A-D/D-A D-A/A-D A-D/D-A CCD D () ( ) A-D (ADC) D-A (DAC) LSI 7.5. - 7.4(a) n 2 n V S 2 n R ( ),, 2 n i i i V S /2 n MOS i V S /2 n 8 256 MOS 7.4(b) DA n R n 2 2R n MOS 2R R 2R 2R OP OP

More information

(a) 4 1. A v = / 2. A i = / 3. A p = A v A i = ( )/( ) 4. Z i = / 5. Z o = /( ) = 0 2 1

(a) 4 1. A v = / 2. A i = / 3. A p = A v A i = ( )/( ) 4. Z i = / 5. Z o = /( ) = 0 2 1 http://www.ieicehbkb.org/ 1 7 2 1 7 2 2009 2 21 1 1 3 22 23 24 25 2 26 21 22 23 24 25 26 c 2011 1/(22) http://www.ieicehbkb.org/ 1 7 2 1 7 2 21 2009 2 1 1 3 1 211 2 1(a) 4 1. A v = / 2. A i = / 3. A p

More information

#A A A F, F d F P + F P = d P F, F y P F F x A.1 ( α, 0), (α, 0) α > 0) (x, y) (x + α) 2 + y 2, (x α) 2 + y 2 d (x + α)2 + y 2 + (x α) 2 + y 2 =

#A A A F, F d F P + F P = d P F, F y P F F x A.1 ( α, 0), (α, 0) α > 0) (x, y) (x + α) 2 + y 2, (x α) 2 + y 2 d (x + α)2 + y 2 + (x α) 2 + y 2 = #A A A. F, F d F P + F P = d P F, F P F F A. α, 0, α, 0 α > 0, + α +, α + d + α + + α + = d d F, F 0 < α < d + α + = d α + + α + = d d α + + α + d α + = d 4 4d α + = d 4 8d + 6 http://mth.cs.kitmi-it.c.jp/

More information

AD8212: 高電圧の電流シャント・モニタ

AD8212: 高電圧の電流シャント・モニタ 7 V typ 7 0 V MSOP : 40 V+ V SENSE DC/DC BIAS CIRCUIT CURRENT COMPENSATION I OUT COM BIAS ALPHA 094-00 V PNP 0 7 V typ PNP PNP REV. A REVISION 007 Analog Devices, Inc. All rights reserved. 0-9 -- 0 40

More information

[ ] [ ] [ ] [ ] [ ] [ ] ADC

[ ] [ ] [ ] [ ] [ ] [ ] ADC [ ] [ ] [ ] [ ] [ ] [ ] ADC BS1 m1 PMT m2 BS2 PMT1 PMT ADC PMT2 α PMT α α = n ω n n Pn TMath::Poisson(x,[0]) 0.35 0.3 0.25 0.2 0.15 λ 1.5 ω n 2 = ( α 2 ) n n! e α 2 α 2 = λ = λn n! e λ Poisson Pn 0.1

More information

untitled

untitled 1 SS 2 2 (DS) 3 2.1 DS................................ 3 2.2 DS................................ 4 2.3.................................. 4 2.4 (channel papacity)............................ 6 2.5........................................

More information

1 3 1.1.......................... 3 1............................... 3 1.3....................... 5 1.4.......................... 6 1.5........................ 7 8.1......................... 8..............................

More information

0 s T (s) /CR () v 2 /v v 2 v = T (jω) = + jωcr (2) = + (ωcr) 2 ω v R=Ω C=F (b) db db( ) v 2 20 log 0 [db] (3) v R v C v 2 (a) ω (b) : v o v o =

0 s T (s) /CR () v 2 /v v 2 v = T (jω) = + jωcr (2) = + (ωcr) 2 ω v R=Ω C=F (b) db db( ) v 2 20 log 0 [db] (3) v R v C v 2 (a) ω (b) : v o v o = RC LC RC 5 2 RC 2 2. /sc sl ( ) s = jω j j ω [rad/s] : C L R sc sl R 2.2 T (s) ( T (s) = = /CR ) + scr s + /CR () 0 s T (s) /CR () v 2 /v v 2 v = T (jω) = + jωcr (2) = + (ωcr) 2 ω v R=Ω C=F (b) db db(

More information

<4D F736F F D B B BB2D834A836F815B82D082C88C602E646F63>

<4D F736F F D B B BB2D834A836F815B82D082C88C602E646F63> 信号処理の基礎 サンプルページ この本の定価 判型などは, 以下の URL からご覧いただけます. http://www.morikita.co.jp/books/mid/081051 このサンプルページの内容は, 初版 1 刷発行時のものです. i AI ii z / 2 3 4 5 6 7 7 z 8 8 iii 2013 3 iv 1 1 1.1... 1 1.2... 2 2 4 2.1...

More information

devicemondai

devicemondai c 2019 i 3 (1) q V I T ε 0 k h c n p (2) T 300 K (3) A ii c 2019 i 1 1 2 13 3 30 4 53 5 78 6 89 7 101 8 112 9 116 A 131 B 132 c 2019 1 1 300 K 1.1 1.5 V 1.1 qv = 1.60 10 19 C 1.5 V = 2.4 10 19 J (1.1)

More information

MOSFET HiSIM HiSIM2 1

MOSFET HiSIM HiSIM2 1 MOSFET 2007 11 19 HiSIM HiSIM2 1 p/n Junction Shockley - - on-quasi-static - - - Y- HiSIM2 2 Wilson E f E c E g E v Bandgap: E g Fermi Level: E f HiSIM2 3 a Si 1s 2s 2p 3s 3p HiSIM2 4 Fermi-Dirac Distribution

More information

VLSI工学

VLSI工学 2008//5/ () 2008//5/ () 2 () http://ssc.pe.titech.ac.jp 2008//5/ () 3!! A (WCDMA/GSM) DD DoCoMo 905iP905i 2008//5/ () 4 minisd P900i SemiConsult SDRAM, MPEG4 UIMIrDA LCD/ AF ADC/DAC IC CCD C-CPUA-CPU DSPSRAM

More information

(4.15a) Hurwitz (4.15a) {a j } (s ) {a j } n n Hurwitz a n 1 a n 3 a n 5 a n a n 2 a n 4 a n 1 a n 3 H = a n a n 2. (4.16)..... a Hurwitz H i H i i H

(4.15a) Hurwitz (4.15a) {a j } (s ) {a j } n n Hurwitz a n 1 a n 3 a n 5 a n a n 2 a n 4 a n 1 a n 3 H = a n a n 2. (4.16)..... a Hurwitz H i H i i H 6 ( ) 218 1 28 4.2.6 4.1 u(t) w(t) K w(t) = Ku(t τ) (4.1) τ Ξ(iω) = exp[ α(ω) iβ(ω)] (4.11) (4.1) exp[ α(ω) iβ(ω)] = K exp( iωτ) (4.12) α(ω) = ln(k), β(ω) = ωτ (4.13) dϕ/dω f T 4.3 ( ) OP-amp Nyquist Hurwitz

More information

untitled

untitled 1 CMOS 0.35um CMOS, 3V CMOS 2 RF CMOS RF CMOS RF CMOS RFCMOS (ADC Fabless 3 RF CMOS 1990 Abidi (UCLA): Fabless RF CMOS CMOS 90% 4 5 f T [GHz] 450 400 350 300 250 200 150 Technology loadmap L[nm] f T [GHz]

More information

1 7 ω ω ω 7.1 0, ( ) Q, 7.2 ( Q ) 7.1 ω Z = R +jx Z 1/ Z 7.2 ω 7.2 Abs. admittance (x10-3 S) RLC Series Circuit Y R = 20 Ω L = 100

1 7 ω ω ω 7.1 0, ( ) Q, 7.2 ( Q ) 7.1 ω Z = R +jx Z 1/ Z 7.2 ω 7.2 Abs. admittance (x10-3 S) RLC Series Circuit Y R = 20 Ω L = 100 7 7., ) Q, 7. Q ) 7. Z = R +jx Z / Z 7. 7. Abs. admittance x -3 S) 5 4 3 R Series ircuit Y R = Ω = mh = uf Q = 5 5 5 V) Z = R + jx 7. Z 7. ) R = Ω = mh = µf ) 7 V) R Z s = R + j ) 7.3 R =. 7.4) ) f = π.

More information

TOS7200 CD-ROM DUT PC 1.0X p.15 NEMA Vac/10 A [85-AA-0003] m : CEE7/7 : 250Vac/10 A [85-AA-0005] : GB1002 : 250Vac/10A [ ] 2016

TOS7200 CD-ROM DUT PC 1.0X p.15 NEMA Vac/10 A [85-AA-0003] m : CEE7/7 : 250Vac/10 A [85-AA-0005] : GB1002 : 250Vac/10A [ ] 2016 No. IB028901 Nov. 2016 1. 11 TOS7200 2. 14 3. 19 4. 23 5. 39 6. 49 7. 51 TOS7200 CD-ROM DUT PC 1.0X p.15 NEMA5-15 125 Vac/10 A [85-AA-0003] 1 2.5 m : CEE7/7 : 250Vac/10 A [85-AA-0005] : GB1002 : 250Vac/10A

More information

13 2 9

13 2 9 13 9 1 1.1 MOS ASIC 1.1..3.4.5.6.7 3 p 3.1 p 3. 4 MOS 4.1 MOS 4. p MOS 4.3 5 CMOS NAND NOR 5.1 5. CMOS 5.3 CMOS NAND 5.4 CMOS NOR 5.5 .1.1 伝導帯 E C 禁制帯 E g E g E v 価電子帯 図.1 半導体のエネルギー帯. 5 4 伝導帯 E C 伝導電子

More information

128 3 II S 1, S 2 Φ 1, Φ 2 Φ 1 = { B( r) n( r)}ds S 1 Φ 2 = { B( r) n( r)}ds (3.3) S 2 S S 1 +S 2 { B( r) n( r)}ds = 0 (3.4) S 1, S 2 { B( r) n( r)}ds

128 3 II S 1, S 2 Φ 1, Φ 2 Φ 1 = { B( r) n( r)}ds S 1 Φ 2 = { B( r) n( r)}ds (3.3) S 2 S S 1 +S 2 { B( r) n( r)}ds = 0 (3.4) S 1, S 2 { B( r) n( r)}ds 127 3 II 3.1 3.1.1 Φ(t) ϕ em = dφ dt (3.1) B( r) Φ = { B( r) n( r)}ds (3.2) S S n( r) Φ 128 3 II S 1, S 2 Φ 1, Φ 2 Φ 1 = { B( r) n( r)}ds S 1 Φ 2 = { B( r) n( r)}ds (3.3) S 2 S S 1 +S 2 { B( r) n( r)}ds

More information

K E N Z U 01 7 16 HP M. 1 1 4 1.1 3.......................... 4 1.................................... 4 1..1..................................... 4 1...................................... 5................................

More information

Chap9.dvi

Chap9.dvi .,. f(),, f(),,.,. () lim 2 +3 2 9 (2) lim 3 3 2 9 (4) lim ( ) 2 3 +3 (5) lim 2 9 (6) lim + (7) lim (8) lim (9) lim (0) lim 2 3 + 3 9 2 2 +3 () lim sin 2 sin 2 (2) lim +3 () lim 2 2 9 = 5 5 = 3 (2) lim

More information

PowerPoint プレゼンテーション

PowerPoint プレゼンテーション () 増幅回路の周波数特性 Frequency characteristic of amplifier circuit (2) 増幅回路の周波数特性 Frequency characteristic of amplifier circuit MOS トランジスタの高周波モデル High-frequency model for MOS FET ゲート酸化膜は薄いので G-S, G-D 間に静電容量が生じる

More information

35

35 D: 0.BUN 7 8 4 B5 6 36 6....................................... 36 6.................................... 37 6.3................................... 38 6.3....................................... 38 6.4..........................................

More information

c y /2 ddy = = 2π sin θ /2 dθd /2 [ ] 2π cos θ d = log 2 + a 2 d = log 2 + a 2 = log 2 + a a 2 d d + 2 = l

c y /2 ddy = = 2π sin θ /2 dθd /2 [ ] 2π cos θ d = log 2 + a 2 d = log 2 + a 2 = log 2 + a a 2 d d + 2 = l c 28. 2, y 2, θ = cos θ y = sin θ 2 3, y, 3, θ, ϕ = sin θ cos ϕ 3 y = sin θ sin ϕ 4 = cos θ 5.2 2 e, e y 2 e, e θ e = cos θ e sin θ e θ 6 e y = sin θ e + cos θ e θ 7.3 sgn sgn = = { = + > 2 < 8.4 a b 2

More information

LM358

LM358 LM358 2 DC LM358 5V DC 15V DC micro SMD (8 micro SMD) LM358 LM2904 LM258 LM158 20000801 19870224 33020 23900 11800 2002 3 ds007787 Converted to nat2000 DTD added avo -23 to the first page Edited for 2001

More information

2 0.1 Introduction NMR 70% 1/2

2 0.1 Introduction NMR 70% 1/2 Y. Kondo 2010 1 22 2 0.1 Introduction NMR 70% 1/2 3 0.1 Introduction......................... 2 1 7 1.1.................... 7 1.2............................ 11 1.3................... 12 1.4..........................

More information

高速データ変換

高速データ変換 Application Report JAJA206 V+ R 5 V BIAS Q 6 Q R R 2 Q 2 Q 4 R 4 R 3 Q 3 V BIAS2 Q 5 R 6 V Ω Q V GS + R Q 4 V+ Q 2 Q 3 + V BE V R 2 Q 5 R Op Amp + Q 6 V BE R 3 Q 7 R 4 R 2 A A 2 Buffer 2 ± Ω Ω R G V+ Q.4.2

More information

M51995AP/AFP データシート

M51995AP/AFP データシート お客様各位 カタログ等資料中の旧社名の扱いについて 21 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジが合併し 両社の全ての事業が当社に承継されております 従いまして 本資料中には旧社名での表記が残っておりますが 当社の資料として有効ですので ご理解の程宜しくお願い申し上げます ルネサスエレクトロニクスホームページ (http://www.renesas.com)

More information

[ ] 0.1 lim x 0 e 3x 1 x IC ( 11) ( s114901) 0.2 (1) y = e 2x (x 2 + 1) (2) y = x/(x 2 + 1) 0.3 dx (1) 1 4x 2 (2) e x sin 2xdx (3) sin 2 xdx ( 11) ( s

[ ] 0.1 lim x 0 e 3x 1 x IC ( 11) ( s114901) 0.2 (1) y = e 2x (x 2 + 1) (2) y = x/(x 2 + 1) 0.3 dx (1) 1 4x 2 (2) e x sin 2xdx (3) sin 2 xdx ( 11) ( s [ ]. lim e 3 IC ) s49). y = e + ) ) y = / + ).3 d 4 ) e sin d 3) sin d ) s49) s493).4 z = y z z y s494).5 + y = 4 =.6 s495) dy = 3e ) d dy d = y s496).7 lim ) lim e s49).8 y = e sin ) y = sin e 3) y =

More information

( ) e + e ( ) ( ) e + e () ( ) e e Τ ( ) e e ( ) ( ) () () ( ) ( ) ( ) ( )

( ) e + e ( ) ( ) e + e () ( ) e e Τ ( ) e e ( ) ( ) () () ( ) ( ) ( ) ( ) n n (n) (n) (n) (n) n n ( n) n n n n n en1, en ( n) nen1 + nen nen1, nen ( ) e + e ( ) ( ) e + e () ( ) e e Τ ( ) e e ( ) ( ) () () ( ) ( ) ( ) ( ) ( n) Τ n n n ( n) n + n ( n) (n) n + n n n n n n n n

More information

1 1 3 ABCD ABD AC BD E E BD 1 : 2 (1) AB = AD =, AB AD = (2) AE = AB + (3) A F AD AE 2 = AF = AB + AD AF AE = t AC = t AE AC FC = t = (4) ABD ABCD 1 1

1 1 3 ABCD ABD AC BD E E BD 1 : 2 (1) AB = AD =, AB AD = (2) AE = AB + (3) A F AD AE 2 = AF = AB + AD AF AE = t AC = t AE AC FC = t = (4) ABD ABCD 1 1 ABCD ABD AC BD E E BD : () AB = AD =, AB AD = () AE = AB + () A F AD AE = AF = AB + AD AF AE = t AC = t AE AC FC = t = (4) ABD ABCD AB + AD AB + 7 9 AD AB + AD AB + 9 7 4 9 AD () AB sin π = AB = ABD AD

More information

K E N Z U 2012 7 16 HP M. 1 1 4 1.1 3.......................... 4 1.2................................... 4 1.2.1..................................... 4 1.2.2.................................... 5................................

More information

A = A x x + A y y + A, B = B x x + B y y + B, C = C x x + C y y + C..6 x y A B C = A x x + A y y + A B x B y B C x C y C { B = A x x + A y y + A y B B

A = A x x + A y y + A, B = B x x + B y y + B, C = C x x + C y y + C..6 x y A B C = A x x + A y y + A B x B y B C x C y C { B = A x x + A y y + A y B B 9 7 A = A x x + A y y + A, B = B x x + B y y + B, C = C x x + C y y + C..6 x y A B C = A x x + A y y + A B x B y B C x C y C { B = A x x + A y y + A y B B x x B } B C y C y + x B y C x C C x C y B = A

More information

さくらの個別指導 ( さくら教育研究所 ) A a 1 a 2 a 3 a n {a n } a 1 a n n n 1 n n 0 a n = 1 n 1 n n O n {a n } n a n α {a n } α {a

さくらの個別指導 ( さくら教育研究所 ) A a 1 a 2 a 3 a n {a n } a 1 a n n n 1 n n 0 a n = 1 n 1 n n O n {a n } n a n α {a n } α {a ... A a a a 3 a n {a n } a a n n 3 n n n 0 a n = n n n O 3 4 5 6 n {a n } n a n α {a n } α {a n } α α {a n } a n n a n α a n = α n n 0 n = 0 3 4. ()..0.00 + (0.) n () 0. 0.0 0.00 ( 0.) n 0 0 c c c c c

More information

1 (Berry,1975) 2-6 p (S πr 2 )p πr 2 p 2πRγ p p = 2γ R (2.5).1-1 : : : : ( ).2 α, β α, β () X S = X X α X β (.1) 1 2

1 (Berry,1975) 2-6 p (S πr 2 )p πr 2 p 2πRγ p p = 2γ R (2.5).1-1 : : : : ( ).2 α, β α, β () X S = X X α X β (.1) 1 2 2005 9/8-11 2 2.2 ( 2-5) γ ( ) γ cos θ 2πr πρhr 2 g h = 2γ cos θ ρgr (2.1) γ = ρgrh (2.2) 2 cos θ θ cos θ = 1 (2.2) γ = 1 ρgrh (2.) 2 2. p p ρgh p ( ) p p = p ρgh (2.) h p p = 2γ r 1 1 (Berry,1975) 2-6

More information

e a b a b b a a a 1 a a 1 = a 1 a = e G G G : x ( x =, 8, 1 ) x 1,, 60 θ, ϕ ψ θ G G H H G x. n n 1 n 1 n σ = (σ 1, σ,..., σ N ) i σ i i n S n n = 1,,

e a b a b b a a a 1 a a 1 = a 1 a = e G G G : x ( x =, 8, 1 ) x 1,, 60 θ, ϕ ψ θ G G H H G x. n n 1 n 1 n σ = (σ 1, σ,..., σ N ) i σ i i n S n n = 1,, 01 10 18 ( ) 1 6 6 1 8 8 1 6 1 0 0 0 0 1 Table 1: 10 0 8 180 1 1 1. ( : 60 60 ) : 1. 1 e a b a b b a a a 1 a a 1 = a 1 a = e G G G : x ( x =, 8, 1 ) x 1,, 60 θ, ϕ ψ θ G G H H G x. n n 1 n 1 n σ = (σ 1,

More information

fx-3650P_fx-3950P_J

fx-3650P_fx-3950P_J SA1109-E J fx-3650p fx-3950p http://edu.casio.jp RCA500002-001V04 AB2 Mode

More information

電子回路I_4.ppt

電子回路I_4.ppt 電子回路 Ⅰ 第 4 回 電子回路 Ⅰ 5 1 講義内容 1. 半導体素子 ( ダイオードとトランジスタ ) 2. 基本回路 3. 増幅回路 電界効果トランジスタ (FET) 基本構造 基本動作動作原理 静特性 電子回路 Ⅰ 5 2 半導体素子 ( ダイオードとトランジスタ ) ダイオード (2 端子素子 ) トランジスタ (3 端子素子 ) バイポーラトランジスタ (Biolar) 電界効果トランジスタ

More information

) a + b = i + 6 b c = 6i j ) a = 0 b = c = 0 ) â = i + j 0 ˆb = 4) a b = b c = j + ) cos α = cos β = 6) a ˆb = b ĉ = 0 7) a b = 6i j b c = i + 6j + 8)

) a + b = i + 6 b c = 6i j ) a = 0 b = c = 0 ) â = i + j 0 ˆb = 4) a b = b c = j + ) cos α = cos β = 6) a ˆb = b ĉ = 0 7) a b = 6i j b c = i + 6j + 8) 4 4 ) a + b = i + 6 b c = 6i j ) a = 0 b = c = 0 ) â = i + j 0 ˆb = 4) a b = b c = j + ) cos α = cos β = 6) a ˆb = b ĉ = 0 7) a b = 6i j b c = i + 6j + 8) a b a b = 6i j 4 b c b c 9) a b = 4 a b) c = 7

More information

29

29 9 .,,, 3 () C k k C k C + C + C + + C 8 + C 9 + C k C + C + C + C 3 + C 4 + C 5 + + 45 + + + 5 + + 9 + 4 + 4 + 5 4 C k k k ( + ) 4 C k k ( k) 3 n( ) n n n ( ) n ( ) n 3 ( ) 3 3 3 n 4 ( ) 4 4 4 ( ) n n

More information

5. 5.1,, V, ,, ( 5.1), 5.2.2,,,,,,,,,, 5.2.3, 5.2 L1, L2, L3 3-1, 2-2, 1-3,,, L1, L3, L2, ,,, ( 5.3),,, N 3 L 2 S L 1 L 3 5.1: 5.2: 1

5. 5.1,, V, ,, ( 5.1), 5.2.2,,,,,,,,,, 5.2.3, 5.2 L1, L2, L3 3-1, 2-2, 1-3,,, L1, L3, L2, ,,, ( 5.3),,, N 3 L 2 S L 1 L 3 5.1: 5.2: 1 5. 5.1,,, 5.2 5.2.1,, ( 5.1), 5.2.2,,,,,,,,,, 5.2.3, 5.2 L1, L2, L3 31, 22, 13,,, L1, L3, L2, 0 5.2.4,,, ( 5.3),,, N 3 L 2 S L 1 L 3 5.1: 5.2: 1 D C 1 0 0 A C 2 2 0 j X E 0 5.3: 5.5: f,, (),,,,, 1, 5.2.6

More information

Microsoft PowerPoint - 山形大高野send ppt [互換モード]

Microsoft PowerPoint - 山形大高野send ppt [互換モード] , 2012 10 SCOPE, 2012 10 2 CDMA OFDMA OFDM SCOPE, 2012 10 OFDM 0-20 Relative Optical Power [db] -40-60 10 Gbps NRZ BPSK-SSB 36dB -80-20 -10 0 10 20 Relative Frequency [GHz] SSB SSB OFDM SSB SSB OFDM OFDM

More information

回路実習

回路実習 100-720 Oscilloscope Experiment Circuit 440 441 100-273 Sensor Experiment Apparatus 100-040 Potentiometer Circuit Experiment Apparatus 100-150 Direct Current Circuit Practice Apparatus 442 100-010 Resistance

More information

LLG-R8.Nisus.pdf

LLG-R8.Nisus.pdf d M d t = γ M H + α M d M d t M γ [ 1/ ( Oe sec) ] α γ γ = gµ B h g g µ B h / π γ g = γ = 1.76 10 [ 7 1/ ( Oe sec) ] α α = λ γ λ λ λ α γ α α H α = γ H ω ω H α α H K K H K / M 1 1 > 0 α 1 M > 0 γ α γ =

More information

c 2009 i

c 2009 i I 2009 c 2009 i 0 1 0.0................................... 1 0.1.............................. 3 0.2.............................. 5 1 7 1.1................................. 7 1.2..............................

More information

1

1 GL (a) (b) Ph l P N P h l l Ph Ph Ph Ph l l l l P Ph l P N h l P l .9 αl B βlt D E. 5.5 L r..8 e g s e,e l l W l s l g W W s g l l W W e s g e s g r e l ( s ) l ( l s ) r e l ( s ) l ( l s ) e R e r

More information

c 03 MOSFET n MOSFET 0, I Dn = β n VGSn V thn V ] DSn VDSn, β n (V GSn V thn ), () p MOSFET 0, ] I Dp = β p V GSp V thp VDSp V DSp, βp (V GSp V thp ),

c 03 MOSFET n MOSFET 0, I Dn = β n VGSn V thn V ] DSn VDSn, β n (V GSn V thn ), () p MOSFET 0, ] I Dp = β p V GSp V thp VDSp V DSp, βp (V GSp V thp ), CMOS original:0//0, revised:03// CMOS CMOS CMOS NOT V in 0 n MOSFET p MOSFET V out V DD V in V DD n MOSFET p MOSFET V out 0 : CMOS CMOS c 03 MOSFET n MOSFET 0, I Dn = β n VGSn V thn V ] DSn VDSn, β n (V

More information

Note.tex 2008/09/19( )

Note.tex 2008/09/19( ) 1 20 9 19 2 1 5 1.1........................ 5 1.2............................. 8 2 9 2.1............................. 9 2.2.............................. 10 3 13 3.1.............................. 13 3.2..................................

More information

ADC121S Bit, ksps, Diff Input, Micro Pwr Sampling ADC (jp)

ADC121S Bit, ksps, Diff Input, Micro Pwr Sampling ADC (jp) ADC121S625 ADC121S625 12-Bit, 50 ksps to 200 ksps, Differential Input, Micro Power Sampling A/D Converter Literature Number: JAJSAB8 ADC121S625 12 50kSPS 200kSPS A/D ADC121S625 50kSPS 200kSPS 12 A/D 500mV

More information

Gauss Gauss ɛ 0 E ds = Q (1) xy σ (x, y, z) (2) a ρ(x, y, z) = x 2 + y 2 (r, θ, φ) (1) xy A Gauss ɛ 0 E ds = ɛ 0 EA Q = ρa ɛ 0 EA = ρea E = (ρ/ɛ 0 )e

Gauss Gauss ɛ 0 E ds = Q (1) xy σ (x, y, z) (2) a ρ(x, y, z) = x 2 + y 2 (r, θ, φ) (1) xy A Gauss ɛ 0 E ds = ɛ 0 EA Q = ρa ɛ 0 EA = ρea E = (ρ/ɛ 0 )e 7 -a 7 -a February 4, 2007 1. 2. 3. 4. 1. 2. 3. 1 Gauss Gauss ɛ 0 E ds = Q (1) xy σ (x, y, z) (2) a ρ(x, y, z) = x 2 + y 2 (r, θ, φ) (1) xy A Gauss ɛ 0 E ds = ɛ 0 EA Q = ρa ɛ 0 EA = ρea E = (ρ/ɛ 0 )e z

More information

(Compton Scattering) Beaming 1 exp [i (k x ωt)] k λ k = 2π/λ ω = 2πν k = ω/c k x ωt ( ω ) k α c, k k x ωt η αβ k α x β diag( + ++) x β = (ct, x) O O x

(Compton Scattering) Beaming 1 exp [i (k x ωt)] k λ k = 2π/λ ω = 2πν k = ω/c k x ωt ( ω ) k α c, k k x ωt η αβ k α x β diag( + ++) x β = (ct, x) O O x Compton Scattering Beaming exp [i k x ωt] k λ k π/λ ω πν k ω/c k x ωt ω k α c, k k x ωt η αβ k α x β diag + ++ x β ct, x O O x O O v k α k α β, γ k γ k βk, k γ k + βk k γ k k, k γ k + βk 3 k k 4 k 3 k

More information

DS90LV V or 5V LVDS Driver/Receiver (jp)

DS90LV V or 5V LVDS Driver/Receiver (jp) DS90LV019 DS90LV019 3.3V or 5V LVDS Driver/Receiver Literature Number: JAJS563 DS90LV019 LVDS 1 / DS90LV019 Low Voltage Differential Signaling (LVDS) 1 CMOS / DS90LV019 EIA-644 IEEE1596.3 (SCI LVDS) 2

More information

General Purpose, Low Voltage, Rail-to-Rail Output Operational Amplifiers 324 V LM LMV321( )/LMV358( )/LMV324( ) General Purpose, Low Voltage, Rail-to-

General Purpose, Low Voltage, Rail-to-Rail Output Operational Amplifiers 324 V LM LMV321( )/LMV358( )/LMV324( ) General Purpose, Low Voltage, Rail-to- General Purpose, Low Voltage, Rail-to-Rail Output Operational Amplifiers 324 V LM LMV321( )/LMV358( )/LMV324( ) General Purpose, Low Voltage, Rail-to-Rail Output Operational Amplifiers 358 LMV358/324 LM358/324

More information

1

1 1 1.. ( ) ( ) ( ) (A) E icb φ Et = + cdiva ct (H3) (B) ( ) ct ct ' ctct ' + ' = ' ct ' + ct ' i( ') (H3,H18) 3 (i) cosh Ψ = cosh ΘcoshΩ sinhψ sinhθ sinhω cosh Ψ cosh Θ cosh Ω = sinhψ sinhθ sinhω tanhψ

More information

pc725v0nszxf_j

pc725v0nszxf_j PC725NSZXF PC725NSZXF PC725NSZXF PC725 DE file PC725 Date Jun. 3. 25 SHARP Corporation PC725NSZXF 2 6 5 2 3 4 Anode Cathode NC Emitter 3 4 5 Collector 6 Base PC725NSZXF PC725YSZXF.6 ±.2.2 ±.3 SHARP "S"

More information

Z: Q: R: C: sin 6 5 ζ a, b

Z: Q: R: C: sin 6 5 ζ a, b Z: Q: R: C: 3 3 7 4 sin 6 5 ζ 9 6 6............................... 6............................... 6.3......................... 4 7 6 8 8 9 3 33 a, b a bc c b a a b 5 3 5 3 5 5 3 a a a a p > p p p, 3,

More information

( ) Note (e ) (µ ) (τ ) ( (ν e,e ) e- (ν µ, µ ) µ- (ν τ,τ ) τ- ) ( ) ( ) (SU(2) ) (W +,Z 0,W ) * 1) 3 * 2) [ ] [ ] [ ] ν e ν µ ν τ e

( ) Note (e ) (µ ) (τ ) ( (ν e,e ) e- (ν µ, µ ) µ- (ν τ,τ ) τ- ) ( ) ( ) (SU(2) ) (W +,Z 0,W ) * 1) 3 * 2) [ ] [ ] [ ] ν e ν µ ν τ e ( ) Note 3 19 12 13 8 8.1 (e ) (µ ) (τ ) ( (ν e,e ) e- (ν µ, µ ) µ- (ν τ,τ ) τ- ) ( ) ( ) (SU(2) ) (W +,Z 0,W ) * 1) 3 * 2) [ ] [ ] [ ] ν e ν µ ν τ e µ τ, e R, µ R, τ R (1a) L ( ) ) * 3) W Z 1/2 ( - )

More information

高校生の就職への数学II

高校生の就職への数学II II O Tped b L A TEX ε . II. 3. 4. 5. http://www.ocn.ne.jp/ oboetene/plan/ 7 9 i .......................................................................................... 3..3...............................

More information

1990 IMO 1990/1/15 1:00-4:00 1 N N N 1, N 1 N 2, N 2 N 3 N 3 2 x x + 52 = 3 x x , A, B, C 3,, A B, C 2,,,, 7, A, B, C

1990 IMO 1990/1/15 1:00-4:00 1 N N N 1, N 1 N 2, N 2 N 3 N 3 2 x x + 52 = 3 x x , A, B, C 3,, A B, C 2,,,, 7, A, B, C 0 9 (1990 1999 ) 10 (2000 ) 1900 1994 1995 1999 2 SAT ACT 1 1990 IMO 1990/1/15 1:00-4:00 1 N 1990 9 N N 1, N 1 N 2, N 2 N 3 N 3 2 x 2 + 25x + 52 = 3 x 2 + 25x + 80 3 2, 3 0 4 A, B, C 3,, A B, C 2,,,, 7,

More information

untitled

untitled CMOS 376-851511 0277 (30) 1788 0277 (30)1707 e-mail: k_haruo@el.gunma-u.ac.jp AD AD AD [] AD AD AD [] ISSCC 2007 TSMC ISSCC2007 ISSCC2007 /DAC (regulation) (AGC) ADC/DAC AD AD AD [] AD CMOS SAR ADC Gr),,

More information

LCR e ix LC AM m k x m x x > 0 x < 0 F x > 0 x < 0 F = k x (k > 0) k x = x(t)

LCR e ix LC AM m k x m x x > 0 x < 0 F x > 0 x < 0 F = k x (k > 0) k x = x(t) 338 7 7.3 LCR 2.4.3 e ix LC AM 7.3.1 7.3.1.1 m k x m x x > 0 x < 0 F x > 0 x < 0 F = k x k > 0 k 5.3.1.1 x = xt 7.3 339 m 2 x t 2 = k x 2 x t 2 = ω 2 0 x ω0 = k m ω 0 1.4.4.3 2 +α 14.9.3.1 5.3.2.1 2 x

More information

6 2 2 x y x y t P P = P t P = I P P P ( ) ( ) ,, ( ) ( ) cos θ sin θ cos θ sin θ, sin θ cos θ sin θ cos θ y x θ x θ P

6 2 2 x y x y t P P = P t P = I P P P ( ) ( ) ,, ( ) ( ) cos θ sin θ cos θ sin θ, sin θ cos θ sin θ cos θ y x θ x θ P 6 x x 6.1 t P P = P t P = I P P P 1 0 1 0,, 0 1 0 1 cos θ sin θ cos θ sin θ, sin θ cos θ sin θ cos θ x θ x θ P x P x, P ) = t P x)p ) = t x t P P ) = t x = x, ) 6.1) x = Figure 6.1 Px = x, P=, θ = θ P

More information

85 4

85 4 85 4 86 Copright c 005 Kumanekosha 4.1 ( ) ( t ) t, t 4.1.1 t Step! (Step 1) (, 0) (Step ) ±V t (, t) I Check! P P V t π 54 t = 0 + V (, t) π θ : = θ : π ) θ = π ± sin ± cos t = 0 (, 0) = sin π V + t +V

More information

LMC6022 Low Power CMOS Dual Operational Amplifier (jp)

LMC6022 Low Power CMOS Dual Operational Amplifier (jp) Low Power CMOS Dual Operational Amplifier Literature Number: JAJS754 CMOS CMOS (100k 5k ) 0.5mW CMOS CMOS LMC6024 100k 5k 120dB 2.5 V/ 40fA Low Power CMOS Dual Operational Amplifier 19910530 33020 23900

More information

mbed祭りMar2016_プルアップ.key

mbed祭りMar2016_プルアップ.key 1 2 4 5 Table 16. Static characteristics (LPC1100, LPC1100L series) continued T amb = 40 C to +85 C, unless otherwise specified. Symbol Parameter Conditions Min Typ [1] Max Unit Standard port pins, RESET

More information

LT 低コスト、シャットダウン機能付き デュアルおよびトリプル300MHz 電流帰還アンプ

LT 低コスト、シャットダウン機能付き デュアルおよびトリプル300MHz 電流帰還アンプ µ µ LT1398/LT1399 V IN A R G 00Ω CHANNEL A SELECT EN A R F 3Ω B C 97.6Ω CABLE V IN B R G 00Ω EN B R F 3Ω 97.6Ω V OUT OUTPUT (00mV/DIV) EN C V IN C 97.6Ω R G 00Ω R F 3Ω 1399 TA01 R F = R G = 30Ω f = 30MHz

More information

1 12 ( )150 ( ( ) ) x M x 0 1 M 2 5x 2 + 4x + 3 x 2 1 M x M 2 1 M x (x + 1) 2 (1) x 2 + x + 1 M (2) 1 3 M (3) x 4 +

1 12 ( )150 ( ( ) ) x M x 0 1 M 2 5x 2 + 4x + 3 x 2 1 M x M 2 1 M x (x + 1) 2 (1) x 2 + x + 1 M (2) 1 3 M (3) x 4 + ( )5 ( ( ) ) 4 6 7 9 M M 5 + 4 + M + M M + ( + ) () + + M () M () 4 + + M a b y = a + b a > () a b () y V a () V a b V n f() = n k= k k () < f() = log( ) t dt log () n+ (i) dt t (n + ) (ii) < t dt n+ n

More information

i

i 009 I 1 8 5 i 0 1 0.1..................................... 1 0.................................................. 1 0.3................................. 0.4........................................... 3

More information

RS 175

RS 175 RS 175 Digital Wireless Headphone System ... 2 RS 175... 4... 5... 6 HDR 175... 6 TR 175... 7... 8 RS 175... 11...11...12 AC...16...17...18...19 RS 175... 20...20...21...21 /...21 /...22 Dynamic Bass

More information

i 1 40 ii Grid Dip Meter 3 10kc 1000Mc Grid Dip Meter (RF) Q Grid Dip Meter Grid Dip Meter GDM Grid Dip Meter i ii 1. Grid Dip Meter 1 1.1................... 1 1.2............... 2 1.3............... 5

More information

TULを用いたVisual ScalerとTDCの開発

TULを用いたVisual ScalerとTDCの開発 TUL を用いた Visual Scaler と TDC の開発 2009/3/23 原子核物理 4 年 永尾翔 目次 目的と内容 開発環境 J-Lab におけるハイパー核分光 Visual Scaler TDC まとめ & 今後 目的と内容 目的 TUL, QuartusⅡ を用いて実験におけるトリガーを組めるようになる Digital Logic を組んでみる 内容 特徴 TUL,QuartusⅡ

More information

修士論文

修士論文 SAW 14 2 M3622 i 1 1 1-1 1 1-2 2 1-3 2 2 3 2-1 3 2-2 5 2-3 7 2-3-1 7 2-3-2 2-3-3 SAW 12 3 13 3-1 13 3-2 14 4 SAW 19 4-1 19 4-2 21 4-2-1 21 4-2-2 22 4-3 24 4-4 35 5 SAW 36 5-1 Wedge 36 5-1-1 SAW 36 5-1-2

More information

A Study of Adaptive Array Implimentation for mobile comunication in cellular system GD133

A Study of Adaptive Array Implimentation for mobile comunication in cellular system GD133 A Study of Adaptive Array Implimentation for mobile comunication in cellular system 15 1 31 01GD133 LSI DSP CMA 10km/s i 1 1 2 LS-CMA 5 2.1 CMA... 5 2.1.1... 5 2.1.2... 7 2.1.3... 10 2.2 LS-CMA... 13 2.2.1...

More information

Mott散乱によるParity対称性の破れを検証

Mott散乱によるParity対称性の破れを検証 Mott Parity P2 Mott target Mott Parity Parity Γ = 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 t P P ),,, ( 3 2 1 0 1 γ γ γ γ γ γ ν ν µ µ = = Γ 1 : : : Γ P P P P x x P ν ν µ µ vector axial vector ν ν µ µ γ γ Γ ν γ

More information

<4D F736F F D B B83578B6594BB2D834A836F815B82D082C88C60202E646F63>

<4D F736F F D B B83578B6594BB2D834A836F815B82D082C88C60202E646F63> 通信方式第 2 版 サンプルページ この本の定価 判型などは, 以下の URL からご覧いただけます. http://www.morikita.co.jp/books/mid/072662 このサンプルページの内容は, 第 2 版発行当時のものです. i 2 2 2 2012 5 ii,.,,,,,,.,.,,,,,.,,.,,..,,,,.,,.,.,,.,,.. 1990 5 iii 1 1

More information

4‐E ) キュリー温度を利用した消磁:熱消磁

4‐E ) キュリー温度を利用した消磁:熱消磁 ( ) () x C x = T T c T T c 4D ) ) Fe Ni Fe Fe Ni (Fe Fe Fe Fe Fe 462 Fe76 Ni36 4E ) ) (Fe) 463 4F ) ) ( ) Fe HeNe 17 Fe Fe Fe HeNe 464 Ni Ni Ni HeNe 465 466 (2) Al PtO 2 (liq) 467 4G ) Al 468 Al ( 468

More information

Microsoft PowerPoint - 02_資料.ppt [互換モード]

Microsoft PowerPoint - 02_資料.ppt [互換モード] db log db db db log log log db log log log4 y log4 log y log log y log4 log log log y log 4 log log log y log log log log y log log y log log y log y 5V.5 m db db log db db.893 - +..5.779-3 +3.43 db(.)

More information

LMC7101/101Q Tiny Low Pwr Op Amp w/Rail-to-Rail Input and Output (jp)

LMC7101/101Q Tiny Low Pwr Op Amp w/Rail-to-Rail Input and Output (jp) ,Q /Q Tiny Low Power Operational Amplifier with Rail-to-Rail Input and Output Literature Number: JAJS809 CMOS SOT23-5 CMOS LMC6482/6484 PHS (PDA) PCMCIA 5-Pin SOT23 CMOS 19940216 33020 23900 11800 2006

More information

ELECTRONIC IMAGING IN ASTRONOMY Detectors and Instrumentation 5 Instrumentation and detectors

ELECTRONIC IMAGING IN ASTRONOMY  Detectors and Instrumentation   5 Instrumentation and detectors ELECTRONIC IMAGING IN ASTRONOMY Detectors and Instrumentation 5 Instrumentation and detectors 4 2017/5/10 Contents 5.4 Interferometers 5.4.1 The Fourier Transform Spectrometer (FTS) 5.4.2 The Fabry-Perot

More information

66 σ σ (8.1) σ = 0 0 σd = 0 (8.2) (8.2) (8.1) E ρ d = 0... d = 0 (8.3) d 1 NN K K 8.1 d σd σd M = σd = E 2 d (8.4) ρ 2 d = I M = EI ρ 1 ρ = M EI ρ EI

66 σ σ (8.1) σ = 0 0 σd = 0 (8.2) (8.2) (8.1) E ρ d = 0... d = 0 (8.3) d 1 NN K K 8.1 d σd σd M = σd = E 2 d (8.4) ρ 2 d = I M = EI ρ 1 ρ = M EI ρ EI 65 8. K 8 8 7 8 K 6 7 8 K 6 M Q σ (6.4) M O ρ dθ D N d N 1 P Q B C (1 + ε)d M N N h 2 h 1 ( ) B (+) M 8.1: σ = E ρ (E, 1/ρ ) (8.1) 66 σ σ (8.1) σ = 0 0 σd = 0 (8.2) (8.2) (8.1) E ρ d = 0... d = 0 (8.3)

More information

日立評論2008年1月号 : 基盤技術製品

日立評論2008年1月号 : 基盤技術製品 Infrastructure Technology / Products HIGHLIGHTS 2008 HDD 2.5 HDD3.5 HDD 1 Deskstar 7K1000 HDD Hard Disk Drive 2006 5 PC 2.5 HDD HDD 3.5 HDD1 1 2007 3Deskstar 7K1000 3.5 HDD 1149 Deskstar 7K500 2 GMR Giant

More information

LTC ビット、200ksps シリアル・サンプリングADC

LTC ビット、200ksps シリアル・サンプリングADC µ CBUSY ANALOG INPUT 10V TO 10V 2. 2. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 V DIG V ANA PWRD BUSY CS R/C TAG SB/BTC DATA EXT/INT DATACLK DGND SY 28 27 26 25 24 23 22 21 20 19 18 17 16 15 10µF 0.1µF SERIAL INTERFACE

More information

= hυ = h c λ υ λ (ev) = 1240 λ W=NE = Nhc λ W= N 2 10-16 λ / / Φe = dqe dt J/s Φ = km Φe(λ)v(λ)dλ THBV3_0101JA Qe = Φedt (W s) Q = Φdt lm s Ee = dφe ds E = dφ ds Φ Φ THBV3_0102JA Me = dφe ds M = dφ ds

More information

LM6172 デュアル高速低消費電力、低歪み電圧帰還アンプ

LM6172 デュアル高速低消費電力、低歪み電圧帰還アンプ Dual High Speed, Low Power, Low Distortion, Voltage Feedback Amplifiers Literature Number: JAJS854 100MHz 3000V/ s 50mA 2.3mA/ 15V ADSL 5V VIP III (Vertically Integrated PNP) LM6171 Dual High Speed, Low

More information

,, 2. Matlab Simulink 2018 PC Matlab Scilab 2

,, 2. Matlab Simulink 2018 PC Matlab Scilab 2 (2018 ) ( -1) TA Email : ohki@i.kyoto-u.ac.jp, ske.ta@bode.amp.i.kyoto-u.ac.jp : 411 : 10 308 1 1 2 2 2.1............................................ 2 2.2..................................................

More information

LM193/LM293/LM393/LM 回路入り低動作電圧低オフセット電圧コンパレータ

LM193/LM293/LM393/LM 回路入り低動作電圧低オフセット電圧コンパレータ LM193,LM2903,LM293,LM393 LM193/ Low Power Low Offset Voltage Dual Comparators Literature Number: JAJSB74 2 LM293 2.0mV 2 A/D VCO MOS LM293 TTL CMOS LM293 MOS LM393 LM2903 Micro SMD 8 ( 0.3mm) Squarewave

More information

『共形場理論』

『共形場理論』 T (z) SL(2, C) T (z) SU(2) S 1 /Z 2 SU(2) (ŜU(2) k ŜU(2) 1)/ŜU(2) k+1 ŜU(2)/Û(1) G H N =1 N =1 N =1 N =1 N =2 N =2 N =2 N =2 ĉ>1 N =2 N =2 N =4 N =4 1 2 2 z=x 1 +ix 2 z f(z) f(z) 1 1 4 4 N =4 1 = = 1.3

More information

All Rights Reserved (c) Yoichi OKABE 1998-present. [ HTML ] [ PDF ] [ ] [ ] [ Web ] [ ]

All Rights Reserved (c) Yoichi OKABE 1998-present. [ HTML ] [ PDF ] [ ] [ ] [ Web ] [ ] ( ) 2010 10 9 : 2003 3 18 All Rights Reserved (c) Yoichi OKABE 1998-present. [ HTML ] [ PDF ] [ ] [ ] [ Web ] [ ] 1 1.1 ( ) Y 1.2 ( ) 20cm 4km/hr 400m/hr 400m/4km 1/10 ( 5 ) 2 1/2.5 (20 ) 1/2.5 (20 ) 400m/hr

More information

TOP URL 1

TOP URL   1 TOP URL http://amonphys.web.fc.com/ 1 19 3 19.1................... 3 19.............................. 4 19.3............................... 6 19.4.............................. 8 19.5.............................

More information

DAC121S101/DAC121S101Q 12-Bit Micro Power, RRO Digital-to-Analog Converter (jp)

DAC121S101/DAC121S101Q 12-Bit Micro Power, RRO Digital-to-Analog Converter (jp) DAC121S101 DAC121S101/DAC121S101Q 12-Bit Micro Power, RRO Digital-to-Analog Converter Literature Number: JAJSA89 DAC121S101 12 D/A DAC121S101 12 D/A (DAC) 2.7V 5.5V 3.6V 177 A 30MHz 3 SPI TM QSPI MICROWIRE

More information

untitled

untitled NJU7704/05 C-MOS ( ) ±1.00.9µA DSP SOT-23-5 SC88A 2 DSP NJU7704/05F NJU7704/05F3 ±1.0 0.9µA typ ( ) 1.5 6.0(0.1 step) ( C ) ( ) Active "L" : NJU770****A Active "H" : NJU770****B Nch : NJU7704 C-MOS : C-MOS

More information