スライド 1

Size: px
Start display at page:

Download "スライド 1"

Transcription

1 swk(at)ic.is.tohoku.ac.jp

2 2

3 Outline 3

4 ? 4

5 S/N CCD 5

6 Q Q V 6

7 CMOS 1 7

8 1 2 N 1 2 N 8

9 CCD: CMOS: 9

10 : / 10

11 A-D A D C A D C A D C A D C A D C A D C ADC 11

12 A-D ADC ADC ADC ADC ADC ADC ADC ADC ADC A-D 12

13 ADC TX reset analog ramp digita ramp 1 8 write 8-bit read mem 8 digital pixel value row read [Kleinfelder2001] CMOS 0.18um 352x288 pixels ~ 10,000fps 8 13

14 CCD: CMOS: 14

15 ( PC ) e.g. [ 2002] [Muehlmann2004] frame N frame N+1 15

16 SIMD (Single Instruction stream, Multiple Data stream)

17 SIMD ILLIAC IV (64 x 64-bit processors) [ed-thelen.org] CM-2, by Thinking Machines Corp. (65536 x 1-bit processors) [svisions.com] Several attempts, no lasting successes. [Hennessy2003] 17

18 SIMD Intel MMX SSE SSE2 AMD 3D Now! Enhanced 3D Now! 18

19 SIMD Pixel-Parallel Image Processor (MIT) [Gealow1999] IMAP-VISION (NEC) (linear processor array) [ 1995] [nec.co.jp] 19

20 SIMD Programmable Artificial Retina ( ) Near Sensor Image Processing ( ) Sensory Processing Element ( ) 20

21 Programmable Artificial Retina [Bernard1993] 3 2 AND NOT AND / NOT 21

22 Near Sensor Image Processing [Astrom1996] 9 22

23 Sensory Processing Element [ 1998] 24 23

24 SIMD 3? 24

25 A D C A D C A D C high-speed image processor 25

26 IVP MAPP [Johansson2003] 26

27 Column-Parallel Vision System II ADC ADC ADC (S 3 PE) [ 2001] 27

28 SIMD [ 2003] 1000fps CMOS (Micron ) + FPGA + PC [ 2005] 1000fps CMOS (Micron ) + FPGA 28

29 ? ASIC? FPGA 29

30 References [Kleinfelder2001] S. Kleinfelder, S. Lim, X. Liu and A. El Gamal: A Frames/s CMOS Digital Pixel Sensor, IEEE J. Solid-State Circuits, vol.36, no.12, pp , [ 2002] :, 20, 3A15, [Muehlmann2004] U. Muehlmann, M. Ribo, P. Lang and A. Pinz, A New High Speed CMOS Camera for Real-Time Tracking Applications, Proc IEEE Int. Conf. Robotics and Automation, pp , [ed-thelen.org] [svisions.com] [Hennessy2003] J. L. Hennessy and D. A. Patterson: Computer Architecture A Quantitative Approach, Third Edition, Morgan Kaufmann, [Gealow1999] J. C. Gealow and C. G. Sodini: A Pixel-Parallel Image Processor Using Logic Pitch-Matched to Dynamic Memory, IEEE J. Solid-State Circuits, vol.34, no.6, pp , [ 1995],,,, : SIMD IMAP, (D-I), vol.j78-d-ii, no.2, pp.82-90, [nec.co.jp] [Bernard1993] T. M. Bernard, Y. Zavidovique and F. J. Devos: A Programmable Artificial Retina, IEEE J. Solid-State Circuits, vol.28, no.7, pp , [Astrom1996] A. Astrom, J.-E. Eklund and R. Forchheimer: Global Feature Extraction Operations for Near-Sensor Image Processing, IEEE Trans. Image Processing, vol.5, no.1, pp , [ 1998],,, :, (D-I), vol.j81-d-i, no.2, pp.70-76, [Johansson2003] R. Johansson, L. Lindgren, J. Melander and B. Moller: A Multi-Resolution 1000 GOPS 4 Gpixels/s Programmable CMOS Image Sensor for Machine Vision, Proc. IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, [ 2001] : : CPV-II 19, pp , [ 2003],, : fps --, 21, 1K13, [ 2005] CMOS FPGA,, 2A1-N-094,

スライド 1

スライド 1 CMOS : swk(at)ic.is.tohoku.ac.jp [ 2003] [Wong1999] 2 : CCD CMOS 3 : CCD Q Q V 4 : CMOS V C 5 6 CMOS light input photon shot noise α quantum efficiency dark current dark current shot noise dt time integration

More information

sumi.indd

sumi.indd S/N S/N CCDCMOS CCD CMOS & E-mail hirofumi.sumi@jp.sony.com & E-mail Tadakuni.Narabu@jp.sony.com & E-mail Shinichiro.Saito@jp.sony.com Hirofumi SUMI, Non - Member and Tadakuni NARABU, Member and Shinichiro

More information

IEEE HDD RAID MPI MPU/CPU GPGPU GPU cm I m cm /g I I n/ cm 2 s X n/ cm s cm g/cm

IEEE HDD RAID MPI MPU/CPU GPGPU GPU cm I m cm /g I I n/ cm 2 s X n/ cm s cm g/cm Neutron Visual Sensing Techniques Making Good Use of Computer Science J-PARC CT CT-PET TB IEEE HDD RAID MPI MPU/CPU GPGPU GPU cm I m cm /g I I n/ cm 2 s X n/ cm s cm g/cm cm cm barn cm thn/ cm s n/ cm

More information

Chip Size and Performance Evaluations of Shared Cache for On-chip Multiprocessor Takahiro SASAKI, Tomohiro INOUE, Nobuhiko OMORI, Tetsuo HIRONAKA, Han

Chip Size and Performance Evaluations of Shared Cache for On-chip Multiprocessor Takahiro SASAKI, Tomohiro INOUE, Nobuhiko OMORI, Tetsuo HIRONAKA, Han Chip Size and Performance Evaluations of Shared Cache for On-chip Multiprocessor Takahiro SASAKI, Tomohiro INOUE, Nobuhiko OMORI, Tetsuo HIRONAKA, Hans J. MATTAUSCH, and Tetsushi KOIDE 1 1 2 0.5 µm CMOS

More information

2.2 (a) = 1, M = 9, p i 1 = p i = p i+1 = 0 (b) = 1, M = 9, p i 1 = 0, p i = 1, p i+1 = 1 1: M 2 M 2 w i [j] w i [j] = 1 j= w i w i = (w i [ ],, w i [

2.2 (a) = 1, M = 9, p i 1 = p i = p i+1 = 0 (b) = 1, M = 9, p i 1 = 0, p i = 1, p i+1 = 1 1: M 2 M 2 w i [j] w i [j] = 1 j= w i w i = (w i [ ],, w i [ RI-002 Encoding-oriented video generation algorithm based on control with high temporal resolution Yukihiro BANDOH, Seishi TAKAMURA, Atsushi SHIMIZU 1 1T / CMOS [1] 4K (4096 2160 /) 900 Hz 50Hz,60Hz 240Hz

More information

1 Kinect for Windows M = [X Y Z] T M = [X Y Z ] T f (u,v) w 3.2 [11] [7] u = f X +u Z 0 δ u (X,Y,Z ) (5) v = f Y Z +v 0 δ v (X,Y,Z ) (6) w = Z +

1 Kinect for Windows M = [X Y Z] T M = [X Y Z ] T f (u,v) w 3.2 [11] [7] u = f X +u Z 0 δ u (X,Y,Z ) (5) v = f Y Z +v 0 δ v (X,Y,Z ) (6) w = Z + 3 3D 1,a) 1 1 Kinect (X, Y) 3D 3D 1. 2010 Microsoft Kinect for Windows SDK( (Kinect) SDK ) 3D [1], [2] [3] [4] [5] [10] 30fps [10] 3 Kinect 3 Kinect Kinect for Windows SDK 3 Microsoft 3 Kinect for Windows

More information

IPSJ SIG Technical Report iphone iphone,,., OpenGl ES 2.0 GLSL(OpenGL Shading Language), iphone GPGPU(General-Purpose Computing on Graphics Proc

IPSJ SIG Technical Report iphone iphone,,., OpenGl ES 2.0 GLSL(OpenGL Shading Language), iphone GPGPU(General-Purpose Computing on Graphics Proc iphone 1 1 1 iphone,,., OpenGl ES 2.0 GLSL(OpenGL Shading Language), iphone GPGPU(General-Purpose Computing on Graphics Processing Unit)., AR Realtime Natural Feature Tracking Library for iphone Makoto

More information

Vol. 48 No. SIG 1(CVIM 17) Feb Visconti Visconti ITS Image Recognition LSI Visconti and Its Applications to Safety and Security Hiroaki Nakai, J

Vol. 48 No. SIG 1(CVIM 17) Feb Visconti Visconti ITS Image Recognition LSI Visconti and Its Applications to Safety and Security Hiroaki Nakai, J Vol. 48 No. SIG 1(CVIM 17) Feb. 2007 Visconti Visconti ITS Image Recognition LSI Visconti and Its Applications to Safety and Security Hiroaki Nakai, Jun Tanabe, Kenji Furukawa, Tatsuo Kozakaya, Takashi

More information

26 FPGA 11 05340 1 FPGA (Field Programmable Gate Array) ASIC (Application Specific Integrated Circuit) FPGA FPGA FPGA FPGA Linux FreeDOS skewed way L1

26 FPGA 11 05340 1 FPGA (Field Programmable Gate Array) ASIC (Application Specific Integrated Circuit) FPGA FPGA FPGA FPGA Linux FreeDOS skewed way L1 FPGA 272 11 05340 26 FPGA 11 05340 1 FPGA (Field Programmable Gate Array) ASIC (Application Specific Integrated Circuit) FPGA FPGA FPGA FPGA Linux FreeDOS skewed way L1 FPGA skewed L2 FPGA skewed Linux

More information

LED a) A New LED Array Acquisition Method Focusing on Time-Gradient and Space- Gradient Values for Road to Vehicle Visible Light Communication Syunsuk

LED a) A New LED Array Acquisition Method Focusing on Time-Gradient and Space- Gradient Values for Road to Vehicle Visible Light Communication Syunsuk VOL. J97-B NO. 7 JULY 2014 本 PDF の扱いは 電子情報通信学会著作権規定に従うこと なお 本 PDF は研究教育目的 ( 非営利 ) に限り 著者が第三者に直接配布することができる 著者以外からの配布は禁じられている LED a) A New LED Array Acquisition Method Focusing on Time-Gradient and Space-

More information

P2P P2P peer peer P2P peer P2P peer P2P i

P2P P2P peer peer P2P peer P2P peer P2P i 26 P2P Proposed a system for the purpose of idle resource utilization of the computer using the P2P 1150373 2015 2 27 P2P P2P peer peer P2P peer P2P peer P2P i Abstract Proposed a system for the purpose

More information

光学

光学 Range Image Sensors Using Active Stereo Methods Kazunori UMEDA and Kenji TERABAYASHI Active stereo methods, which include the traditional light-section method and the talked-about Kinect sensor, are typical

More information

3 2 2 (1) (2) (3) (4) 4 4 AdaBoost 2. [11] Onishi&Yoda [8] Iwashita&Stoica [5] 4 [3] 3. 3 (1) (2) (3)

3 2 2 (1) (2) (3) (4) 4 4 AdaBoost 2. [11] Onishi&Yoda [8] Iwashita&Stoica [5] 4 [3] 3. 3 (1) (2) (3) (MIRU2012) 2012 8 820-8502 680-4 E-mail: {d kouno,shimada,endo}@pluto.ai.kyutech.ac.jp (1) (2) (3) (4) 4 AdaBoost 1. Kanade [6] CLAFIC [12] EigenFace [10] 1 1 2 1 [7] 3 2 2 (1) (2) (3) (4) 4 4 AdaBoost

More information

2003/3 Vol. J86 D II No.3 2.3. 4. 5. 6. 2. 1 1 Fig. 1 An exterior view of eye scanner. CCD [7] 640 480 1 CCD PC USB PC 2 334 PC USB RS-232C PC 3 2.1 2

2003/3 Vol. J86 D II No.3 2.3. 4. 5. 6. 2. 1 1 Fig. 1 An exterior view of eye scanner. CCD [7] 640 480 1 CCD PC USB PC 2 334 PC USB RS-232C PC 3 2.1 2 Curved Document Imaging with Eye Scanner Toshiyuki AMANO, Tsutomu ABE, Osamu NISHIKAWA, Tetsuo IYODA, and Yukio SATO 1. Shape From Shading SFS [1] [2] 3 2 Department of Electrical and Computer Engineering,

More information

パナソニック技報

パナソニック技報 Panasonic Technical Journal Vol. 63 No. 1 May 2017 Development of Simultaneous-Capture Wide-dynamic-range Technology and Global Shutter Technology for Organic Photoconductive Film Image Sensor Masashi

More information

& Vol.5 No (Oct. 2015) TV 1,2,a) , Augmented TV TV AR Augmented Reality 3DCG TV Estimation of TV Screen Position and Ro

& Vol.5 No (Oct. 2015) TV 1,2,a) , Augmented TV TV AR Augmented Reality 3DCG TV Estimation of TV Screen Position and Ro TV 1,2,a) 1 2 2015 1 26, 2015 5 21 Augmented TV TV AR Augmented Reality 3DCG TV Estimation of TV Screen Position and Rotation Using Mobile Device Hiroyuki Kawakita 1,2,a) Toshio Nakagawa 1 Makoto Sato

More information

12 DCT A Data-Driven Implementation of Shape Adaptive DCT

12 DCT A Data-Driven Implementation of Shape Adaptive DCT 12 DCT A Data-Driven Implementation of Shape Adaptive DCT 1010431 2001 2 5 DCT MPEG H261,H263 LSI DDMP [1]DDMP MPEG4 DDMP MPEG4 SA-DCT SA-DCT DCT SA-DCT DDMP SA-DCT MPEG4, DDMP,, SA-DCT,, ο i Abstract

More information

P361

P361 ΣAD -RFDAC - High-Speed Continuous-Time Bandpass ΣAD Modulator Architecture Employing Sub-Sampling Technnique with 376-8515 1-5-1 Masafumi Uemori Tomonari Ichikawa Haruo Kobayashi Department of Electronic

More information

スパコンに通じる並列プログラミングの基礎

スパコンに通じる並列プログラミングの基礎 2018.09.10 furihata@cmc.osaka-u.ac.jp ( ) 2018.09.10 1 / 59 furihata@cmc.osaka-u.ac.jp ( ) 2018.09.10 2 / 59 Windows, Mac Unix 0444-J furihata@cmc.osaka-u.ac.jp ( ) 2018.09.10 3 / 59 Part I Unix GUI CUI:

More information

スパコンに通じる並列プログラミングの基礎

スパコンに通じる並列プログラミングの基礎 2018.06.04 2018.06.04 1 / 62 2018.06.04 2 / 62 Windows, Mac Unix 0444-J 2018.06.04 3 / 62 Part I Unix GUI CUI: Unix, Windows, Mac OS Part II 2018.06.04 4 / 62 0444-J ( : ) 6 4 ( ) 6 5 * 6 19 SX-ACE * 6

More information

26102 (1/2) LSISoC: (1) (*) (*) GPU SIMD MIMD FPGA DES, AES (2/2) (2) FPGA(8bit) (ISS: Instruction Set Simulator) (3) (4) LSI ECU110100ECU1 ECU ECU ECU ECU FPGA ECU main() { int i, j, k for { } 1 GP-GPU

More information

258 5) GPS 1 GPS 6) GPS DP 7) 8) 10) GPS GPS 2 3 4 5 2. 2.1 3 1) GPS Global Positioning System

258 5) GPS 1 GPS 6) GPS DP 7) 8) 10) GPS GPS 2 3 4 5 2. 2.1 3 1) GPS Global Positioning System Vol. 52 No. 1 257 268 (Jan. 2011) 1 2, 1 1 measurement. In this paper, a dynamic road map making system is proposed. The proposition system uses probe-cars which has an in-vehicle camera and a GPS receiver.

More information

CMOS GPS GPS HARP CCD CMOS CMOS CMOS CMOS CCD i

CMOS GPS GPS HARP CCD CMOS CMOS CMOS CMOS CCD i 23 CMOS A Study of Capturing Star by Conventional CMOS Camera with Small Lens 1120224 2012 3 1 CMOS GPS GPS HARP CCD CMOS CMOS CMOS CMOS CCD i Abstract A Study of Capturing Star by Conventional CMOS Camera

More information

24 21 21115025 i 1 1 2 5 2.1.................................. 6 2.1.1........................... 6 2.1.2........................... 7 2.2...................................... 8 2.3............................

More information

(3.6 ) (4.6 ) 2. [3], [6], [12] [7] [2], [5], [11] [14] [9] [8] [10] (1) Voodoo 3 : 3 Voodoo[1] 3 ( 3D ) (2) : Voodoo 3D (3) : 3D (Welc

(3.6 ) (4.6 ) 2. [3], [6], [12] [7] [2], [5], [11] [14] [9] [8] [10] (1) Voodoo 3 : 3 Voodoo[1] 3 ( 3D ) (2) : Voodoo 3D (3) : 3D (Welc 1,a) 1,b) Obstacle Detection from Monocular On-Vehicle Camera in units of Delaunay Triangles Abstract: An algorithm to detect obstacles by using a monocular on-vehicle video camera is developed. Since

More information

IPSJ SIG Technical Report Vol.2013-CVIM-188 No /9/2 1,a) D. Marr D. Marr 1. (feature-based) (area-based) (Dense Stereo Vision) van der Ma

IPSJ SIG Technical Report Vol.2013-CVIM-188 No /9/2 1,a) D. Marr D. Marr 1. (feature-based) (area-based) (Dense Stereo Vision) van der Ma ,a) D. Marr D. Marr. (feature-based) (area-based) (Dense Stereo Vision) van der Mark [] (Intelligent Vehicle: IV) SAD(Sum of Absolute Difference) Intel x86 CPU SSE2(Streaming SIMD Extensions 2) CPU IV

More information

paper.dvi

paper.dvi SIFT 23 (410M5B1) SIFT(Scale Invariant Feature Transform) SIFT SIFT SIFT SIMD SIFT SIMD MIMD Gaussian SIMD Abstract Currently, with the development of image-recognition technique, to recognize a large

More information

"Moir6 Patterns on Video Pictures Taken by Solid State Image Sensors" by Okio Yoshida and Akito Iwamoto (Toshiba Research and Development Center, Tosh

Moir6 Patterns on Video Pictures Taken by Solid State Image Sensors by Okio Yoshida and Akito Iwamoto (Toshiba Research and Development Center, Tosh "Moir6 Patterns on Video Pictures Taken by Solid State Image Sensors" by Okio Yoshida and Akito Iwamoto (Toshiba Research and Development Center, Toshiba Corporation, Kawasaki) Reproduced resolution chart

More information

23 Fig. 2: hwmodulev2 3. Reconfigurable HPC 3.1 hw/sw hw/sw hw/sw FPGA PC FPGA PC FPGA HPC FPGA FPGA hw/sw hw/sw hw- Module FPGA hwmodule hw/sw FPGA h

23 Fig. 2: hwmodulev2 3. Reconfigurable HPC 3.1 hw/sw hw/sw hw/sw FPGA PC FPGA PC FPGA HPC FPGA FPGA hw/sw hw/sw hw- Module FPGA hwmodule hw/sw FPGA h 23 FPGA CUDA Performance Comparison of FPGA Array with CUDA on Poisson Equation (lijiang@sekine-lab.ei.tuat.ac.jp), (kazuki@sekine-lab.ei.tuat.ac.jp), (takahashi@sekine-lab.ei.tuat.ac.jp), (tamukoh@cc.tuat.ac.jp),

More information

main.dvi

main.dvi PC 1 1 [1][2] [3][4] ( ) GPU(Graphics Processing Unit) GPU PC GPU PC ( 2 GPU ) GPU Harris Corner Detector[5] CPU ( ) ( ) CPU GPU 2 3 GPU 4 5 6 7 1 toyohiro@isc.kyutech.ac.jp 45 2 ( ) CPU ( ) ( ) () 2.1

More information

2007/8 Vol. J90 D No. 8 Stauffer [7] 2 2 I 1 I 2 2 (I 1(x),I 2(x)) 2 [13] I 2 = CI 1 (C >0) (I 1,I 2) (I 1,I 2) Field Monitoring Server

2007/8 Vol. J90 D No. 8 Stauffer [7] 2 2 I 1 I 2 2 (I 1(x),I 2(x)) 2 [13] I 2 = CI 1 (C >0) (I 1,I 2) (I 1,I 2) Field Monitoring Server a) Change Detection Using Joint Intensity Histogram Yasuyo KITA a) 2 (0 255) (I 1 (x),i 2 (x)) I 2 = CI 1 (C>0) (I 1,I 2 ) (I 1,I 2 ) 2 1. [1] 2 [2] [3] [5] [6] [8] Intelligent Systems Research Institute,

More information

スパコンに通じる並列プログラミングの基礎

スパコンに通じる並列プログラミングの基礎 2016.06.06 2016.06.06 1 / 60 2016.06.06 2 / 60 Windows, Mac Unix 0444-J 2016.06.06 3 / 60 Part I Unix GUI CUI: Unix, Windows, Mac OS Part II 0444-J 2016.06.06 4 / 60 ( : ) 6 6 ( ) 6 10 6 16 SX-ACE 6 17

More information

DC-DC Control Circuit for Single Inductor Dual Output DC-DC Converter with Charge Pump (AKM AKM Kenji TAKAHASHI Hajime YOKOO Shunsuke MIWA Hiroyuki IW

DC-DC Control Circuit for Single Inductor Dual Output DC-DC Converter with Charge Pump (AKM AKM Kenji TAKAHASHI Hajime YOKOO Shunsuke MIWA Hiroyuki IW DC-DC Control Circuit for Single Inductor Dual Output DC-DC Converter with Charge Pump (AKM AKM Kenji TAKAHASHI Hajime YOKOO Shunsuke MIWA Hiroyuki IWASE Nobukazu TAKAI Haruo KOBAYASHI Takahiro ODAGUCHI

More information

xx/xx Vol. Jxx A No. xx 1 Fig. 1 PAL(Panoramic Annular Lens) PAL(Panoramic Annular Lens) PAL (2) PAL PAL 2 PAL 3 2 PAL 1 PAL 3 PAL PAL 2. 1 PAL

xx/xx Vol. Jxx A No. xx 1 Fig. 1 PAL(Panoramic Annular Lens) PAL(Panoramic Annular Lens) PAL (2) PAL PAL 2 PAL 3 2 PAL 1 PAL 3 PAL PAL 2. 1 PAL PAL On the Precision of 3D Measurement by Stereo PAL Images Hiroyuki HASE,HirofumiKAWAI,FrankEKPAR, Masaaki YONEDA,andJien KATO PAL 3 PAL Panoramic Annular Lens 1985 Greguss PAL 1 PAL PAL 2 3 2 PAL DP

More information

P.01 C Global Value Corp. PAT.P 2008'

P.01 C Global Value Corp. PAT.P 2008' Value Point system *1 2009. 2. 25 2009. 2. 25 C Global Value Corp. PAT.P 2008' P.01 C Global Value Corp. PAT.P 2008' C Global Value Corp. PAT.P 2008' P.03 P.06 C Global Value Corp. PAT.P 2008' C Global

More information

A Responsive Processor for Parallel/Distributed Real-time Processing

A Responsive Processor for Parallel/Distributed Real-time Processing E-mail: yamasaki@{ics.keio.ac.jp, etl.go.jp} http://www.ny.ics.keio.ac.jp etc. CPU) I/O I/O or Home Automation, Factory Automation, (SPARC) (SDRAM I/F, DMAC, PCI, USB, Timers/Counters, SIO, PIO, )

More information

3: 2: 2. 2 Semi-supervised learning Semi-supervised learning [5,6] Semi-supervised learning Self-training [13] [14] Self-training Self-training Semi-s

3: 2: 2. 2 Semi-supervised learning Semi-supervised learning [5,6] Semi-supervised learning Self-training [13] [14] Self-training Self-training Semi-s THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS TECHNICAL REPORT OF IEICE. 599-8531 1-1 E-mail: tsukada@m.cs.osakafu-u.ac.jp, {masa,kise}@cs.osakafu-u.ac.jp Semi-supervised learning

More information

Microsoft Word - archip.doc

Microsoft Word - archip.doc 131 71 71 71 7 1 71 71 71 71 71 71 7 1 71 71 71 71 71 71 7-1 71 71 71 71 71 71 7-1 71 71 7 1 71 71 71 71 71 71 71 71 71 71 71 71 71 71 7 1 71 71 71 71 71 71 7 1 71 71 71 71 71 71 71 71 71 71 71 71 71 71

More information

RaVioli SIMD

RaVioli SIMD RaVioli SIMD 17 17115074 i RaVioli SIMD PC PC PC PC CPU RaVioli RaVioli CPU RaVioli CPU SIMD RaVioli RaVioli SIMD RaVioli SIMD RaVioli SIMD 1 1 2 RaVioli 2 2.1 RaVioli.......................................

More information

CPU Levels in the memory hierarchy Level 1 Level 2... Increasing distance from the CPU in access time Level n Size of the memory at each level 1: 2.2

CPU Levels in the memory hierarchy Level 1 Level 2... Increasing distance from the CPU in access time Level n Size of the memory at each level 1: 2.2 FFT 1 Fourier fast Fourier transform FFT FFT FFT 1 FFT FFT 2 Fourier 2.1 Fourier FFT Fourier discrete Fourier transform DFT DFT n 1 y k = j=0 x j ω jk n, 0 k n 1 (1) x j y k ω n = e 2πi/n i = 1 (1) n DFT

More information

2. CABAC CABAC CABAC 1 1 CABAC Figure 1 Overview of CABAC 2 DCT 2 0/ /1 CABAC [3] 3. 2 値化部 コンテキスト計算部 2 値算術符号化部 CABAC CABAC

2. CABAC CABAC CABAC 1 1 CABAC Figure 1 Overview of CABAC 2 DCT 2 0/ /1 CABAC [3] 3. 2 値化部 コンテキスト計算部 2 値算術符号化部 CABAC CABAC H.264 CABAC 1 1 1 1 1 2, CABAC(Context-based Adaptive Binary Arithmetic Coding) H.264, CABAC, A Parallelization Technology of H.264 CABAC For Real Time Encoder of Moving Picture YUSUKE YATABE 1 HIRONORI

More information

main

main RaVioli 21 21115135 25 2 12 i RaVioli CPU RaVioli RaVioli CPU RaVioli RaVioli RaVioli RaVioli RaVioli 1 1 2 2 2.1........................................... 2 2.1.1.......................... 2 2.1.2.....

More information

Silhouette on Image Object Silhouette on Images Object 1 Fig. 1 Visual cone Fig. 2 2 Volume intersection method Fig. 3 3 Background subtraction Fig. 4

Silhouette on Image Object Silhouette on Images Object 1 Fig. 1 Visual cone Fig. 2 2 Volume intersection method Fig. 3 3 Background subtraction Fig. 4 Image-based Modeling 1 1 Object Extraction Method for Image-based Modeling using Projection Transformation of Multi-viewpoint Images Masanori Ibaraki 1 and Yuji Sakamoto 1 The volume intersection method

More information

14 2 5

14 2 5 14 2 5 i ii Surface Reconstruction from Point Cloud of Human Body in Arbitrary Postures Isao MORO Abstract We propose a method for surface reconstruction from point cloud of human body in arbitrary postures.

More information

64bit SSE2 SSE2 FPU Visual C++ 64bit Inline Assembler 4 FPU SSE2 4.1 FPU Control Word FPU 16bit R R R IC RC(2) PC(2) R R PM UM OM ZM DM IM R: reserved

64bit SSE2 SSE2 FPU Visual C++ 64bit Inline Assembler 4 FPU SSE2 4.1 FPU Control Word FPU 16bit R R R IC RC(2) PC(2) R R PM UM OM ZM DM IM R: reserved (Version: 2013/5/16) Intel CPU (kashi@waseda.jp) 1 Intel CPU( AMD CPU) 64bit SIMD Inline Assemler Windows Visual C++ Linux gcc 2 FPU SSE2 Intel CPU double 8087 FPU (floating point number processing unit)

More information

[1] SBS [2] SBS Random Forests[3] Random Forests ii

[1] SBS [2] SBS Random Forests[3] Random Forests ii Random Forests 2013 3 A Graduation Thesis of College of Engineering, Chubu University Proposal of an efficient feature selection using the contribution rate of Random Forests Katsuya Shimazaki [1] SBS

More information

IPSJ SIG Technical Report Vol.2012-IS-119 No /3/ Web A Multi-story e-picture Book with the Degree-of-interest Extraction Function

IPSJ SIG Technical Report Vol.2012-IS-119 No /3/ Web A Multi-story e-picture Book with the Degree-of-interest Extraction Function 1 2 2 3 4 2 Web A Multi-story e-picture Book with the Degree-of-interest Extraction Function Kunimichi Shibata, 1 Masakuni Moriyama, 2 Kazuhide Yukawa, 2 Koji Ueno, 3 Kazuo Takahashi 4 and Shigeo Kaneda

More information

Computer Security Symposium October ,a) 1,b) Microsoft Kinect Kinect, Takafumi Mori 1,a) Hiroaki Kikuchi 1,b) [1] 1 Meiji U

Computer Security Symposium October ,a) 1,b) Microsoft Kinect Kinect, Takafumi Mori 1,a) Hiroaki Kikuchi 1,b) [1] 1 Meiji U Computer Security Symposium 017 3-5 October 017 1,a) 1,b) Microsoft Kinect Kinect, Takafumi Mori 1,a) Hiroaki Kikuchi 1,b) 1. 017 5 [1] 1 Meiji University Graduate School of Advanced Mathematical Science

More information

Joji Iisaka, S. Ito, T. Fujisaki and Y. Takao, " A Compound Computer System for Image data Processing, A chapter of "Real Time /Parallel Computing" Pl

Joji Iisaka, S. Ito, T. Fujisaki and Y. Takao,  A Compound Computer System for Image data Processing, A chapter of Real Time /Parallel Computing Pl Joji Iisaka, S. Ito, T. Fujisaki and Y. Takao, " A Compound Computer System for Image data Processing, A chapter of "Real Time /Parallel Computing" Plenum Publishing Co., New York, USA, 1981. Measurements

More information

Operation_test_of_SOFIST

Operation_test_of_SOFIST ILC :SOFIST 2 29 1 18 SOI ILC SOI SOFIST SOFISTver.1 SOFISTver.1 SOFIST SOFISTver.1 S/N BPW 1 1 4 1.1............... 4 1.1.1... 4 1.1.2... 5 1.2 ILC... 6 1.2.1 ILC... 6 1.2.2 ILD...........................

More information

IPSJ SIG Technical Report Vol.2015-MUS-107 No /5/23 HARK-Binaural Raspberry Pi 2 1,a) ( ) HARK 2 HARK-Binaural A/D Raspberry Pi 2 1.

IPSJ SIG Technical Report Vol.2015-MUS-107 No /5/23 HARK-Binaural Raspberry Pi 2 1,a) ( ) HARK 2 HARK-Binaural A/D Raspberry Pi 2 1. HARK-Binaural Raspberry Pi 2 1,a) 1 1 1 2 3 () HARK 2 HARK-Binaural A/D Raspberry Pi 2 1. [1,2] [2 5] () HARK (Honda Research Institute Japan audition for robots with Kyoto University) *1 GUI ( 1) Python

More information

a) Extraction of Similarities and Differences in Human Behavior Using Singular Value Decomposition Kenichi MISHIMA, Sayaka KANATA, Hiroaki NAKANISHI a

a) Extraction of Similarities and Differences in Human Behavior Using Singular Value Decomposition Kenichi MISHIMA, Sayaka KANATA, Hiroaki NAKANISHI a a) Extraction of Similarities and Differences in Human Behavior Using Singular Value Decomposition Kenichi MISHIMA, Sayaka KANATA, Hiroaki NAKANISHI a), Tetsuo SAWARAGI, and Yukio HORIGUCHI 1. Johansson

More information

デジタルカメラ用ISP:Milbeaut

デジタルカメラ用ISP:Milbeaut ISP Milbeaut Image Signal Processor: Milbeaut あらまし MilbeautISP Image Signal Processor 20 Mpixel Milbeaut6 MB91696AM MB91696AM Abstract Milbeaut is an image signal processor (ISP) that realizes a digital

More information

IPSJ SIG Technical Report GPS LAN GPS LAN GPS LAN Location Identification by sphere image and hybrid sensing Takayuki Katahira, 1 Yoshio Iwai 1

IPSJ SIG Technical Report GPS LAN GPS LAN GPS LAN Location Identification by sphere image and hybrid sensing Takayuki Katahira, 1 Yoshio Iwai 1 1 1 1 GPS LAN GPS LAN GPS LAN Location Identification by sphere image and hybrid sensing Takayuki Katahira, 1 Yoshio Iwai 1 and Hiroshi Ishiguro 1 Self-location is very informative for wearable systems.

More information

1 Table 1: Identification by color of voxel Voxel Mode of expression Nothing Other 1 Orange 2 Blue 3 Yellow 4 SSL Humanoid SSL-Vision 3 3 [, 21] 8 325

1 Table 1: Identification by color of voxel Voxel Mode of expression Nothing Other 1 Orange 2 Blue 3 Yellow 4 SSL Humanoid SSL-Vision 3 3 [, 21] 8 325 社団法人人工知能学会 Japanese Society for Artificial Intelligence 人工知能学会研究会資料 JSAI Technical Report SIG-Challenge-B3 (5/5) RoboCup SSL Humanoid A Proposal and its Application of Color Voxel Server for RoboCup SSL

More information

VHDL-AMS Department of Electrical Engineering, Doshisha University, Tatara, Kyotanabe, Kyoto, Japan TOYOTA Motor Corporation, Susono, Shizuok

VHDL-AMS Department of Electrical Engineering, Doshisha University, Tatara, Kyotanabe, Kyoto, Japan TOYOTA Motor Corporation, Susono, Shizuok VHDL-AMS 1-3 1200 Department of Electrical Engineering, Doshisha University, Tatara, Kyotanabe, Kyoto, Japan TOYOTA Motor Corporation, Susono, Shizuoka, Japan E-mail: tkato@mail.doshisha.ac.jp E-mail:

More information

(a) 1 (b) 3. Gilbert Pernicka[2] Treibitz Schechner[3] Narasimhan [4] Kim [5] Nayar [6] [7][8][9] 2. X X X [10] [11] L L t L s L = L t + L s

(a) 1 (b) 3. Gilbert Pernicka[2] Treibitz Schechner[3] Narasimhan [4] Kim [5] Nayar [6] [7][8][9] 2. X X X [10] [11] L L t L s L = L t + L s 1 1 1, Extraction of Transmitted Light using Parallel High-frequency Illumination Kenichiro Tanaka 1 Yasuhiro Mukaigawa 1 Yasushi Yagi 1 Abstract: We propose a new sharpening method of transmitted scene

More information

IPSJ SIG Technical Report Vol.2016-ARC-221 No /8/9 GC 1 1 GC GC GC GC DalvikVM GC 12.4% 5.7% 1. Garbage Collection: GC GC Java GC GC GC GC Dalv

IPSJ SIG Technical Report Vol.2016-ARC-221 No /8/9 GC 1 1 GC GC GC GC DalvikVM GC 12.4% 5.7% 1. Garbage Collection: GC GC Java GC GC GC GC Dalv GC 1 1 GC GC GC GC DalvikVM GC 12.4% 5.7% 1. Garbage Collection: GC GC Java GC GC GC GC DalvikVM[1] GC 1 Nagoya Institute of Technology GC GC 2. GC GC 2.1 GC 1 c 2016 Information Processing Society of

More information

(SAD) x86 MPSADBW H.264/AVC H.264/AVC SAD SAD x86 SAD MPSADBW SAD 3x3 3 9 SAD SAD SAD x86 MPSADBW SAD 9 SAD SAD 4.6

(SAD) x86 MPSADBW H.264/AVC H.264/AVC SAD SAD x86 SAD MPSADBW SAD 3x3 3 9 SAD SAD SAD x86 MPSADBW SAD 9 SAD SAD 4.6 SAD 23 (410M520) (SAD) x86 MPSADBW H.264/AVC H.264/AVC SAD SAD x86 SAD MPSADBW SAD 3x3 3 9 SAD SAD SAD x86 MPSADBW SAD 9 SAD SAD 4.6 Abstract In recent years, the high definition of video image has made

More information

JIIAセミナー

JIIAセミナー Digital Interface IIDC URL teli.co.jp/ E-Mail http://www.toshiba-teli.co.jp teli.co.jp/ s-itokawa@toshiba-teli.co.jpteli.co.jp EIA,NTSC EIA,NTSC 4-5 JIIA JIIA - / Digital Interface Digital Interface IEEE1394

More information

[2] OCR [3], [4] [5] [6] [4], [7] [8], [9] 1 [10] Fig. 1 Current arrangement and size of ruby. 2 Fig. 2 Typography combined with printing

[2] OCR [3], [4] [5] [6] [4], [7] [8], [9] 1 [10] Fig. 1 Current arrangement and size of ruby. 2 Fig. 2 Typography combined with printing 1,a) 1,b) 1,c) 2012 11 8 2012 12 18, 2013 1 27 WEB Ruby Removal Filters Using Genetic Programming for Early-modern Japanese Printed Books Taeka Awazu 1,a) Masami Takata 1,b) Kazuki Joe 1,c) Received: November

More information

IPSJ SIG Technical Report Vol.2009-CVIM-167 No /6/10 Real AdaBoost HOG 1 1 1, 2 1 Real AdaBoost HOG HOG Real AdaBoost HOG A Method for Reducing

IPSJ SIG Technical Report Vol.2009-CVIM-167 No /6/10 Real AdaBoost HOG 1 1 1, 2 1 Real AdaBoost HOG HOG Real AdaBoost HOG A Method for Reducing Real AdaBoost HOG 1 1 1, 2 1 Real AdaBoost HOG HOG Real AdaBoost HOG A Method for Reducing number of HOG Features based on Real AdaBoost Chika Matsushima, 1 Yuji Yamauchi, 1 Takayoshi Yamashita 1, 2 and

More information

GRAPE-DR /

GRAPE-DR / GRAPE-DR / GRAPE GRAPE-DR GRAPE ( ): (Barnes-Hut tree, FMM, Particle- Mesh Ewald(PPPM)...): ( ) 1988 32 IC 200 0.1m 3 400 GRAPE-1(1989) 16 8 32 48 240Mflops GRAPE-2(1990) 8 ( ) 40Mflops GRAPE-3(1991) 24

More information

16 2020 H.264/AVC 2 H.265/HEVC 1 H.265 JCT-VC HM(HEVC Test Model) HM 5 5 SIMD HM 33%

16 2020 H.264/AVC 2 H.265/HEVC 1 H.265 JCT-VC HM(HEVC Test Model) HM 5 5 SIMD HM 33% H.265/HEVC 2014 (410808) 16 2020 H.264/AVC 2 H.265/HEVC 1 H.265 JCT-VC HM(HEVC Test Model) HM 5 5 SIMD HM 33% Abstract In recent years, high resolution video technology has been developed in order to start

More information

1 3DCG [2] 3DCG CG 3DCG [3] 3DCG 3 3 API 2 3DCG 3 (1) Saito [4] (a) 1920x1080 (b) 1280x720 (c) 640x360 (d) 320x G-Buffer Decaudin[5] G-Buffer D

1 3DCG [2] 3DCG CG 3DCG [3] 3DCG 3 3 API 2 3DCG 3 (1) Saito [4] (a) 1920x1080 (b) 1280x720 (c) 640x360 (d) 320x G-Buffer Decaudin[5] G-Buffer D 3DCG 1) ( ) 2) 2) 1) 2) Real-Time Line Drawing Using Image Processing and Deforming Process Together in 3DCG Takeshi Okuya 1) Katsuaki Tanaka 2) Shigekazu Sakai 2) 1) Department of Intermedia Art and Science,

More information

4 4 2 RAW 4 4 4 (PCA) 4 4 4 4 RAW RAW [5] 4 RAW 4 Park [12] Park 2 RAW RAW 2 RAW y = Mx + n. (1) y RAW x RGB M CFA n.. R G B σr 2, σ2 G, σ2 B D n ( )

4 4 2 RAW 4 4 4 (PCA) 4 4 4 4 RAW RAW [5] 4 RAW 4 Park [12] Park 2 RAW RAW 2 RAW y = Mx + n. (1) y RAW x RGB M CFA n.. R G B σr 2, σ2 G, σ2 B D n ( ) RAW 4 E-mail: hakiyama@ok.ctrl.titech.ac.jp Abstract RAW RAW RAW RAW RAW 4 RAW RAW RAW 1 (CFA) CFA Bayer CFA [1] RAW CFA 1 2 [2, 3, 4, 5]. RAW RAW RAW RAW 3 [2, 3, 4, 5] (AWGN) [13, 14] RAW 2 RAW RAW RAW

More information

28 TCG SURF Card recognition using SURF in TCG play video

28 TCG SURF Card recognition using SURF in TCG play video 28 TCG SURF Card recognition using SURF in TCG play video 1170374 2017 3 2 TCG SURF TCG TCG OCG SURF Bof 20 20 30 10 1 SURF Bag of features i Abstract Card recognition using SURF in TCG play video Haruka

More information

1 Web [2] Web [3] [4] [5], [6] [7] [8] S.W. [9] 3. MeetingShelf Web MeetingShelf MeetingShelf (1) (2) (3) (4) (5) Web MeetingShelf

1 Web [2] Web [3] [4] [5], [6] [7] [8] S.W. [9] 3. MeetingShelf Web MeetingShelf MeetingShelf (1) (2) (3) (4) (5) Web MeetingShelf 1,a) 2,b) 4,c) 3,d) 4,e) Web A Review Supporting System for Whiteboard Logging Movies Based on Notes Timeline Taniguchi Yoshihide 1,a) Horiguchi Satoshi 2,b) Inoue Akifumi 4,c) Igaki Hiroshi 3,d) Hoshi

More information

) 1 2 2[m] % H W T (x, y) I D(x, y) d d = 1 [T (p, q) I D(x + p, y + q)] HW 2 (1) p q t 3 (X t,y t,z t) x t [ ] T x t

) 1 2 2[m] % H W T (x, y) I D(x, y) d d = 1 [T (p, q) I D(x + p, y + q)] HW 2 (1) p q t 3 (X t,y t,z t) x t [ ] T x t 1 1 Multi-Person Tracking for a Mobile Robot using Overlapping Silhouette Templates Junji Satake 1 and Jun Miura 1 This paper describes a stereo-based person tracking method for a person following robot.

More information

IS1-09 第 回画像センシングシンポジウム, 横浜,14 年 6 月 2 Hough Forest Hough Forest[6] Random Forest( [5]) Random Forest Hough Forest Hough Forest 2.1 Hough Forest 1 2.2

IS1-09 第 回画像センシングシンポジウム, 横浜,14 年 6 月 2 Hough Forest Hough Forest[6] Random Forest( [5]) Random Forest Hough Forest Hough Forest 2.1 Hough Forest 1 2.2 IS1-09 第 回画像センシングシンポジウム, 横浜,14 年 6 月 MI-Hough Forest () E-mail: ym@vision.cs.chubu.ac.jphf@cs.chubu.ac.jp Abstract Hough Forest Random Forest MI-Hough Forest Multiple Instance Learning Bag Hough Forest

More information

Microsoft PowerPoint - 【5】説明資料_池辺将之

Microsoft PowerPoint - 【5】説明資料_池辺将之 Time to digital converter の A/D 変換器への利用とその低電力化 国立大学法人北海道大学 大学院情報科学研究科 准教授池辺将之 背景 センシングされたアナログ情報をデジタル信号へ AD 変換器 (ADC) への要求 低電力 小面積 高速動作 Single-slope ADC に注目 シンプルな構成で小面積 Wikipedia: CMOS image sensor 課題 :

More information

Fig Measurement data combination. 2 Fig. 2. Ray vector. Fig (12) 1 2 R 1 r t 1 3 p 1,i i 2 3 Fig.2 R 2 t 2 p 2,i [u, v] T (1)(2) r R 1 R 2

Fig Measurement data combination. 2 Fig. 2. Ray vector. Fig (12) 1 2 R 1 r t 1 3 p 1,i i 2 3 Fig.2 R 2 t 2 p 2,i [u, v] T (1)(2) r R 1 R 2 IP 06 16 / IIS 06 32 3 3-D Environment Modeling from Images Acquired with an Omni-Directional Camera Mounted on a Mobile Robot Atsushi Yamashita, Tomoaki Harada, Ryosuke Kawanishi, Toru Kaneko (Shizuoka

More information

(a) (b) 2 2 (Bosch, IR Illuminator 850 nm, UFLED30-8BD) ( 7[m] 6[m]) 3 (PointGrey Research Inc.Grasshopper2 M/C) Hz (a) (b

(a) (b) 2 2 (Bosch, IR Illuminator 850 nm, UFLED30-8BD) ( 7[m] 6[m]) 3 (PointGrey Research Inc.Grasshopper2 M/C) Hz (a) (b (MIRU202) 202 8 AdrianStoica 89 0395 744 89 0395 744 Jet Propulsion Laboratory 4800 Oak Grove Drive, Pasadena, CA 909, USA E-mail: uchino@irvs.ait.kyushu-u.ac.jp, {yumi,kurazume}@ait.kyushu-u.ac.jp 2 nearest

More information

Convolutional Neural Network A Graduation Thesis of College of Engineering, Chubu University Investigation of feature extraction by Convolution

Convolutional Neural Network A Graduation Thesis of College of Engineering, Chubu University Investigation of feature extraction by Convolution Convolutional Neural Network 2014 3 A Graduation Thesis of College of Engineering, Chubu University Investigation of feature extraction by Convolutional Neural Network Fukui Hiroshi 1940 1980 [1] 90 3

More information

untitled

untitled IT E- IT http://www.ipa.go.jp/security/ CERT/CC http://www.cert.org/stats/#alerts IPA IPA 2004 52,151 IT 2003 12 Yahoo 451 40 2002 4 18 IT 1/14 2.1 DoS(Denial of Access) IDS(Intrusion Detection System)

More information

17 Proposal of an Algorithm of Image Extraction and Research on Improvement of a Man-machine Interface of Food Intake Measuring System

17 Proposal of an Algorithm of Image Extraction and Research on Improvement of a Man-machine Interface of Food Intake Measuring System 1. (1) ( MMI ) 2. 3. MMI Personal Computer(PC) MMI PC 1 1 2 (%) (%) 100.0 95.2 100.0 80.1 2 % 31.3% 2 PC (3 ) (2) MMI 2 ( ),,,, 49,,p531-532,2005 ( ),,,,,2005,p66-p67,2005 17 Proposal of an Algorithm of

More information

1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15. 1. 2. 3. 16 17 18 ( ) ( 19 ( ) CG PC 20 ) I want some rice. I want some lice. 21 22 23 24 2001 9 18 3 2000 4 21 3,. 13,. Science/Technology, Design, Experiments,

More information

4. C i k = 2 k-means C 1 i, C 2 i 5. C i x i p [ f(θ i ; x) = (2π) p 2 Vi 1 2 exp (x µ ] i) t V 1 i (x µ i ) 2 BIC BIC = 2 log L( ˆθ i ; x i C i ) + q

4. C i k = 2 k-means C 1 i, C 2 i 5. C i x i p [ f(θ i ; x) = (2π) p 2 Vi 1 2 exp (x µ ] i) t V 1 i (x µ i ) 2 BIC BIC = 2 log L( ˆθ i ; x i C i ) + q x-means 1 2 2 x-means, x-means k-means Bayesian Information Criterion BIC Watershed x-means Moving Object Extraction Using the Number of Clusters Determined by X-means Clustering Naoki Kubo, 1 Kousuke

More information

1 osana@eee.u-ryukyu.ac.jp : FPGA : HDL, Xilinx Vivado + Digilent Nexys4 (Artix-7 100T) LSI / PC clock accurate / Artix-7 XC7A100T Kintex-7 XC7K325T : CAD Hands-on: HDL (Verilog) CAD (Vivado HLx) : 28y4

More information

,4) 1 P% P%P=2.5 5%!%! (1) = (2) l l Figure 1 A compilation flow of the proposing sampling based architecture simulation

,4) 1 P% P%P=2.5 5%!%! (1) = (2) l l Figure 1 A compilation flow of the proposing sampling based architecture simulation 1 1 1 1 SPEC CPU 2000 EQUAKE 1.6 50 500 A Parallelizing Compiler Cooperative Multicore Architecture Simulator with Changeover Mechanism of Simulation Modes GAKUHO TAGUCHI 1 YOUICHI ABE 1 KEIJI KIMURA 1

More information

179Ł\”ƒ

179Ł\”ƒ 2001 6 BGA/CSPSIP Series http://www.rlz.co.jp No.179 C o n t e n t s Feature... 2 Special Issue BGA/CSPSIP... 4... 8... 12, *,, * Series 1... 17 Challenge of Intelligence for Future BREAK THROUGH 2001.6

More information

smpp_resume.dvi

smpp_resume.dvi 6 mmiki@mail.doshisha.ac.jp Parallel Processing Parallel Pseudo-parallel Concurrent 1) 1/60 1) 1997 5 11 IBM Deep Blue Deep Blue 2) PC 2000 167 Rank Manufacturer Computer Rmax Installation Site Country

More information

Abstract This paper concerns with a method of dynamic image cognition. Our image cognition method has two distinguished features. One is that the imag

Abstract This paper concerns with a method of dynamic image cognition. Our image cognition method has two distinguished features. One is that the imag 2004 RGB A STUDY OF RGB COLOR INFORMATION AND ITS APPLICATION 03R3237 Abstract This paper concerns with a method of dynamic image cognition. Our image cognition method has two distinguished features. One

More information

main.dvi

main.dvi A 1/4 1 1/ 1/1 1 9 6 (Vergence) (Convergence) (Divergence) ( ) ( ) 97 1) S. Fukushima, M. Takahashi, and H. Yoshikawa: A STUDY ON VR-BASED MUTUAL ADAPTIVE CAI SYSTEM FOR NUCLEAR POWER PLANT, Proc. of FIFTH

More information

24 FFT Self-Timeed Pipeline Implementation of Adaptive FFT for Different Rate Signals

24 FFT Self-Timeed Pipeline Implementation of Adaptive FFT for Different Rate Signals 24 FFT Self-Timeed Pipeline Implementation of Adaptive FFT for Different Rate Signals 1155064 2013 2 5 FFT HetNet (FFT) FFT. (STP) FFT STP FFT FFT FFT FPGA(Altera stratixii) HetNet FFT STP i Abstract Self-Timeed

More information

RW1097-0A-001_V0.1_170106

RW1097-0A-001_V0.1_170106 INTRODUCTION RW1097 is a dot matrix LCD driver & controller LSI which is fabricated by low power CMOS technology. It can display 1line/2line/3line/4line/5line/6lines x 12 (16 x 16 dot format) with the

More information

(4) ω t(x) = 1 ω min Ω ( (I C (y))) min 0 < ω < C A C = 1 (5) ω (5) t transmission map tmap 1 4(a) 2. 3 2. 2 t 4(a) t tmap RGB 2 (a) RGB (A), (B), (C)

(4) ω t(x) = 1 ω min Ω ( (I C (y))) min 0 < ω < C A C = 1 (5) ω (5) t transmission map tmap 1 4(a) 2. 3 2. 2 t 4(a) t tmap RGB 2 (a) RGB (A), (B), (C) (MIRU2011) 2011 7 890 0065 1 21 40 105-6691 1 1 1 731 3194 3 4 1 338 8570 255 346 8524 1836 1 E-mail: {fukumoto,kawasaki}@ibe.kagoshima-u.ac.jp, ryo-f@hiroshima-cu.ac.jp, fukuda@cv.ics.saitama-u.ac.jp,

More information

光学

光学 Fundamentals of Projector-Camera Systems and Their Calibration Methods Takayuki OKATANI To make the images projected by projector s appear as desired, it is e ective and sometimes an only choice to capture

More information

untitled

untitled Application of image correlation technique to determination of in-plane deformation distribution of paper Toshiharu Enomae Graduate School of Agricultural and Life Sciences The University of Tokyo 1 Peters

More information

組込みシステムシンポジウム2011 Embedded Systems Symposium 2011 ESS /10/20 FPGA Android Android Java FPGA Java FPGA Dalvik VM Intel Atom FPGA PCI Express DM

組込みシステムシンポジウム2011 Embedded Systems Symposium 2011 ESS /10/20 FPGA Android Android Java FPGA Java FPGA Dalvik VM Intel Atom FPGA PCI Express DM Android Android Java Java Dalvik VM Intel Atom PCI Express DMA 1.25 Gbps Atom Android Java Acceleration with an Accelerator in an Android Mobile Terminal Keisuke Koike, Atsushi Ohta, Kohta Ohshima, Kaori

More information

Fig. 1 Relative delay coding.

Fig. 1 Relative delay coding. An Architecture of Small-scaled Neuro-hardware Using Probabilistically-coded Pulse Neurons Takeshi Kawashima, Non-member (DENSO CORPORATION), Akio Ishiguro, Member (Nagoya University), Shigeru Okuma, Member

More information

c2

c2 c1 c2 Digital Image Innovation 1 2002 2003 2003... 1,274,109 1,322,453 $11,002,105... 336,108 362,588 3,016,539... 309,912 313,228 2,605,890... 26,196 49,360 410,649... (18,382) 31,629 263,136... (18,432)

More information

Real AdaBoost HOG 2009 3 A Graduation Thesis of College of Engineering, Chubu University Efficient Reducing Method of HOG Features for Human Detection based on Real AdaBoost Chika Matsushima ITS Graphics

More information

H(ω) = ( G H (ω)g(ω) ) 1 G H (ω) (6) 2 H 11 (ω) H 1N (ω) H(ω)= (2) H M1 (ω) H MN (ω) [ X(ω)= X 1 (ω) X 2 (ω) X N (ω) ] T (3)

H(ω) = ( G H (ω)g(ω) ) 1 G H (ω) (6) 2 H 11 (ω) H 1N (ω) H(ω)= (2) H M1 (ω) H MN (ω) [ X(ω)= X 1 (ω) X 2 (ω) X N (ω) ] T (3) 72 12 2016 pp. 777 782 777 * 43.60.Pt; 43.38.Md; 43.60.Sx 1. 1 2 [1 8] Flexible acoustic interface based on 3D sound reproduction. Yosuke Tatekura (Shizuoka University, Hamamatsu, 432 8561) 2. 2.1 3 M

More information

GPGPU

GPGPU GPGPU 2013 1008 2015 1 23 Abstract In recent years, with the advance of microscope technology, the alive cells have been able to observe. On the other hand, from the standpoint of image processing, the

More information