Cyclone II FPGAスターター開発ボード・リファレンス・マニュアル
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1 Cyclone II FPGA 101 Innovation Drive San Jose, CA (408)
2 Copyright 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. : MNL-CDK ii Altera Corporation
3 ...v Cyclone II FPGA 1 3 JTAG 1 4 AS JTAG FPGA 1 4 AS EPCS Cyclone II EP2C20 FPGA USB Blaster 1 8 SRAM SDRAM SD CODEC VGA Cyclone II EP2C20 FPGA USB-Blaster 2 2 EPCS VGA DAC VGA 2 3 VGA 2 4 VGA 2 5 CODEC Altera Corporation iii Preliminary
4 SDRAM 2 7 SRAM ON/OFF 2 15 RUN/PROG LED LED 2 20 LED USB-Blaster SD 2 32 RS RS RS PS/ PS/ PS/ VGA SMA iv Altera Corporation Preliminary
5 Cyclone II FPGA Cyclone II FPGA 2 1 CD_ROM readme Cyclone II FPGA 1.0 PDF Portable Document Format Adobe Acrobat Reader Edit /Find /Search Bookmarks 1 Pages Altera Corporation v Cyclone II FPGA
6 Save As f MAX, \qdesigns d: chiptrip.gdf AN 75: High-Speed Board Design t PIA, n + 1 (< >) < > < >.pof Courier Delete Options Courier data1 tdi input Low n ( resetn) Courier ( c:\qdesigns\tutorial\chiptrip.gdf) Report ( AHDL SUBDESIGN) ( TRI) Courier a. b. c. 1 CAUTION Enter vi Altera Corporation Cyclone II FPGA
7 1. Cyclone II FPGA 1-1 API SRAM/SDRAM/ 1-1. Altera Corporation
8 Cyclone II EP2C20 FPGA EPCS4 JTAG Active Serial AS API USB-Blaster 512 K SRAM 8 M SDRAM 4 M SD LED 8 LED 50 MHz 27 MHz 24 MHz 24 CD CODEC VGA VGA DAC 4 RS PS/2 / V DC USB FPGA I/O Quartus II Quartus II Cyclone II FPGA CD-ROM Examples 1 2 Altera Corporation Cyclone II FPGA
9 1-2 Cyclone II FPGA FPGA 1-2. Cyclone II FPGA Cyclone II FPGA USB-Blaster Cyclone II FPGA EEPROM EPCS4 EEPROM FPGA Quartus II FPGA EEPROM FPGA 2 JTAG Active Serial AS Altera Corporation Cyclone II FPGA
10 JTAG IEEE Joint Test Action Group USB- Blaster Cyclone II FPGA FPGA USB-Blaster BoardDesignFiles / Schematic Cyclone II FPGA AS Active Serial EPCS4 EEPROM EEPROM Cyclone II FPGA EPCS4 Cyclone II FPGA JTAG AS Cyclone II FPGA USB USB-Blaster JTAG AS JTAG FPGA 1-3 JTAG Cyclone II FPGA 1. Cyclone II FPGA 2. USB USB-Blaster 1 4 Altera Corporation Cyclone II FPGA
11 3. RUN/PROG RUN JTAG 4. FPGA Quartus II Programmer.sof 1-3. JTAG USB Blaster Circuit USB MAX 3128 RUN/PROG RUN JTAG Config Port Auto Power on Config FPGA EPCS Serial Configuration Device AS EPCS4 1-4 AS EPCS4 EEPROM 1. Cyclone II FPGA 2. USB USB-Blaster 3. RUN/PROG PROG JTAG 4. EPCS4 Quartus II Programmer.sof 5. RUN/PROG RUN Altera Corporation Cyclone II FPGA
12 6. EPCS4 FPGA EPCS AS USB Blaster Circuit USB MAX 3128 RUN/PROG PROG JTAG Config Port Auto Power on Config FPGA EPCS Serial Configuration Device Cyclone II FPGA / U2 Cyclone II FPGA EP2C20 KEY0 KEY3 FPGA 4 SW0 SW9 FPGA 10 LEDG0 LEDG7 LED FPGA 8 LED LEDR0 LEDR9 LED FPGA 10 LED HEX0 HEX3 7 LED FPGA 4 7 LED U7 SRAM 512 K SRAM 1 6 Altera Corporation Cyclone II FPGA
13 1 1. Cyclone II FPGA / U9 FPGA 4 M LED7 U6 DDR SDRAM 8 M DDR SDRAM PS2KB PS/2 PS/2 RS232 5 V 9 RS-232 RS-232 JP1 FPGA 40 I/O 1 JP2 FPGA 40 I/O 2 MIC CODEC LINEIN LINEOUT VGA VGA VGA SD CARD SD Secure Data BLASTER JTAG MAX USB Blaster JTAG U16 SW11 / FPGA EPCS4 Y1 FPGA 50 MHz Y2 FPGA 27 MHz Y3 FPGA 24 MHz EXT_CLOCK FPGA DC7.5V DC 7.5 V DC Altera Corporation Cyclone II FPGA
14 2 Cyclone II EP2C20 FPGA 18,752 LE 52 M4K RAM 240K RAM 26 4 PLL 315 I/O 484 FineLine BGA USB Blaster EPCS4 API USB-Blaster JTAG AS SRAM 512 K RAM 256 K x 16 Nios II GUI SDRAM 8 M RAM 1 M x 16 x 4 Nios II GUI 4 M NOR 8 Nios II GUI 1 8 Altera Corporation Cyclone II FPGA
15 SD SD SPI Nios II DE1 SD 4 HIGH 1 LOW 10 DOWN 0 UP 1 50 z 27 z 24 z SMA CODEC Wolfson WM CODEC 8 96 KHz MP3 PDA VGA 4 DAC 15 D 60 Hz 640 x 480 Cyclone II FPGA TV Altera Corporation Cyclone II FPGA
16 1 RS PS/2 RS-232 DB-9 PS2 PS/ Cyclone II I/O IDE Altera Corporation Cyclone II FPGA
17 2. Cyclone II EP2C20 FPGA USB-Blaster EPCS4 VGA DAC 24 CODEC 8 M SDRAM 512 K SRAM 4 M ON/OFF RUN/PROG 4 10 LED USB-Blaster 2 40 SD RS-232 PS/2 VGA SMA 7.5 V Altera Corporation
18 Cyclone II EP2C20 FPGA 484 FineLine BGA Cyclone II EP2C20 FPGA 2 1 FPGA 2 1. Cyclone II EP2C20 FPGA LE 18,752 M4K 52 RAM 240K PLL 4 I/O 315 EP2C20 Cyclone II Cyclone II USB-Blaster Cyclone II FPGA USB-Blaster USB-Blaster Altera USB-BlasterUSB-Blaster FPGA FPGA FPGA Cyclone II FPGA EPCS4 Cyclone II FPGA Cyclone II FPGA EPCS4 EEPROM EPCS4 FPGA USB-Blaster Quartus II EEPROM EPCS4 FPGA 2 2 Altera Corporation Cyclone II FPGA
19 FPGA 1 3 Cyclone II FPGA Cyclone II FPGA EPCS4 VGA DAC 4 VGA - DAC MHz VGA 100 MHz VGA DAC FPGA TV FPGA VGA 16 D-SUB VGA DAC RGB VGA 2-1 VGA hsync a 2 2 LOW 1 hsync RGB b 0V 2-1. VGA b c RGB RGB RGB hsync d 2-1 vsync 1 Altera Corporation Cyclone II FPGA
20 2 2 VGA 2 2. VGA (H V) a (µs) b (µs) c (µs) d (µs) (MHz) VGA (60 Hz) (640/c) 2 3 VGA 2 3. VGA (H V) a b c d VGA (60 Hz) VGA 2 4 VGA FPGA 2 4. VGA FPGA FPGA VGA_R[0] PIN_D9 VGA Red[0] VGA_R[1] PIN_C9 VGA Red[1] VGA_R[2] PIN_A7 VGA Red[2] VGA_R[3] PIN_B7 VGA Red[3] VGA_G[0] PIN_B8 VGA Green[0] VGA_G[1] PIN_C10 VGA Green[1] VGA_G[2] PIN_B9 VGA Green[2] VGA_G[3] PIN_A8 VGA Green[3] VGA_B[0] PIN_A9 VGA Blue[0] VGA_B[1] PIN_D11 VGA Blue[1] VGA_B[2] PIN_A10 VGA Blue[2] VGA_B[3] PIN_B10 VGA Blue[3] VGA_HS PIN_A11 VGA H_SYNC VGA_VS PIN_B11 VGA V_SYNC 2 4 Altera Corporation Cyclone II FPGA
21 VGA 2-2 VGA 2-2. VGA Altera Corporation Cyclone II FPGA
22 CODEC MP3 PDA Wolfson WM / CODEC 8 96 khz FPGA I2C WM8731 CODEC WM8731 CODEC BoardDesignFiles\Datasheet Altera Corporation Cyclone II FPGA
23 2 5 FPGA 2 5. FPGA FPGA AUD_ADCLRCK PIN_A6 CODEC ADC LR AUD_ADCDAT PIN_B6 CODEC ADC AUD_DACLRCK PIN_A5 CODEC DAC LR AUD_DACDAT PIN_B5 CODEC DAC AUD_XCK PIN_B4 CODEC AUD_BCLK PIN_A4 CODEC I2C_SCLK PIN_A3 I2C I2C_SDAT PIN_B3 I2C 3 8-M SDRAM 512-K SRAM 4-M BoardDesignFiles\Datasheet SDRAM 2-4 SDRAM Altera Corporation Cyclone II FPGA
24 2-4. SDRAM 2 6 SDRAM FPGA 2 6. SDRAM FPGA / FPGA DRAM_ADDR[0] PIN_W4 SDRAM [0] DRAM_ADDR[1] PIN_W5 SDRAM [1] DRAM_ADDR[2] PIN_Y3 SDRAM [2] DRAM_ADDR[3] PIN_Y4 SDRAM [3] DRAM_ADDR[4] PIN_R6 SDRAM [4] DRAM_ADDR[5] PIN_R5 SDRAM [5] DRAM_ADDR[6] PIN_P6 SDRAM [6] 2 8 Altera Corporation Cyclone II FPGA
25 2 6. SDRAM FPGA / FPGA DRAM_ADDR[7] PIN_P5 SDRAM [7] DRAM_ADDR[8] PIN_P3 SDRAM [8] DRAM_ADDR[9] PIN_N4 SDRAM [9] DRAM_ADDR[10] PIN_W3 SDRAM [10] DRAM_ADDR[11] PIN_N6 SDRAM [11] DRAM_DQ[0] PIN_U1 SDRAM [0] DRAM_DQ[1] PIN_U2 SDRAM [1] DRAM_DQ[2] PIN_V1 SDRAM [2] DRAM_DQ[3] PIN_V2 SDRAM [3] DRAM_DQ[4] PIN_W1 SDRAM [4] DRAM_DQ[5] PIN_W2 SDRAM [5] DRAM_DQ[6] PIN_Y1 SDRAM [6] DRAM_DQ[7] PIN_Y2 SDRAM [7] DRAM_DQ[8] PIN_N1 SDRAM [8] DRAM_DQ[9] PIN_N2 SDRAM [9] DRAM_DQ[10] PIN_P1 SDRAM [10] DRAM_DQ[11] PIN_P2 SDRAM [11] DRAM_DQ[12] PIN_R1 SDRAM [12] DRAM_DQ[13] PIN_R2 SDRAM [13] DRAM_DQ[14] PIN_T1 SDRAM [14] DRAM_DQ[15] PIN_T2 SDRAM [15] DRAM_BA_0 PIN_U3 SDRAM [0] DRAM_BA_1 PIN_V4 SDRAM [1] DRAM_LDQM PIN_R7 SDRAM DRAM_UDQM PIN_M5 SDRAM DRAM_RAS_N PIN_T5 SDRAM DRAM_CAS_N PIN_T3 SDRAM DRAM_CKE PIN_N3 SDRAM DRAM_CLK PIN_U4 SDRAM DRAM_WE_N PIN_R8 SDRAM DRAM_CS_N PIN_T6 SDRAM Altera Corporation Cyclone II FPGA
26 SRAM 2-5 SRAM 2-5. SRAM 2 7 SRAM FPGA 2 7. SRAM FPGA / FPGA SRAM_ADDR[0] PIN_AA3 SRAM [0] SRAM_ADDR[1] PIN_AB3 SRAM [1] SRAM_ADDR[2] PIN_AA4 SRAM [2] SRAM_ADDR[3] PIN_AB4 SRAM [3] SRAM_ADDR[4] PIN_AA5 SRAM [4] SRAM_ADDR[5] PIN_AB10 SRAM [5] SRAM_ADDR[6] PIN_AA11 SRAM [6] 2 10 Altera Corporation Cyclone II FPGA
27 2 7. SRAM FPGA / FPGA SRAM_ADDR[7] PIN_AB11 SRAM [7] SRAM_ADDR[8] PIN_V11 SRAM [8] SRAM_ADDR[9] PIN_W11 SRAM [9] SRAM_ADDR[10] PIN_R11 SRAM [10] SRAM_ADDR[11] PIN_T11 SRAM [11] SRAM_ADDR[12] PIN_Y10 SRAM [12] SRAM_ADDR[13] PIN_U10 SRAM [13] SRAM_ADDR[14] PIN_R10 SRAM [14] SRAM_ADDR[15] PIN_T7 SRAM [15] SRAM_ADDR[16] PIN_Y6 SRAM [16] SRAM_ADDR[17] PIN_Y5 SRAM [17] SRAM_DQ[0] PIN_AA6 SDRAM [0] SRAM_DQ[1] PIN_AB6 SDRAM [1] SRAM_DQ[2] PIN_AA7 SDRAM [2] SRAM_DQ[3] PIN_AB7 SDRAM [3] SRAM_DQ[4] PIN_AA8 SDRAM [4] SRAM_DQ[5] PIN_AB8 SDRAM [5] SRAM_DQ[6] PIN_AA9 SDRAM [6] SRAM_DQ[7] PIN_AB9 SDRAM [7] SRAM_DQ[8] PIN_Y9 SDRAM [8] SRAM_DQ[9] PIN_W9 SDRAM [9] SRAM_DQ[10] PIN_V9 SDRAM [10] SRAM_DQ[11] PIN_U9 SDRAM [11] SRAM_DQ[12] PIN_R9 SDRAM [12] SRAM_DQ[13] PIN_W8 SDRAM [13] SRAM_DQ[14] PIN_V8 SDRAM [14] SRAM_DQ[15] PIN_U8 SDRAM [15] SRAM_WE_N PIN_AA10 SRAM SRAM_OE_N PIN_T8 SRAM SRAM_UB_N PIN_W7 SRAM SRAM_LB_N PIN_Y7 SRAM SRAM_CE_N PIN_AB5 SRAM Altera Corporation Cyclone II FPGA
28 FPGA 2 8. FPGA / FPGA FL_ADDR[0] PIN_AB20 FLASH [0] FL_ADDR[1] PIN_AA14 FLASH [1] FL_ADDR[2] PIN_Y16 FLASH [2] FL_ADDR[3] PIN_R15 FLASH [3] FL_ADDR[4] PIN_T15 FLASH [4] FL_ADDR[5] PIN_U15 FLASH [5] FL_ADDR[6] PIN_V15 FLASH [6] FL_ADDR[7] PIN_W15 FLASH [7] FL_ADDR[8] PIN_R14 FLASH [8] FL_ADDR[9] PIN_Y13 FLASH [9] 2 12 Altera Corporation Cyclone II FPGA
29 2 8. FPGA / FPGA FL_ADDR[10] PIN_R12 FLASH [10] FL_ADDR[11] PIN_T12 FLASH [11] FL_ADDR[12] PIN_AB14 FLASH [12] FL_ADDR[13] PIN_AA13 FLASH [13] FL_ADDR[14] PIN_AB13 FLASH [14] FL_ADDR[15] PIN_AA12 FLASH [15] FL_ADDR[16] PIN_AB12 FLASH [16] FL_ADDR[17] PIN_AA20 FLASH [17] FL_ADDR[18] PIN_U14 FLASH [18] FL_ADDR[19] PIN_V14 FLASH [19] FL_ADDR[20] PIN_U13 FLASH [20] FL_ADDR[21] PIN_R13 FLASH [21] FL_ADDR[0] PIN_AB20 FLASH [0] FL_ADDR[1] PIN_AA14 FLASH [1] FL_DQ[0] PIN_AB16 FLASH [0] FL_DQ[1] PIN_AA16 FLASH [1] FL_DQ[2] PIN_AB17 FLASH [2] FL_DQ[3] PIN_AA17 FLASH [3] FL_DQ[4] PIN_AB18 FLASH [4] FL_DQ[5] PIN_AA18 FLASH [5] FL_DQ[6] PIN_AB19 FLASH [6] FL_DQ[7] PIN_AA19 FLASH [7] FL_OE_N PIN_AA15 FL_RST_N PIN_W14 FL_WE_N PIN_Y MHz 50 MHz A SMA EXT CLK USB-Blaster 24 MHz Altera Corporation Cyclone II FPGA
30 FPGA 2 9. FPGA FPGA CLOCK_27 PIN_D12 27 MHz CLOCK_50 PIN_L1 50 MHz CLOCK_24 PIN_B12 USB Blaster 24 MHz EXT_CLOCK PIN_M21 SMA 2 14 Altera Corporation Cyclone II FPGA
31 ON/OFF RUN/PROG 4 10 ON/OFF Cyclone II FPGA USB 7.5V On/Off RUN/PROG RUN/PROG RUN 2-8 JTAG USB-Blaster FPGA PROG 2-9 EPCS4 EEPROM 2-8. RUN RUN/PROG USB Blaster Circuit USB MAX 3128 RUN/PROG RUN JTAG Config Port Auto Power on Config FPGA EPCS Serial Configuration Device Altera Corporation Cyclone II FPGA
32 2-9. PROG RUN/PROG USB Blaster Circuit USB MAX 3128 RUN/PROG PROG JTAG Config Port Auto Power on Config FPGA EPCS Serial Configuration Device RUN/PROG RUN FPGA EPCS4 RUN Quartus II Programmer FPGA USB Blaster PROG Quartus II Programmer EPCS4 LED LEDG0 LEDG7 4 KEY0 KEY FPGA LED 2 16 Altera Corporation Cyclone II FPGA
33 0V LOW 3.3V HIGH KEY0 KEY3 FPGA I/O I/O Altera Corporation Cyclone II FPGA
34 2 10 FPGA FPGA FPGA KEY[0] PIN_R22 [0] KEY[1] PIN_R21 [1] KEY[2] PIN_T22 [2] KEY[3] PIN_T21 [3] LED LEDR0 LEDR9 10 SW0 SW FPGA DOWN OFF FPGA LOW 0V UP HIGH 3.3V SW0 SW9 LEDR0 LEDR9 LED 2 18 Altera Corporation Cyclone II FPGA
35 FPGA FPGA FPGA SW[0] PIN_L22 [0] SW[1] PIN_L21 [1] SW[2] PIN_M22 [2] SW[3] PIN_V12 [3] SW[4] PIN_W12 [4] SW[5] PIN_U12 [5] SW[6] PIN_U11 [6] SW[7] PIN_M2 [7] SW[8] PIN_M1 [8] SW[9] PIN_L2 [9] Altera Corporation Cyclone II FPGA
36 LED 7 LED LEDR0 LEDR9 10 LED LEDG0 LEDG7 8 LED LED LED FPGA I/O HIGH LED LOW LED LED 2-15 LED 2 20 Altera Corporation Cyclone II FPGA
37 2-15. LED Altera Corporation Cyclone II FPGA
38 LED 2 12 LED FPGA LED FPGA FPGA LEDR[0] PIN_R20 LED Red[0] LEDR[1] PIN_R19 LED [1] LEDR[2] PIN_U19 LED [2] LEDR[3] PIN_Y19 LED [3] LEDR[4] PIN_T18 LED [4] LEDR[5] PIN_V19 LED [5] LEDR[6] PIN_Y18 LED [6] LEDR[7] PIN_U18 LED [7] LEDR[8] PIN_R18 LED [8] LEDR[9] PIN_R17 LED [9] LEDG[0] PIN_U22 LED [0] LEDG[1] PIN_U21 LED [1] LEDG[2] PIN_V22 LED [2] LEDG[3] PIN_V21 LED [3] LEDG[4] PIN_W22 LED [4] LEDG[5] PIN_W21 LED [5] LEDG[6] PIN_Y22 LED [6] LEDG[7] PIN_Y21 LED [7] 7 FPGA 4 7 HEX0 HEX FPGA I/O LOW HIGH 2 22 Altera Corporation Cyclone II FPGA
39 LED Altera Corporation Cyclone II FPGA
40 FPGA FPGA / FPGA HEX0[0] PIN_J2 7 0[0] HEX0[1] PIN_J1 7 0[1] HEX0[2] PIN_H2 7 0[2] HEX0[3] PIN_H1 7 0[3] HEX0[4] PIN_F2 7 0[4] HEX0[5] PIN_F1 7 0[5] HEX0[6] PIN_E2 7 0[6] 2 24 Altera Corporation Cyclone II FPGA
41 FPGA / FPGA HEX1[0] PIN_E1 7 1[0] HEX1[1] PIN_H6 7 1[1] HEX1[2] PIN_H5 7 1[2] HEX1[3] PIN_H4 7 1[3] HEX1[4] PIN_G3 7 1[4] HEX1[5] PIN_D2 7 1[5] HEX1[6] PIN_D1 7 1[6] HEX2[0] PIN_G5 7 2[0] HEX2[1] PIN_G6 7 2[1] HEX2[2] PIN_C2 7 2[2] HEX2[3] PIN_C1 7 2[3] HEX2[4] PIN_E3 7 2[4] HEX2[5] PIN_E4 7 2[5] HEX2[6] PIN_D3 7 2[6] HEX3[0] PIN_F4 7 3[0] HEX3[1] PIN_D5 7 3[1] HEX3[2] PIN_D6 7 3[2] HEX3[3] PIN_J4 7 3[3] HEX3[4] PIN_L8 7 3[4] HEX3[5] PIN_F3 7 3[5] HEX3[6] PIN_D4 7 3[6] USB B SD RS-232 PS/2 VGA SMA Altera Corporation Cyclone II FPGA
42 USB-Blaster Cyclone II FPGA FPGA EPCS4 USB-Blaster USB B 2-19 USB Blaster 2 2 USB-Blaster USB B 2 40 JP2 JP FPGA 36 DC+5V (VCC5) DC+3.3V (VCC33) 2 GND 40 IDE Altera Corporation Cyclone II FPGA
43 JP1 Altera Corporation Cyclone II FPGA
44 2-21. JP JP Altera Corporation Cyclone II FPGA
45 2-22. JP BoardDesignFiles\Schematic 2 14 FPGA FPGA / FPGA GPIO_0[0] PIN_A13 GPIO 0[0] GPIO_0[1] PIN_B13 GPIO 0[1] GPIO_0[2] PIN_A14 GPIO 0[2] Altera Corporation Cyclone II FPGA
46 2 14. FPGA / FPGA GPIO_0[3] PIN_B14 GPIO 0[3] GPIO_0[4] PIN_A15 GPIO 0[4] GPIO_0[5] PIN_B15 GPIO 0[5] GPIO_0[6] PIN_A16 GPIO 0[6] GPIO_0[7] PIN_B16 GPIO 0[7] GPIO_0[8] PIN_A17 GPIO 0[8] GPIO_0[9] PIN_B17 GPIO 0[9] GPIO_0[10] PIN_A18 GPIO 0[10] GPIO_0[11] PIN_B18 GPIO 0[11] GPIO_0[12] PIN_A19 GPIO 0[12] GPIO_0[13] PIN_B19 GPIO 0[13] GPIO_0[14] PIN_A20 GPIO 0[14] GPIO_0[15] PIN_B20 GPIO 0[15] GPIO_0[16] PIN_C21 GPIO 0[16] GPIO_0[17] PIN_C22 GPIO 0[17] GPIO_0[18] PIN_D21 GPIO 0[18] GPIO_0[19] PIN_D22 GPIO 0[19] GPIO_0[20] PIN_E21 GPIO 0[20] GPIO_0[21] PIN_E22 GPIO 0[21] GPIO_0[22] PIN_F21 GPIO 0[22] GPIO_0[23] PIN_F22 GPIO 0[23] GPIO_0[24] PIN_G21 GPIO 0[24] GPIO_0[25] PIN_G22 GPIO 0[25] GPIO_0[26] PIN_J21 GPIO 0[26] GPIO_0[27] PIN_J22 GPIO 0[27] GPIO_0[28] PIN_K21 GPIO 0[28] GPIO_0[29] PIN_K22 GPIO 0[29] GPIO_0[30] PIN_J19 GPIO 0[30] GPIO_0[31] PIN_J20 GPIO 0[31] GPIO_0[32] PIN_J18 GPIO 0[32] GPIO_0[33] PIN_K20 GPIO 0[33] GPIO_0[34] PIN_L19 GPIO 0[34] 2 30 Altera Corporation Cyclone II FPGA
47 2 14. FPGA / FPGA GPIO_0[35] PIN_L18 GPIO 0[35] GPIO_1[0] PIN_H12 GPIO 1[0] GPIO_1[1] PIN_H13 GPIO 1[1] GPIO_1[2] PIN_H14 GPIO 1[2] GPIO_1[3] PIN_G15 GPIO 1[3] GPIO_1[4] PIN_E14 GPIO 1[4] GPIO_1[5] PIN_E15 GPIO 1[5] GPIO_1[6] PIN_F15 GPIO 1[6] GPIO_1[7] PIN_G16 GPIO 1[7] GPIO_1[8] PIN_F12 GPIO 1[8] GPIO_1[9] PIN_F13 GPIO 1[9] GPIO_1[10] PIN_C14 GPIO 1[10] GPIO_1[11] PIN_D14 GPIO 1[11] GPIO_1[12] PIN_D15 GPIO 1[12] GPIO_1[13] PIN_D16 GPIO 1[13] GPIO_1[14] PIN_C17 GPIO 1[14] GPIO_1[15] PIN_C18 GPIO 1[15] GPIO_1[16] PIN_C19 GPIO 1[16] GPIO_1[17] PIN_C20 GPIO 1[17] GPIO_1[18] PIN_D19 GPIO 1[18] GPIO_1[19] PIN_D20 GPIO 1[19] GPIO_1[20] PIN_E20 GPIO 1[20] GPIO_1[21] PIN_F20 GPIO 1[21] GPIO_1[22] PIN_E19 GPIO 1[22] GPIO_1[23] PIN_E18 GPIO 1[23] GPIO_1[24] PIN_G20 GPIO 1[24] GPIO_1[25] PIN_G18 GPIO 1[25] GPIO_1[26] PIN_G17 GPIO 1[26] GPIO_1[27] PIN_H17 GPIO 1[27] GPIO_1[28] PIN_J15 GPIO 1[28] GPIO_1[29] PIN_H18 GPIO 1[29] GPIO_1[30] PIN_N22 GPIO 1[30] Altera Corporation Cyclone II FPGA
![2 14. FPGA / FPGA GPIO_1[31] PIN_N21 GPIO 1[31] GPIO_1[32] PIN_P15 GPIO 1[32] GPIO_1[33] PIN_N15 GPIO 1[33] GPIO_1[34] PIN_P17 GPIO](/docs-images/108/182805996/images/48-0.jpg "1[34] GPIO_1[35] PIN_P18 GPIO 1[35] SD Cyclone II FPGA SD SD U8 2-23 2-23.")
48 2 14. FPGA / FPGA GPIO_1[31] PIN_N21 GPIO 1[31] GPIO_1[32] PIN_P15 GPIO 1[32] GPIO_1[33] PIN_N15 GPIO 1[33] GPIO_1[34] PIN_P17 GPIO 1[34] GPIO_1[35] PIN_P18 GPIO 1[35] SD Cyclone II FPGA SD SD U SD 2-24 SD 2 32 Altera Corporation Cyclone II FPGA
49 2-24. SD 2 15 FPGA SD SD FPGA FPGA SD_DAT W20 SD SD_DAT3 U20 SD SD_CMD Y20 SD SD_CLK V20 SD RS-232 MAX232 RS D-SUB 2-25 BoardDesignFiles\Datasheet Altera Corporation Cyclone II FPGA
50 2-25. RS-232 RS RS RS Altera Corporation Cyclone II FPGA
51 RS RS-232 FPGA RS-232 FPGA FPGA UART_RXD PIN_F14 UART UART_TXD PIN_G12 UART PS/2 PS/2 PS/2 PS/ PS/ PS/2 Altera Corporation Cyclone II FPGA
52 PS/ PS/2 FPGA PS/2 FPGA FPGA PS2_CLK PIN_H15 PS/2 PS2_DAT PIN_J14 PS/2 VGA Cyclone II FPGA 4 DAC 2-28 DB15 15 VGA 2 3 VGA DAC VGA 2 36 Altera Corporation Cyclone II FPGA
53 2-29 MIC LINEIN LINEOUT 2 6 CODEC SMA FPGA 2-30 SMA J Altera Corporation Cyclone II FPGA
54 2-30. SMA Cyclone II FPGA USB J8 7.5V Altera Corporation Cyclone II FPGA
DDR3 SDRAMメモリ・インタフェースのレベリング手法の活用
WP-01034-1.0/JP DLL (PVT compensation) 90 PLL PVT compensated FPGA fabric 90 Stratix III I/O block Read Dynamic OC T FPGA Write Memory Run Time Configurable Run Time Configurable Set at Compile dq0 dq1
ダウンロード方法アルテラのソフトウェアをインストールするためのダウンロード ファイルには以下の種類があります.tar フォーマットのソフトウェアとデバイス ファイルの完全なセット ダウンロードとインストールをカスタマイズするための個別の実行ファイル ディスクに焼いて他の場所にインストールするための
Quartus II ソフトウェア ダウンロードおよびインストール クイック スタート ガイド 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of
ダウンロード方法 アルテラのソフトウェアをインストールするためのダウンロード ファイルには以下の種類が あります.tar フォーマットのソフトウェアとデバイス ファイルがバンドルされたセット ダウンロードとインストールをカスタマイズするための個別の実行ファイル ディスクに焼いて他の場所にインストール
Quartus II ソフトウェア ダウンロードおよびインストール クイック スタート ガイド 2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of
ダウンロード方法 アルテラのソフトウェアをインストールするためのダウンロード ファイルには以下の種類があります.tar フォーマットのソフトウェアとデバイス ファイルがバンドルされたセット ダウンロードとインストールをカスタマイズするための個別の実行ファイル ディスクに焼いて他の場所にインストールす
Quartus Prime ソフトウェア ダウンロードおよびインストール クイック スタート ガイド 2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks
Microsoft Word - quick_start_guide_16 1_ja.docx
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