実装規約第1.1版R2.PDF

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1 ISO/IEC IC A B 1 etu 1etu 128/ D fc D 1 etu 1etu 128/fc fc I R S A A B B 187

2 ACK positive ACKnowledgement ATS Answer To Select ATQB Answer To request for PICC B CID Card IDentifier CRC Cyclic Redunduncy Check IC D Divisor DR Divisor Receive IC DRI Divisor Receive Integer IC DS Divisor Send IC DSI Divisr Send Integer IC EDC Error Detection Code etu elementary time unit fc carrier frequency FSC Frame Size for proximity Card IC FSCI Frame Size for proximity Card Integer IC FSD Frame Size for proximity coupling Device FSDI Frame Size for proximity coupling Device Integer FWI Frame Waiting time Integer FWT Frame Waiting Time FWTTEMP temporary Frame Waiting Time HLTA HaLT command for PICC type A A HALT I-block Information block I INF INformation Field NAD Node ADdress OSI Open Systems Interconnection PCB Protocol Contorol Byte PCD Proximity Coupling Device PICC Proximity IC Card IC PPS Protocol and Parameter Selection 188

3 PPSS Protocol and Parameter Selection Start PPS0 Protocol and Parameter Selection 0 0 PPS1 Protocol and Parameter Selection 1 1 R-block Receive ready block R(ACK) R-block containing a positive acknowredgement R R(NAK) R-block containing a negative acknowredgement R RATS Request for Answer To Select ATS RFU Reserved for Future Use S-block Supervisor block SAK Select AcKnowredge ACK SFGI Start-up Frame Guard time Integer SFGT Start-up Frame Guard Time WUPA Wake-Up command for PICC type A A WTX Waiting Time extension WTXM Waiting Time extension Multiplier xx b 2 xx xx 16 xx 189

4 A ATS SAK SAK ATS HALTA IC HALT ATS SAK RATS IC RATS ATS IC RATS RATS IC ATS ATS PPS IC PPS PPS ATS IC PPS A A 190

5 1.1 ON REQ ATQ WUPA HALT HLTA ISO/IEC ATS no yes RATS DESELECT ATS DESELECT PPS yes no yes no ISO/IEC PPS ISO/IEC PPS A 191

6 192

7 ATS ATS RATS ATS E0 Parameter CRC ATS RATS 2 4 b8 b5 FSDI FSD FSD FSD FSDI FSD 4 b4 b1 CID IC RFU CID IC CID IC IC RATS CID ID b8 b7 b6 b5 b4 b3 b2 b1 CID FSDI RATS FSDI FSD 9 FSDI F FSD RFU 193

8 194

9 ATS ATS ATS ATS IC ATS TL T0 TA 1 TB 1 TC 1 T1 Y 1 FSCI DS DR FWI SFGI Tk CRC1 CRC2 ATS 195

10 TL T0 TA(1) TB(1) TC(1) histoical A1 Ak 196

11 TL ATS 2 CRC TL ATS FSD TL FSD 2 197

12 T0 1 ATS T0 3 b8 0 1 RFU b7 b5 TA(1) TB(1) TC(1) 4 b4 b1 FSCI FSC FSC IC FSCI 2 FSC 32 FSC FSDI FSD FSD b8 b7 b6 b5 b4 b3 b2 b1 0 FSCI 1 TA(1) 1 TB(1) Y 1 1 TC(1) 0 1 RFU 198

13 TA(1) TA(1) TA(1) 4 b8 IC b7 b5 IC DS 000 b b4 0 b RFU b3 b1 IC DR 000 b b8 b7 b6 b5 b4 b3 b2 b1 0 TA(1) D PPS 1 DR 2 1 DR 4 1 DR 8 RFU 1 DS 2 1 DS 4 1 DS 8 1 D 0 D 199

14 TB(1) TB(1) TB(1) TB(1) 2 4 b8 b5 FWI FWT FWT FWI RFU FWI 4 4 b4 b1 SFGI SFGT SFGT ATS IC SGI RFU SFGT SFGI 0 b8 b7 b6 b5 b4 b3 b2 b1 TB(1) SFGT fc 2 SFGI SFGT SFGT SFGT 4949ms SFGI FWI 200

15 TC(1) TC(1) TC(1) 2 b8 b b RFU b2 b1 IC 2 IC IC 10 b CID NAD b8 b7 b6 b5 b4 b3 b2 b NAD 1 CID b RFU TC(1) 201

16 A1 Ak ATS ATS ISO/IEC

17 PPS PPS PPSS PPS0 PPS1 CRC1 CRC2 203

18 PPS PPS PPSS PPSS 2 4 b8 b5 16 D PPS 4 b4 b1 CID IC b8 b7 b6 b5 b4 b3 b2 b CID 1 0 RFU 0 1 RFU 11 b RFU PPSS 204

19 PPS0 PPS0 PPS1 PPS0 PPS0 b8 b7 b6 b5 b4 b3 b2 b RFU 000 b RFU 1 PPS1 000 b RFU PPS0 205

20 PPS1 PPS1 PPS1 3 4 b8 b b RFU b4 b3 DSI IC b2 b1 DRI IC b8 b7 b6 b5 b4 b3 b2 b PPS1 DS DR TA(1) DRI DSI 0000 b RFU D DI D DI D DI 00 b 01 b 10 b 11 b D

21 PPS PPS PPS PPS PPSS PPS PPS PPSS CRC1 CRC2 PPS 207

22 IC 65536/fc 4833 s IC IC 208

23 RATS ATS RATS ATS RATS A B IC IC RATS ATS RATS RATS HALTA 209

24 PPS PPS PPS PPS PPS IC IC RATS ATS PPS PPS PPS PPS PPS PPS PPS PPS PPS 210

25 CID CID n n 0 RATS CID ATS IC CID n IC RATS CID n CID ATS IC CID IC IC CID RATS CID ATS 0 CID IC IC IC CID ATS CID IC IC IC 211

26 B IC B 212

27 chaining OSI 4 213

28 PCB CID NAD INF EDC

29 3 PCB CID ID NAD PCB PCB 3 I R R S IC 2 S 1 DESELECT PCB I PCB R PCB S PCB PCB ISO/IEC RFU 215

30 b8 b7 b6 b5 b4 b3 b2 b RFU 1 NAD 1 CID 1 RFU I I PCB b8 b7 b6 b5 b4 b3 b2 b RFU 0 1 RFU 1 CID 0 ACK 1 NAK RFU R R PCB b8 b7 b6 b5 b4 b3 b2 b RFU 1 0 RFU 0 1 RFU 1 CID 00 b DESELECT 11 b WTX S S PCB 216

31 ID CID CID IC CID ID 3 2 b8 b7 IC IC 0 b6 b5 00 b PFU b4 b1 CID b8 b7 b6 b5 b4 b3 b2 b1 0 0 ID CID A ATS B CID 00 b RFU IC CID CID IC CID CID IC CID CID CID CID CID 0 CID CID 217

32 NAD NAD b8 b4 0 NAD ISO/IEC RFU NAD NAD I NAD IC NAD chaining NAD IC NAD IC CID IC NAD NAD 218

33 INF INF I S INF INF 219

34 EDC EDC 220

35 FWT FWT IC IC t FWT FWT FWT /fc 2 FWI FWT 302 s FWT 4833 s FWT 4949ms FWT IC FWT IC FWT IC S(WTX) 1 S(WTX) INF 2 2 b8 b7 6 b6 b1 WTXM RFU 221

36 b8 b7 b6 b5 b4 b3 b2 b1 S(WTX) INF S(WTX) 1 INF S(WTX) IC S(WTX) INF S(WTX) INF INF 2 S(WTX) WTXM 2 b8 b7 00 b RFU b6 b1 FWT WTXM WTXM b8 b7 b6 b5 b4 b3 b2 b1 0 0 S(WTX) INF FWT FWTTEMP FWTTEMP FWT WTXM WTXM 00 b RFU IC FWTTEMP S(WTX) FWTMAX FWTMAX FWTTEMP IC 222

37 B FWI ATQB A FWI TB(1) 223

38 b ID CID FWT IC CID S 2 00 b IC 01 b 10 b 11 b IC 00 b 224

39 IC IC IC IC 225

40 IC IC IC IC IC IC 226

41 chaining IC FSC FCD 1 FSC FCD I PCB M I R 16 3 I(1)x I(0)x R(ACK)x 1 x I 0 x I R 227

42 ABC EF Answer PCB INF EDC XX XX PCB INF EDC ABCD XX XX PCB I(1)0 I(1)1 I(0)0 INF 02 EF EDC XX XX PCB EDC PCB EDC PCB INF EDC A2 XX XX A3 XX XX R(ACK)0 R(ACK)1 I(0)0 02 Answer XX XX ABCD EF Answer NAD CID 228

43 EDC FWT S(DESELECT) IC PCB S(DESELECT) IC IC EDC IC IC S(DESELECT) IC R(NAK) 229

44 A B IC 0 I R(ACK) IC C D E IC 1 I IC IC R(ACK) IC 230

45 1 2 I R(ACK) 3 S S S FWT A B 4 FWT R(NAK) IC S(DESELECT) 5 IC FWT R(ACK) 6 R(ACK) I 7 R(ACK) 8 S(DESELECT) S(DESELECT) S(DESELECT) IC IC 9 IC I R(ACK) S(WTX) 10 I I 11 R(ACK) R(NAK) IC 231

46 12 R(NAK) IC R(ACK) 13 R(ACK) IC IC 232

47 A B IC IC HALT IC DESELECT DESELECT S S(DESELECT) IC S(DESELECT) 233

48 S(DESELECT) IC S(DESELECT) 65536/fc 4833 s 234

49 S(DESELECT) S(DESELECT) IC HALT IC CID S(DESELECT) 235

50 IC 3 IC IC IC IC IC IC IC IDLE IDLE IDLE IC CID 1 1 IDLE IDLE CID 1 1 IDLE IDLE IC CID IDLE CID IDLE IC CID CID CID 3 S(DESELECT) 1 2 HALT CID 2 S(DESELECT) 1 HALT HALT CID 1 S(DESELECT) HALT HALT HALT 236

51 FWT I(1)x I(0)x R(ACK)x R(NAK)x S(...) 1 x I 1 x I R R S IC IC 0 IC 1 237

52 238 IC 1 2 I 1 I 2 I 3 I

53 I 1 I 0 IC 1 1 I(0)0 0 D 1 B 1 I(0) I(0)1 1 D 3 B 0 I(0)1 10 IC 239

54 I(0)0 0 D 2 S(WTX) 9 3 S(WTX) 4 B 1 I(0) I(0)1 1 D 6 B 0 I(0)

55 I(0)0 0 D 8 B 1 I(0) S(DESELECT) 1 D 10 S(DESELECT) 3 241

56 4 0 IC I(1)0 0 D 2 B 1 R(ACK) I(0)1 1 D 4 B 0 I(0) I(0)0 0 D 6 B 1 I(0) IC 0 IC I(0)0 0 D 2 B 1 I(1) R(ACK)1 1 E 4 B 0 I(0) I(0)0 0 D 6 B 1 I(0)

57 I I(0) R(NAK)0 4 R(ACK) I(0)0 0 D 6 B 1 I(0) I(0)1 1 D 8 B 0 I(0)1 10 I 1 7 I I(0)0 0 D 2 B 1 I(0) I(0) R(NAK)1 6 R(ACK) I(0)1 1 D 8 B 0 I(0) I(0)0 0 D 10 B 1 I(0)0 10 I 2 243

58 8 I 0 IC I(0)0 0 D 2 I(0) R(NAK)0 4 B 1 I(0) I(0)1 1 D 6 B 0 I(0)1 10 I 3 9 I I(0)0 0 D 2 I(0) R(NAK) R(NAK)0 6 B 1 I(0) I(0)1 1 D 8 B 0 I(0)1 10 I 4 244

59 I(0)0 0 D 2 S(WTX) R(NAK)0 4 S(WTX) S(WTX) 6 B 1 I(0) I(0)1 1 D 8 B 0 I(0) I(0)0 0 D 2 S(WTX) R(NAK) R(NAK)0 6 S(WTX) S(WTX) 8 B 1 I(0) I(0)1 1 D 10 B 0 I(0)

60 I(0)0 0 D 2 S(WTX) S(WTX) R(NAK)0 6 S(WTX) S(WTX) 8 B 1 I(0) I(0)1 1 D 10 B 0 I(0) IC I(0)0 0 D 2 S(WTX) S(WTX) 4 I(0) R(NAK)0 6 B 1 I(0) I(0)1 1 D 8 B 0 I(0) I(0)0 0 D 2 S(WTX) S(WTX) 4 I(0) R(NAK) R(NAK)0 8 B 1 I(0) I(0)1 1 D 10 B I(0)

61 247

62 I(0)0 D 12 B I(0) S(DESELECT) S(DESELECT) 16 S(DESELECT) 3 248

63 16 0 IC I(1)0 0 D 2 R(ACK) R(NAK)0 4 B 1 R(ACK) I(1)1 1 D 6 B 0 R(ACK) I(0)0 0 D 8 B 1 I(0) I(0)1 1 D 10 B 0 I(0) I(1)0 0 D 2 B 1 R(ACK) I(1) R(NAK)1 6 R(ACK) I(1)1 1 D 8 B 0 R(ACK) I(0)0 0 D 10 B 1 I(0) I(0)1 1 D 12 B 0 I(0)

64 I(1)0 0 D 2 R(ACK) R(NAK) R(NAK)0 D 6 B 1 R(ACK) I(1)1 1 D 8 B 0 R(ACK) I(0)0 0 D 10 B 1 I(0) I(0)1 1 D 12 B 0 I(0) IC I(0)0 0 D 2 B 1 I(1) R(ACK) R(ACK)1 1 E 6 B 0 I(1) R(ACK)0 0 E 8 B 1 I(0) I(0)1 1 D 10 B 0 I(0)

65 20 IC 0 IC I(0)0 0 D 2 B 1 I(1) R(ACK)1 1 D 4 I(1) R(ACK)1 6 B 0 I(1) R(ACK)0 0 D 8 B 1 I(0) I(0)1 1 D 10 B 0 I(0)

66 1 REQA WUPA REQB/WUPB b b b SLOT MARKER B xxxx0101 b Select A ATTRIB B HLTA HLTB 1001xxxx b b b b RATS PPS b 1101xxxx b I-block 00xxxxxx b 00xxx101 b R-block 10xxxxxx b 1001xxxx b S-block 11xxxxxx b 1110xxxx b 1101xxxx b 252

67 1.1 PCB- I PCB- R DESELECT PCB- S WTX REQB / WUPB SLOT MARKER SELECT ATTRIB HLTA HLTB RATS PPS b X b X b6 0 RFU X X b5 More Error 0 1 X X b4 CID CID CID 0 X X X 0 no 0 no b3 NAD NAD NAD 1 1 X X 1 1 b2 1 RFU RFU 0 0 X X b1 0 RFU 1 1 X X 253

68 T 1 ISO/IEC T 1 IC T 1 1 IC IC T 1 IC IC ISO/IEC T 1 IC T 1 IC IC T 1 T 1 254

69 IC IC IC A T 1 SEL_t SAK_t T 1 SAK_t ISO/IEC ATR IC SAK_t T 1 SAK_t SAK_t IC IC HALT_t TS T0 TA1 TB1 TC1 TD1 TA2 TB2 TC2 TD2 TA3... T1... Tk CRC T 1 SAK_t TS3B LSB T0 TAi TBi TCi TDi T1...Tk ISO/IEC T T 1 RFU FI FI 128 N CWT 8etu P I X C Indication of protocol options CRC CRC ISO/IEC 3309 CRC CRC FFFF 255

70 B T 1 ATQB ATTRIB Answer to ATTRIB ATR IC Answer to ATTRIB T 1 T 1 ATQB Application Data 4 T 1 T 1 Protocol_Type 4 ISO/IEC 0000 b ATTRIB 3 b4 b3 b2 b1iso/iec 0000 b Higher layer INF Answer to ATTRIB ATR A 256

71 ISO/IEC IC EDC CRC ISO/IEC 3309 ISO/IEC A B T 1 T 1 T 1 ISO/IEC ISO/IEC A B NRZ ISO/IEC ISO/IEC A B ISO/IEC ISO/IEC C B

72 NAD NAD IC CID IC Vpp Vpp NAD NAD b8 b7 b6 b5 b4 b3 b2 b1 DAD SAD NAD IC CID IC CID IC SAD NAD ISO/IEC NAD DAD SAD0 IC IC IC NAD IC IC IC 258

73 A NAD A A NAD A B C D E F 0 I I ID I I 1 I I HALT_t REQ HALT_t 8 F 4 SEL_t 5 6 SEL_t 8 F A R R B R R C S(DESEL) S DESEL D PPS E RATS F S(WTX) S(WTX) A NAD A NAD NAD IC D IC CID D 5 CID 5 IC HALT CID IC T 1 IC CID 5 259

74 5 HALT 1.1 B NAD B B NAD A B C D E F 1 I REQB I I I 2 I I I ATTR I A B C D E F R R S DESEL S(WTX) R R S DESEL S(WTX) B NAD B NAD IC 1489C IC CID 260

75 IC ISO/IEC IC R IC IC IC IC 261

76 IC IC T 1 HALT HALT_t 262

77 T CL IC IC IC I A B C D E R F G H S I J K L R(ACK)0 R(ACK)1 R(NAK)0 R(NAK)1 I(0)0 I(0)1 I(1)0 I(1)1 S(WTX) S(DESELECT) PCB CRC EGT 0 bn bn Rule 12 Rule 10 1 I(0)0 Rule 2 6 Rule 10 3 I(1)0 R(ACK)0 5 R(ACK)1 S(WTX)7 S(WTX)7 1 I(0)0 bn bn Rule 11 Rule 11 Rule 12 Rule 10 2 I(0)1 Rule Rule 10 4 I(1)1 R(ACK)1 6 R(ACK)0 S(WTX)7 S(WTX)7 I(0)0 I(0)0 2 I(0)1 bn bn Rule 11 Rule 11 Rule 12 S(DESELECT) Rule 10 1 I(0)0 Rule Rule 10 3 I(1)0 R(ACK)0 5 R(ACK)1 S(WTX)7 S(WTX) 7 I(0)1 I(0)1 3 I(1)0 Rule 11 bn Rule 11 3 Rule 13 3 I(0)1 2 I(1)0 I(1)1 4 I(1)0 4 I(1)1 bn Rule 13 Rule 11 4 I(0)0 1 I(1)0 3 I(1)1 Rule 11 4 I(1)1 263

78 IC A I B C D E R F G H S I J K L 5 R(ACK)0 6 R(ACK)1 7 S(WTX) R(ACK)0 I(0)0 I(0)1 I(1)0 I(1)1 bn Rule 10 2 I(0)1 Rule 10 4 I(1)1 S(WTX)7 bn Rule 10 1 I(0)0 Rule 10 3 I(1)0 S(WTX)7 bn Rule 2 R(ACK)1 6 S(WTX)7 bn Rule 2 R(ACK)0 5 S(WTX)7 R(ACK)1 R(NAK)0 R(NAK)1 Rule 11 Rule R(ACK)0 R(ACK)0 Rule 12 6 R(ACK)1 Rule 11 6 R(ACK)1 S(WTX) S(DESELECT) PCB CRC EGT S(WTX) 7 S(DESELECT) 1 IC bn 2 264

79 IC A I B C D R S E F G H I J K R(ACK)0 R(ACK)1 FWT I(0)0 I(0)1 I(1)0 I(1)1 S(WTK) S(DESEL PCB CRC ECT) EGT 0 1 I(0)0 n n 0 n+1 n Rule 2 0 N n 1 N n I Block N n 1 Rule4 N n 1 Rule I(0)1 n n n+1 n Rule 2 N n 1 N n I Block N n 1 Rule4 N n 1 Rule I(1)0 n+1 n+1 n 0 N n 1 N n 1 S(WTX) Rule R(ACK) I(0)1 2 N n 1 Rule4 N n 1 Rule4 I(1) I(1)1 0 n+1 n+1 n N n 1 N n 1 Rule R(ACK) I(0)0 1 N n 1 Rule4 N n 1 Rule4 I(1) R(ACK)0 n n+1 n n 0 N n 1 N n 1 I Block Rule N n 1 Rule 5N n 1 Rule 5 R(ACK)

80 IC A I B C D R S E F G H I J K R(ACK)0 I(0)0 I(0)1 I(1)0 I(1)1 6 R(ACK)1 n 0 I Block PICC R(NAK)0 n 0 Rule n Rule 2 5 R(ACK)0 R(ACK)1 0 I n n n Rule 7 Rule 6 0 I(0)1 2 I(0)0 1 R(ACK)1 I(1)1 4 I(1)0 3 8 R(NAK)1 I n n n n 0 Rule 2 Rule 6 Rule I(0)1 2 I(0)0 1 R(ACK)0 I(1)1 4 I(1)0 3 9 S(DESELECT) Rule 8 0 n 0N FWT S(WTK) S(DESELE CRC CT) PCB EGT n+1 n+1 N n 1 N n N n 1 Rule5 N n 1 Rule5 6 6 S(WTX) n+1 n+1 N n 1 N n N n 1 Rule4 N n 1 Rule4 7 7 n+1 n+1 N n 1 N n N n 1 Rule4 N n 1 Rule4 8 8 N J K 0 Rule

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