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1 Power Wall

2 HPL1 10 B/F EXTREMETECH Supercomputing director bets $2,000 that we won t have exascale computing by 2020 One of the biggest problems standing in our way is power. [] supercomputing director bets 2000 that wewont have exascale computing by 2020 Power Wall

3

4 June MW! 16x 20MW

5 (MFlops/Watt) ( p ) BlueGene or GPU Xeon Phi

6

7 [] S. Wallace, et. al., Measuring Power Consumption on IBM Blue Gene/Q. Proc. 9th HPPAC, 2013.

8 []: Rick Stevens, et. al. Scientific Grand Challenges: Architectures and Technology for Extreme Scale Computing, DoE, Dec

9

10 Power Wall

11 [] (LC) (TC) (TC) LCTC (On-chip Off-chip) (64GFlops) 16-stages (32GFlops) 8-threades LC:16 TC: 256 #cores FLOPS Clock speed LLC 32 2TFLOPS 4GHz 128MB TFLOPS 1GHz 128MB ( LC:TC = 1:1) 16L+256T 9TFLOPS 4GHz/1GHz 128MB () K-computer (58W/CPU) 8 128GFLOPS 2GHz 6MB W

12 nm 32nm 22nm 16nm 11nm []D FLOP (pj/flop) LC (GF/W) TC (GF/W) (GF/W) ExaFlops 10 20MW

13 (DRAM) Technology VDD IDD BW GB/s Power (W) mw/gb/s pj/bit real pj/bit SDRAM PC133 1GB DDR-333 1GB DDRII-667 2GB DDR GB DDR GB HMC 4DRAM w/ Logic []: J. T. Pawlowski, Hybrid Memory Cube (HMC), Hot Chips23, Aug Stevens2009

14 (DRAM) 48MW(DDR5) 16MW(HMC) 6.4MW( ) 0.2B/F Stevens2009

15 []S. Borkar, Exascale Computing a fact or a fiction?, IPDPS2013 Keynote, May 2013.

16 1m40Gbps photonics []S. Borkar, Exascale Computing a fact or a fiction?, IPDPS2013 Keynote, May 2013.

17 DDR5 (30pJ/bit) (4pJ/bit) Interconnect2MW

18

19

20 Low (Near Threshold) Voltage Computing [] T. Sakurai, Pitfalls in deep volt logic design. ISSCC 11 Forum: Ultra Low Voltage VLSIs for Energy Efficient Systems, [] T. Sakurai, Designing Ultra Low Voltage logic. Proc. ISLPED 11, pp57 58, Aug

21 SIMD [], FX, SSHPC2013,

22 Hybrid Memory Cube (HMC) []: J. T. Pawlowski, Hybrid Memory Cube (HMC), Hot Chips23, Aug [] Hybrid Memory Cube Consortium, Hybrid Memory Cube Specification 1.0, 2013.

23

24 : RAPL []: Intel Power Governor, us/articles/intel power governor

25 RAPL [2013] RAPL(WattsUp) L2(256KB) + DRAM L3(20MB)

26 CPU

27

28 worst case

29 Power NW Mem. CPU Base A AB Linpack [Miyazaki2012]

30 Power NW Mem CPU. GPU Base A A B A B ()

31

32 蔽 蔽 蔽

33 InfiniBand network InfiniBandnetwork

34 CPU =56[W] =30[W] =250[W]

35 Peff. 1. Peff Peff. 4. ()

36 Pentium M 760 ( GHz) DDR SDRAM 1GB (HPL) P limit

37 -DRAM RAPL - EEE(Energy Efficient Ethernet) DRAM

38 DRAM(1) ( ) [2013] MHD naive:cpu fastest:

39 DRAM(2) ( ) [2013] naïve fastest(static) fastest(dynamic)

40 [2013] [ ] EEE Cr 1 CPU () Cr 1 =28 2 CPU Cr 2 =24

41 Dell PowerEdge r620 x 16 Dell PowerConnect 8132 x 3-10GbE24, EEE) - Fat-Tree Dell PowerConnect 8132 x 3 [s] GHz 1.41 proposed (EEE disabled) proposed (EEE enabled) conventional (EEE disabled) conventional (EEE enabled) conventional EEE 0.6% 72W GHz [W]

42

43 [Wallance2013] S. Wallace, V. Vishwanath, S. Coghlan, Z. Lan, M. Papka, Measuring Power Consumption on IBM Blue Gene/Q, Proc. 9th HPPAC, May [Stevens 2008] R. Stevens, et. al. Scientific Grand Challenges: Architectures and Technology for Extreme Scale Computing, Technical report, ASCR Scientific Grand Challenges Workshop Series, Dec [Kogge2008] P. Kogge, et. al., ExaScale Computing Study, Technology Challenges in Achieving Exascale Systems, IPTO tech. report TR , DARPA, Sep [2012],, [Pawlowski 2011] J. T. Pawlowski, Hybrid Memory Cube (HMC), Hot Chips23, Aug [Borkar2013] S. Borkar, Exascale Computing a fact or a fiction?, IPDPS2013 Keynote, May [Sakurai2011] T. Sakurai, Pitfalls in deep-volt logic design. ISSCC 11 Forum: Ultra-Low Voltage VLSIs for Energy-Efficient Systems, Feb [Sakurai2011-2] T. Sakurai, Designing Ultra-Low Voltage logic. Proc. ISLPED 11, pp57-58, Aug [HMC2013] Hybrid Memory Cube Consortium, Hybrid Memory Cube Specification 1.0, 2013.

44 [], FX, SSHPC2013, [Intel2012] Intel Power Governor, Jul [2013] RAPLHPC HPC [Miyazaki2013] H. Miyazaki,K Computer: PetaFLOPS Massively Parallel Scalar Supercomputer Built with Over 548k Cores, ISSCC 12, Feb [Kondo2007] M. Kondo, Y. Ikeda, and H. Nakamura,A High Performance Cluster System Design by Adaptive Power Control, HPPAC2007, Mar [2013] CPU HPCHPC, [2013] CPU SWoPP2013,

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