LV494V D http://onsemi.jp ΩΩ Ω Ω Semiconductor Components Industries, LLC, 23 September, 23
LV494V Ω μ μ μ Ωμμ μ Ω Ω Ω Ω Ω Ω
TOP VIEW 5. 44 23 LV494V Exposed Die-Pad BOTTOM VIEW 5.6 7.6 (.68) 22.65.22 (.5).5.2 SIDE VIEW.7max 44 SCL RSTB SDA 43 2 ENABLE GAIN 42 3 MCK 3. 2.4 2..85. GAIN GAIN2 GAIN3 GAIN4 GAIN5 MUTEB MODE TEST V DD 4 4 39 38 37 36 35 34 33 4 5 6 7 8 9 2 SANYO : SSOP44J(275mil) Pd max -- Ta LV494V BCK LRCK SDIN DFORM DFORM DFORM2 MCKFS SRATE V DD V SS V SS 32 3.32.2 --3 3 6 9 2 PTAB PVD OUT_CH_P BOOT_CH_P V DD A BOOT_CH_N OUT_CH_N 3 4 3 29 28 5 6 7 27 26 25 8 9 2 PTAB2 PVD2 OUT_CH2_P BOOT_CH2_P V DD A2 BOOT_CH2_N OUT_CH2_N PGND 24 2 PGND2 PGND2 PGND 23 22 Top view
+ LV494V Reset Signal Enable Signal I 2 S Inputs Control Signal RSTB ENABLE MCK BCK LRCK SDIN DFORM DFORM DFORM2 MCKFS SRATE V DD V SS 2 3 4 5 6 7 8 9 2 3 LV494V 44 43 42 4 4 39 38 37 36 35 34 33 32 SCL SDA GAIN GAIN GAIN2 GAIN3 GAIN4 GAIN5 MUTEB MODE TEST V DD V SS I 2 C Bus Control Signal Mute Signal PTAB2 4 3 PTAB PVD2 5 3 PVD OUT_CH2_P 6 29 OUT_CH_P BOOT_CH2_P 7 28 BOOT_CH_P R L V DD A2 8 27 V DD A R L BOOT_CH2_N 9 26 BOOT_CH_N OUT_CH2_N 2 25 OUT_CH_N PGND2 2 24 PGND PGND2 22 23 PGND V DD - DC 3.3V + - VD DC 8-2V
LV494V 29 28 26 25 3 6 2 3 33 32 4 6 3 2 7 8 9 42 4 4 39 2 9 7 38 37 36 35 RSTB V DD V SS V DD V SS SERIAL/PARALLEL CONVERTER OVER_SAMPLER VOLUME_CONTROLLER NOISE_SHAPING 5 BCK LRCK SDIN MCK 34 CONTROLLER I 2 C I/F 43 44 ENABLE DFORM DFORM DFORM2 MCKFS SRATE GAIN GAIN GAIN2 GAIN3 GAIN4 GAIN5 MUTEB MODE TEST SDA SCL PWM_CONVERTER PWM RECEIVER PWM RECEIVER CONTROL DELAY OUTPUT STAGE CH+ OUTPUT STAGE CH- PWM RECEIVER PWM RECEIVER CONTROL DELAY OUTPUT STAGE CH2- OUTPUT STAGE CH2+ THERMAL OVER CURRENT SEQUENCE PVD OUT_CH_P BOOT_CH_P OUT_CH_N BOOT_CH_N OUT_CH2_P BOOT_CH2_P OUT_CH2_N BOOT_CH2_N 24 PGND 23 22 2 PGND PGND2 PGND2 5 PVD2 REGULATOR (5V) 27 8 V DD A2 V DD A 3 PTAB 4 PTAB2 V SS PGND PGND2
LV494V PVD 6 GND PVD 2 GND
LV494V PVD 25 GND PVD 29 GND 44
LV494V SCL SDA RSTB SCL SDA RSTB
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LV494V PVD V DD ENABLE RSTB MCK MUTEB MUTEBL_Reg MUTEBR_Reg >8.V >3.V >2ms >5ms PVD V DD ENABLE RSTB MUTEB MUTEBL_Reg MUTEBR_Reg OUT_P/N OUT2P/2N >ms >2ms Hi-Z
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LV494V IDETECT HOLD TIME
LV494V
LV494V H SCL H SDA H SCL H SDA SCL SDA ACK ACK
LV494V LV494V LV494V LV494V start R/W ACK ACK ACK stop LV494V LV494V LV494V LV494V start R/W ACK ACK start R/W ACK stop LV494V LV494V LV494V start R/W ACK ACK ACK stop
LV494V 32fs 32fs Lch Rch 23 22 2 2 3 2 23 22 2 2 3 2 23 22 2 32fs 32fs Lch Rch 23 22 2 2 3 2 23 22 2 2 3 2 23 22 2 2
LV494V 32fs 32fs Lch Rch 2 22 23 2 3 2 2 22 23 2 3 2 2 22 23 32fs 32fs Lch Rch 2 3 2 3 2 24/2/8/6 bit 24/2/8/6 bit
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LV494V..8.6.4.2 Ipd -- VDD 2.6 2.8 3. 3.2 3.4 3.6 3.8.5.4.3.2. Ist -- PVD 2 4 6 8 2 4 6 8 2 Imute -- PVD 4 6 8 2 4 6 3 2 RSTB=Low RSTB=Low RL=8Ω RSTB=High ENABLE=Low R L =8Ω RSTB=High ENABLE=High MUTEB=Low ICCO -- PVD 8 4. 2..8.6.4.2 Ipd -- Ta -4-2 2 4 6 8.5.4.3.2. Ist -- Ta -4-2 2 4 6 8 6 5 4 3 2 Imute -- Ta 2-4 -2 2 4 6 8 5 4 3 2 VDD=3.3V RSTB=Low PVD=5V RSTB=Low VD=5V RL=8Ω RSTB=High ENABLE=Low VD=5V R L =8Ω RSTB=High ENABLE=High MUTEB=Low ICCO -- Ta 4 6 8 2 4 6 8 2-4 -2 2 4 6 8
LV494V 2 5 5 PVD=5V RSTB=High ENABLE=High MUTE=Low Iop -- VDD 2.6 2.8 3. 3.2 3.4 3.6 3.8 4. 2 5 5 VD=5V RL=8 RSTB=High ENABLE=High MUTEB=Low ICC -- Ta -4-2 2 4 6 8 6 VDDA -- PVD 6 VDDA -- Ta 5 5 4 4 V DD A -V 3 V DD A -V 3 2 RL=8 RSTB=High ENABLE=High MUTEB=Low 4 6 8 2 4 6 8 2 2 VD=5V RL=8 RSTB=High ENABLE=High MUTEB=Low -4-2 2 4 6 8 8 6 RL=8 RSTB=High ENABLE=High MUTEB=High VOL=+2dB IHF-A VNO -- PVD VNO -- Ta 4 2 9 2 3 4 5 6 7 8 9 VD=5V RL=8 VIN=-38dBFS VOL=+2dB IHF-A. 2-4 -2 2 4 6 8-2 R L =8 f IN =khz VO=dBm D IN AUDIO CH sep. -- PVD -2 VD=5V R L =8 f IN =khz V O =dbm AES7 CH sep. -- Ta -4-4 -6-6 -8 9 2 3 4 5 6 7 8 9 2-8 -4-2 2 4 6 8
LV494V Power - W 25 2 5 5 9 2 3 4 5 6 7 8 9 2. RL=8 fin=khz 2CH-Drive PCL=X AES7 R L =8 f IN =khz PO=W 2CH-Drive Vol=+2dB AES7 Power -- PVD % modulation 87.5% modulation THD+N -- PVD CH CH2 Power - W 2 5 Power -- Ta % modulation 87.5% modulation PVD=5V R L =8 5 f IN =khz THD+N=% 2CH-Drive AES7-4 -2 2 4 6 8. PVD=5V R L =8 PO=W 2CH-Drive Vol=+2dB AES7 CH CH2 THD+N -- Ta. 9 2 3 4 5 6 7 8 9 2. -4-2 2 4 6 8 PVD=5V RL=8 PO=W 2CH-Drive Vol=+2dB AES7 THD+N -- Frequency. CH CH2. THD+N -- Power THD+N -- Power. PVD=5V R L =8 2CH-Drive Vol=+2dB AES7... Hz khz 6.67kHz.. Power - W. PVD=5V R L =8 2CH-Drive Vol=+2dB AES7... CH2 CH.. Power - W
LV494V Efficiency - % ID - A 8 6 4 PVD=5V RL=8 2 fin=khz 2CH-Drive AES7 2 4 6 8 Power - W 2.5.5 - Power -- Efficiency ID -- Power 2 4 6 8 8 6 4 2-2 -4-6 -8 PVD=5V RL=8 fin=khz 2CH-Drive AES7 PVD=5V RL=8 PO=W 2CH-Drive Vol=+2dB AES7 Power - W Response -- Frequency CH CH2 Power - W Pd - W Power - W... Power -- VIN. VIN - mffs 6 5 4 3 2 PVD=5V RL=8 fin=khz 2CH-Drive Vol=+2dB AES7 PVD=5V RL=8 fin=khz 2CH-Drive AES7 Pd -- Power 2 4 6 8 Power - W 6 4 Power -- Ta 8 Lower Upper RL=8Ω 2 RSTB=High ENABLE=High MUTEB=High -4-2 2 4 6 8
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