IICシングルマスタ送受信制御例 (EEPROM ライト・リード)

Transcription

1 SH7730 RJJ06B Rev.1.00 SH7730 I 2 C (IIC) EEPROM SH I 2 C EEPROM RJJ06B Rev.1.00 Page 1 of 100

2 SH7730 EEPROM EEPROM Memory address 0x SH7730 EEPROM EEPROM Memory address 0x EEPROM 64k (R1EX24064ASAS0I) 333kHz 1.2 I 2 C (IIC) : SH-4A AP-SH4A-1A ( 0): NOR 4M Spansion S29AL032D70TFI04 ( 3): SDR-SDRAM 32M (16M 2 ) Samsung K4S281632F-UC75 : SH7730 (R8A77301) CPU : MHz SuperHyway : MHz : MHz : MHz 0 : 16 (MD3 = Low ) : 2 (MD0 = Low MD1 = High ) : (MD5 = Low ) : SuperH RISC engine Standard Toolchain Ver : High-performance Embedded Workshop (-cpu=sh4a -include="$(projdir) inc" -object="$(configdir) $(FILELEAF).obj" -debug -optimize=0 -gbr=auto -chgincpath -errorpath -global_volatile=0 -opt_range=all -infinite_loop=0 -del_vacant_loop=0 -struct_alloc=1 -nologo ) 1.4 SH7730 SH7730 (RJJ06B0864) RJJ06B Rev.1.00 Page 2 of 100

3 1.5 : ICCR2 BBSY 1 SCP 0 : : ICCR2 BBSY 0 SCP 0 : ACK: Acknowledge ( ) "0" NACK: Acknowledge ( ) "1" RJJ06B Rev.1.00 Page 3 of 100

4 2. I 2 C 2.1 I 2 C I 2 C I 2 C NXP I 2 C I 2 C (SDA) (SCL) 2 I 2 C I 2 C I 2 C 400pF I 2 C 1 I 2 C I 2 C SCL SDA VBB 1 2 SCL /SDA SCL SDA AND 1 SCL "Low" 2 SCL AND 1 SCL 2 SCL "Low" 1 " " SDA VBB SCL ON "Low" SCL 1 SCL "Low" I 2 C ( 1 SCL "Low" ) RJJ06B Rev.1.00 Page 4 of 100

5 2.2 I 2 C I 2 C I 2 C (1) / / (2) I 2 C (3) (4) (5) 2 SCL "High" SDA "High" "Low" 2 SCL "High" SDA "Low" "High" ( ) ( ) SCL S P SDA 2 RJJ06B Rev.1.00 Page 5 of 100

6 (6) 3 SCL "Low" SDA SCL "High" SDA SCL "High" SDA (SDA ) SCL SDA 3 (7) (8) (9) (10) (11) I 2 C SCL, SDA "High" (12) I 2 C (13) I 2 C I 2 C SH7730 (RJJ09B0339) I 2 C (IIC) RJJ06B Rev.1.00 Page 6 of 100

7 SCL "High" SDA "High" "Low" SCL SDA SDA 9 SDA "Low" SCL "Low" SCL SDA 9 SCL "Low" SCL "High" SDA "Low" "High" SCL "Low" SCL "Low" SCL "Low" SCL SDA Acknowledge R/W ACK ACK "0" Acknowledge: ACK: Acknowledge "0" R/W: / 4 ( = = ) RJJ06B Rev.1.00 Page 7 of 100

8 SCL 5 1 SCL I 2 C SDA I 2 C 1 ( 5) 4 ( 2) SCL I 2 C SDA RJJ06B Rev.1.00 Page 8 of 100

9 2.4 SH7730 I 2 C (IIC) SH7730 I 2 C (IIC) SH7730 (RJJ09B0339) I 2 C 1 SH7730 I 2 C (IIC) / / 2 / SCL SCL Low : 6 ( ) ( ) NACK SCL SDA 2 NMOS 2.5 SH7730 IIC IIC SH7730 (RJJ09B0339) I 2 C (IIC) RJJ06B Rev.1.00 Page 9 of 100

10 3. EEPROM EEPROM 3.1 EEPROM Type No.: : : R1EX24064ASAS0I 64k 400kHz (Max) 333kHz EEPROM 3.2 EEPROM IIC EEPROM Memory address 0x Page Write Page Write Operation Page Write (n) Write (Dn) 9 Acknowledge"0" Write (Dn) Write (Dn+1) Page Write Write (Dn+1) (a0 a4) (n+1) Write Write 32 Write (a0 a4) "Roll Over" Write 10 Write 32 Roll Over Page Write WP Device address 1st Memory address 2nd Memory address Write data (n) Write data (n+m) Start Write ACK *1 *1 *1 a12 a11 a10 a9 a8 ACK a7 a6 a5 a4 a3 a2 a1 a0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK Stop *1 Don't care bit 7 Page Write Operation RJJ06B Rev.1.00 Page 10 of 100

11 3.2.2 Write Operation Acknowledge Read 8 Acknowledge 8 SCL 9 "0" 9 Acknowledge EEPROM Write 8 9 EEPROM Acknowledge "0" Device Address Word 8 Device Address Word EEPROM Read or Write Device address Word Device code 4 Device address code 3 Read/Write code 1 3 Device Address Word 4 B 1010 Device code Device address code Device address code 8 A2 A0 High Low Device address code Device address word 8 R/W(Read/Write) B'0 Write B'1 Read A2 A0 B'0 2 Device address Word Device address Word (8- ) Size Device code (fixed) Device address code R/W 64k A2 A1 A0 W Acknowledge Polling EEPROM Acknowledge Polling Device address word 8 Acknowledge Polling Read/Write "0" 9 Acknowledge Acknowledge "1" Acknowledge "0" Acknowledge Polling Write Page Write Operation EEPROM Device address (W ) 1st Memory address 2nd Memory address Write (1 ) Write (2 ) : Write (10 ) Device address (W ) : ACK : NACK ( ) ACK Acknowledge Polling RJJ06B Rev.1.00 Page 11 of 100

12 3.3 EEPROM IIC EEPROM 0x0000 0x Random Read Operation Sequential Read Operation 0x Current Address Read Operation Current Address Read Operation EEPROM Read Write (n) 1 (n+1) Current Address Read (n+1) Read ( R/W="1") Acknowledge "0" (n+1) 8 Acknowledge "1" (Acknowledge ) Read Random Read Operation Read Write Read (R/W="0") 8 2 Acknowledge "0" Current Address Read Write Acknowledge "1" (Acknowledge ) Read Sequential Read Operation Read Current Address Read Random Read 8 Acknowledge "0" 8 Acknowledge "0" 0 "Roll Over" "Roll Over" Sequential Read Current Address Read Random Read Acknowledge "1" (Acknowledge ) RJJ06B Rev.1.00 Page 12 of 100

13 3.3.4 Read Operation (1) Random Read Operation Sequential Read Operation Random Read EEPROM Sequential Read Operation EEPROM / (iic_user_eepromrw ( )) D_IIC_EEP_READ Device address 1st Memory address 2nd Memory address Device address Start Write ACK *1 *1 *1 a12 a11 a10 a9 a8 ACK a7 a6 a5 a4 a3 a2 a1 a0 ACK ReStart Read ACK *2 Random Read Operation *2 Read data (n) Read data (n+1) Read data (n+m) D7 D6 D5 D4 D3 D2 D1 D0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK D7 D6 D5 D4 D3 D2 D1 D0 NACK Stop Sequential Read Operation *1 Don't care bit *2 Device address code (A0 A2) A0 A2 B'0 8 Random Read Sequential Read RJJ06B Rev.1.00 Page 13 of 100

14 (2) Current Address Read Operation (n) 1 (n+1) EEPROM / (iic_user_eepromrw ( )) D_IIC_EEP_CURRENT_READ 1 EEPROM (n) 1 (n+1) Device address Word Read data (n+1) Start Read ACK D7 D6 D5 D4 D3 D2 D1 D0 NACK Stop *1 Current Address Read Operation *1 Device address code (A0 A2) A0 A2 B'0 9 Current Address Read Operation RJJ06B Rev.1.00 Page 14 of 100

15 3.3.5 Read Operation Acknowledge EEPROM Device address Memory address Device address Acknowledge "0" EEPROM Read 8 Acknowledge "0" Acknowledge "0" EEPROM Read Acknowledge "0" Read Read Operation EEPROM Device address (W ) 1st Memory address 2nd Memory address (ReStart) Device address (R ) Read 1 (Read ) Read 2 (Read ) Read 3 (Read ) : Read 9 (Read ) NACK Device address (R ) Read 10 (Read ) NACK Random Read Sequential Read Acknowledge Polling RJJ06B Rev.1.00 Page 15 of 100

16 x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a EEPROM 9 0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09 Random Read Operation Sequential Read Operation Memory address 1 0x0a Current Address Read Operation Random Read Operation Sequential Read Operation Current Address Read Operation SH7730 EEPROM* SCL SCL SDA SDA Vcc Vss A0 A1 A2 *EEPROM (R1EX24064ASAS0I) 10 RJJ06B Rev.1.00 Page 16 of 100

17 4.2 START IIC (iic_user_init( )) IIC IIC IIC (1)IIC EEPROM (iic_user_eepromrw( )) D_IIC_EEP_WRITE EEPROM 0x0000 0x0009 0x01,0x02,0x03,0x04,0x05,0x06,0x07, 0x08,0x09,0x0a EEPROM (iic_user_chk_eeprom( )) EEPROM (2) SH7730 EEPROM ( )? No EEPROM Yes EEPROM (iic_user_eepromrw( )) D_IIC_EEP_READ (2) EEPROM Random Read Operation Sequential Read Operation 9 (0x0000 0x0008 ) EEPROM (iic_user_chk_eeprom( )) EEPROM (3) SH7730 EEPROM (Random Read Operation Sequential Read Operation)? No EEPROM Yes 11 ( ) RJJ06B Rev.1.00 Page 17 of 100

18 EEPROM (iic_user_eepromrw( )) D_IIC_EEP_CURRENT_READ EEPROM (iic_user_chk_eeprom( )) (2) EEPROM Current Address Read Operation (0x0009 ) 1 9 Sequential Read Operation 0x0009 EEPROM (4) SH7730 EEPROM (Current Address Read Operation)? No EEPROM Yes? Yes No (5)EEPROM EEPROM END EEPROM EEPROM 12 ( ) RJJ06B Rev.1.00 Page 18 of 100

19 4.3 1 IIC (iic_user_init ( )) 2 EEPROM / (iic_user_eepromrw ( )) 3 No. IIC 3 EEPROM (iic_user_chk_eeprom ( )) 4 IIC (iic_user_int_select ( )) or or 4.4 EEPROM / EEPROM / (1) IIC (iic_user_init ( )) IIC PFC RJJ06B Rev.1.00 Page 19 of 100

20 (2) EEPROM / (iic_user_eepromrw ( )) EEPROM IIC (iic_user_init ( )) T_IIC_EEPROM_RW_INFO E_Iic_eep_mode i_mode D_IIC_EEP_READ Random Read Operation Sequential Read Operation D_IIC_EEP_CURRENT_READ Current Address Read Operation Sequential Read Operation EEPROM Random Read Operation Sequential Read Operation Current Address Read Operation 3.3 EEPROM D_IIC_EEP_WRITE unsigned char i_devadr Device address code Device code R/W Device address code unsigned long i_romadr Memory address EEPROM unsigned long i_len or (1 ) unsigned char *i_pbuf RJJ06B Rev.1.00 Page 20 of 100

21 (3) EEPROM (iic_user_chk_eeprom ( )) EEPROM T_IIC_EEPROM_CON DITION E_Iic_eep_condition i_eep_condition EEPROM E_Iic_eep_err_condition i_err_condition EEPROM EEPROM EEPROM / EEPROM EEPROM D_IIC_EEP_OK D_IIC_EEP_READING D_IIC_EEP_WRITING D_IIC_EEP_NG RJJ06B Rev.1.00 Page 21 of 100

22 4.4 1 (D_IIC_EEP_WRITE) 2 (D_IIC_EEP_READ) 3 (D_IIC_EEP_CURRENT_READ) 4 No. Page Write Operation Write Cycle Polling Using ACK EEPROM Random Read Operation Sequential Read Operation EEPROM Current Address Read Sequential Read Operation EEPROM Page Write Operation Write Cycle Polling Using ACK Random Read Operation Sequential Read Operation Current Address Read 3 EEPROM RJJ06B Rev.1.00 Page 22 of 100

23 4.5 IIC 5 ID C0 D_IIC_EEP_NO_INIT (iic_user_init() ) C1 D_IIC_EEP_IDLE C2 D_IIC_EEP_START_ISSUE_WAIT C3 D_IIC_EEP_SEND_DEVADD_WAIT Device Address C4 D_IIC_EEP_RESEND_DEVADD_WAIT Device Address C5 D_IIC_EEP_SEND_MEMADD_WAIT Memory address C6 D_IIC_EEP_SEND_RCV_DATA_WAIT C7 D_IIC_EEP_WRITE_END_ISSUE_WAIT Write C8 D_IIC_EEP_WRITE_POLLING_WAIT Write Polling C9 D_IIC_EEP_END_ISSUE_WAIT PFC (iic_user_init() ) iic_user_eepromrw() ( ) TXI ( ) Device Address TEI Device Address Device Address Memory address Device Address TEI Device Address Memory address TEI Memory address TEI RXI Write STPI EEPROM Write Polling TEI Write Polling Write Polling STPI RJJ06B Rev.1.00 Page 23 of 100

24 4.6 iic_user_init() iic_user_eepromrw( ) 6 ID EV0 D_IIC_EEP_EV_INIT iic_user_init() EV1 D_IIC_EEP_EV_RW_START iic_user_eepromrw() EV2 D_IIC_EEP_EV_CHECK iic_user_chk_eeprom () EV3 D_IIC_EEP_EV_INT_NAKI NAKI EV4 D_IIC_EEP_EV_INT_TXI TXI EV5 D_IIC_EEP_EV_INT_TEI TEI EV6 D_IIC_EEP_EV_INT_RXI RXI EV7 D_IIC_EEP_EV_INT_STPI STPI EEPROM ID EE0 D_IIC_EEP_ERR_NO EE1 D_IIC_EEP_ERR_NACK NACK EE2 D_IIC_EEP_ERR_AL AL ( ) EE3 D_IIC_EEP_ERR_WCT_OVER Write Polling count over EE4 D_IIC_EEP_ERR_OTHER RJJ06B Rev.1.00 Page 24 of 100

25 4.8 IIC ( ) ( ) (EV0 ) EV2 (iic_user_chk_eeprom () ) RJJ06B Rev.1.00 Page 25 of 100

26 4.8.1 D_IIC_EEP_WRITE SH7730 EEPROM (D_IIC_EEP_WRITE ) [ ]/ [] D_IIC_EEP_NO_INIT EV0 (iic_user_init() ) /IIC EV7 (STPI )/ D_IIC_EEP_END_ISSUE_ WAIT D_IIC_EEP_IDLE EV1 (iic_user_eepromrw() )/ EV5 (TEI ) [ ACK ]/ ( ) (RESTART) EV5 (TEI ) [ ACK ( ) or WritePolling ( )]/ D_IIC_EEP_START_I SSUE_WAIT D_IIC_EEP_WRITE_PO LLING_WAIT WritePolling EV4 (TXI ) [ ]/ Device Address D_IIC_EEP_SEND_DEVA DD_WAIT Device Address EV4 (TXI ) [ Write or WritePolling ]/ WritePolling Device Address Device Address NACK ACK or WritePolling EV5 (TEI ) [Device address ]/ Memory address EV7 (STPI ) / EV5 (TEI ) [Memory address > 0]/ 2 Memory address D_IIC_EEP_SEND_MEMAD D_WAIT Memory address EV5 (TEI ) [Memory address ]/ 1st D_IIC_EEP_WRITE_END_ ISSUE_WAIT Write EV5 (TEI ) [Write data > 0]/ 2 D_IIC_EEP_SEND_RCV _DATA_WAIT EV5 (TEI ) [ ]/ = 1 13 (D_IIC_EEP_WRITE ) RJJ06B Rev.1.00 Page 26 of 100

27 4.8.2 D_IIC_EEP_READ SH7730 EEPROM (D_IIC_EEP_READ ) [ ]/ [] D_IIC_EEP_NO_INIT EV0 (iic_user_init() ) /IIC EV7 (STPI ) / (ICDRR ) D_IIC_EEP_END_ISSUE_ WAIT D_IIC_EEP_IDLE EV6 (RXI ) [ = 0]/ EV1 (iic_user_eepromrw() )/ EV4 (TXI ) [ Memory address ]/ Device address ( ) D_IIC_EEP_START_I SSUE_WAIT D_IIC_EEP_SEND_RCV_D ATA_WAIT EV4 (TXI ) [ ]/ Device Address D_IIC_EEP_SEND_DEVA DD_WAIT Device address D_IIC_EEP_RESEND_DEVA DD_WAIT Device Address EV5 (TEI ) [Memory address ]/ ( ) EV5 (TEI ) [Device address ]/ ICDRR 1 NACK (ICIER.ACKBT = 1) EV6 (RXI ) [ >= 2]/ 2 (ICDRR ) EV6 (RXI ) [ = 1]/ NACK (ICIER.ACKBT = 1) 1 (ICDRR ) EV5 (TEI ) [Device address ]/ Memory address D_IIC_EEP_SEND_MEMAD D_WAIT Memory address EV5 (TEI ) [Memory address > 0]/ 2 Memory address 14 (D_IIC_EEP_READ ) RJJ06B Rev.1.00 Page 27 of 100

28 4.8.3 D_IIC_EEP_CURRENT_READ SH7730 EEPROM (D_IIC_EEP_CURRENT_READ ) [ ]/ [] D_IIC_EEP_NO_INIT EV0 (iic_user_init() ) /IIC EV7 (STPI ) / (ICDRR ) D_IIC_EEP_END_ISSUE_ WAIT D_IIC_EEP_IDLE EV6 (RXI ) [ = 0]/ EV1 (iic_user_eepromrw() )/ D_IIC_EEP_START_I SSUE_WAIT D_IIC_EEP_SEND_RCV_D ATA_WAIT EV4 (TXI ) [ ]/ Device Address ( ) EV6 (RXI ) [ >= 2]/ 2 (ICDRR ) EV6 (RXI ) [ = 1]/ NACK (ICIER.ACKBT = 1) 1 (ICDRR ) D_IIC_EEP_SEND_DEVA DD_WAIT Device address EV5 (TEI ) [Device address ]/ ICDRR 1 NACK (ICIER.ACKBT = 1) 15 (D_IIC_EEP_CURRENT_READ ) RJJ06B Rev.1.00 Page 28 of 100

29 (g_iic_eep_event_tbl[][]) C ID EV ID Func1 9 8 (g_iic_eep_event_tbl[][]) EV0 EV1 EV2 EV3 EV4 EV5 EV6 EV7 C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 D_IIC_EEP_NO_INIT D_IIC_EEP_IDLE D_IIC_EEP_START_ISSUE_WAIT D_IIC_EEP_SEND_DEVADD_WAIT Device Address D_IIC_EEP_RESEND_DEVADD_WAIT Device Address D_IIC_EEP_SEND_MEMADD_WAIT Memory address D_IIC_EEP_SEND_RCV_DATA_WAIT D_IIC_EEP_WRITE_END_ISSUE_WAIT Write D_IIC_EEP_WRITE_POLLING_WAIT Write Polling D_IIC_EEP_END_ISSUE_WAIT Func1 NOP NOP NOP NOP NOP NOP NOP Func1 Func2 Func3 Func4 NOP NOP NOP NOP NOP NOP Func3 Func4 Func5 NOP NOP NOP NOP NOP Func3 Func4 NOP Func6 NOP NOP NOP NOP Func3 Func4 NOP Func7 NOP NOP NOP NOP Func3 Func4 NOP Func8 NOP NOP NOP NOP Func3 Func4 NOP Func9 Func10 NOP NOP NOP Func3 Func4 NOP NOP NOP Func11 NOP NOP Func3 Func4 NOP Func12 NOP NOP NOP NOP Func3 Func4 NOP NOP NOP Func13 NOP NOP RJJ06B Rev.1.00 Page 29 of 100

30 4.10 ( 8 Func1 ) Func1 iic_init () IIC Func2 iic_eepromrw () EEPROM / Func3 iic_chk_eeprom () EEPROM Func4 iic_al_generate () AL Func5 iic_after_start_issue () Func6 iic_send_after_dev_address () Device Address Func7 iic_after_re_devadd_send () Device Address Func8 iic_memadd_sending () Memory address Func9 iic_write_data_sending () WriteData Func10 iic_read_data_rcv () ReadData Func11 ic_after_end_issue_write_polling () Write Polling Func12 iic_eep_writepolling () WritePolling Func13 iic_after_end_issue () RJJ06B Rev.1.00 Page 30 of 100

31 EEPROM / (T_IIC_EEPROM_RW_MANAGE) 10 EEPROM / (T_IIC_EEPROM_RW_MANAGE) R/W E_Iic_eep_mode Device address unsigned char EEPROM Device address Memory address length unsigned long EEPROM Memory address (1 ) Memory address buffer unsigned char EEPROM Memory address EEPROM Memory address 2 R/W Data length unsigned long EEPROM or (1 ) R/W Data Buffer pointer unsigned char * EEPROM EEPROM Write polling counter unsigned short Write cycle polling NACK Device address RJJ06B Rev.1.00 Page 31 of 100

32 D_IIC_EEP_INT_LEVEL 2 (g_iic_eep_event_tbl[][]) IIC (g_iic_eep_event_tbl[][]) IIC D_IIC_EEP_MEMADR_SIZE 2 Memory Address EEPROM Memory Address 2 2 D_IIC_DEV_CODE H'A0 Device Code 4 Device Code B'1010 D_IIC_W_CODE H'00 Device Address Word R/W Write 1 D_IIC_R_CODE H'01 Device Address Word R/W Read 1 RJJ06B Rev.1.00 Page 32 of 100

33 4.13 IIC AL ( ) (EEPROM) NACK AL NACK (NAKIE) ICIER (ACKE) 0 AL NACK (NAKI) AL AL (iic_al_generate ()) AL (iic_al_generate ()) SCL SDA SDA SDA High (EEPROM) NACK ICIER (ACKE) 0 NACK NACK (NAKI) (EEPROM) (TEI ) ICIER ACKBR ACK or NACK Device address (EEPROM) NACK Device address Device address (ACK or NACK) TEI Device Address (iic_send_after_dev_address()) Device Address (iic_send_after_dev_address()) NACK (iic_judge_nack()) ICIER ACKBR ACKBR = 1 NACK NACK (iic_judge_nack()) RJJ06B Rev.1.00 Page 33 of 100

34 I 2 C (ICDRR) 8 I 2 C (RCVD) ICDRR 8 2. RCVD 1 1 RCVD ACKBT 8 SCL ACKBT RCVD / ( ) 9 9 I 2 C 2 (ICCR2) SCLO ( ) ( ) 1. SCL ( ) SCL Low ( ) SCLO I 2 C ICE IICRST I 2 C ICCR1 ICE 0 ICCR2 IICRST 1 ICCR2 BBSY ICSR STOP I 2 C ICCR1 ICE 0 ICCR2 IICRST 1 RJJ06B Rev.1.00 Page 34 of 100

35 4.15 (g_iic_eep_event_tbl[][]) START ( : or ) IF < event> iic_user_init() <D_IIC_EEP_EV_INIT> iic_user_eepromrw() <D_IIC_EEP_EV_RW_START> iic_user_chk_eeprom() <D_IIC_EEP_EV_CHECK> NAKI TXI TEI RXI STPI <D_IIC_EEP_EV_INT_NAKI> <D_IIC_EEP_EV_INT_TXI> <D_IIC_EEP_EV_INT_TEI> <D_IIC_EEP_EV_INT_RXI> <D_IIC_EEP_EV_INT_STPI> #define D_IIC_EEP_INT_LEVEL D_IIC_EEP_INT_LEVEL (g_iic_eep_event_tbl[][]) *1 NULL END *1 IIC #define D_IIC_EEP_INT_LEVEL #define D_IIC_EEP_INT_LEVEL IIC IIC IIC #define D_IIC_EEP_INT_LEVEL 16 RJJ06B Rev.1.00 Page 35 of 100

36 4.16 ( ) 8 (g_iic_eep_event_tbl[][]) IIC START (iic_init( )) ( EEPROM / ) 1 IIC0 PFC SDA0 SCL0 ( 1 ) IIC0 1 D_IIC_EEP_IDLE END 17 IIC RJJ06B Rev.1.00 Page 36 of 100

37 EEPROM / START (iic_eepromrw( )) R/W mode Device address code Memory address Transfer/Receive data length Transfer/Receive data buffer pointer IIC0.ICCR1 (ICE 1 ) Yes? No ICCR2.BBSY = 1 EEPROM / EEPROM / EEPROM / EEPROM / R/W mode Device address Memory address Read/Write data Device address Device address code Device code=b'1010 EEPROM / Memory address 8 8 EEPROM / Memory address (1 ) EEPROM / (1 ) EEPROM / D_IIC_EEP_CURRENT_READ D_IIC_EEP_WRITE or D_IIC_EEP_READ Device address Write (B'0) Device address Read (B'1) ( ) 18 EEPROM / ( ) RJJ06B Rev.1.00 Page 37 of 100

38 I 2 C (iic_chk_bus_scl_sda()) ICCR2 BBSY = 0? SDAO SCLO = 1? I 2 C Low I 2 C I 2 C IIC I 2 C I 2 C ( ) IIC IIC0.ICCR2 IIC IICRST 1 IIC IICRST 0 IIC0.ICCR1 IIC0 ICE 0 IIC0.ICCR1 ICE B'1 MST,TRS B'11 Pø/100 No ( ) I 2 C? (iic_chk_bus_scl_sda()) Yes ICCR2 BBSY = 0? SDAO SCLO = 1? I 2 C Low I 2 C I 2 C IIC0.ICMR0 MSB 9 TXI NAKI IIC0.ICIER.TIE=1 IIC0.ICIER.NAKIE=1 (Start condition) IIC0.ICCR2 BBSY=1 SCP=0 D_IIC_EEP_START_ISSUE_WAIT END 19 EEPROM / ( ) RJJ06B Rev.1.00 Page 38 of 100

39 EEPROM START (iic_chk_eeprom( )) OUT OUT R/W Read Write? No Yes ( ) Yes No R/W? R/W R/W (R/W ) No Read? Yes (Read ) No Write? Yes (Write ) ( ) END 20 EEPROM RJJ06B Rev.1.00 Page 39 of 100

40 AL AL RJJ06B Rev.1.00 Page 40 of 100

41 IIC START (iic_after_start_issue( )) TXI EEPROM / =D_IIC_EEP_IDLE? Yes No =D_IIC_EEP_WRITE_END_IS SUE_WAIT? or =D_IIC_EEP_WRITE_POLLIN G_WAIT? No Yes Device Address D_IIC_EEP_SEND_DEVADD_WAIT WritePolling D_IIC_EEP_WRITE_POLLING_WAIT = D_IIC_EEP_SEND_MEMADD_ WAIT? Yes No Device address Read (B'1) Device Address D_IIC_EEP_RESEND_DEVADD_WAIT ( ) 21 IIC ( ) RJJ06B Rev.1.00 Page 41 of 100

42 ICIER TEI Device address ICDRT EEPROM / Device address END 22 ( ) RJJ06B Rev.1.00 Page 42 of 100

43 Device Address START (iic_send_after_dev_address( )) iic_judge_nack() ACK/NACK NACK NACK? (iic_judge_nack()) No Yes 1 1 EEPROM / = D_IIC_EEP_CURRENT_READ? Yes No Read (iic_chg_to_read()) = D_IIC_EEP_READ or D_IIC_EEP_WRITE? Yes No Memory address (iic_send_memory_address()) Memory address D_IIC_EEP_SEND_MEMADD_WAIT ( ) END 23 Device Address RJJ06B Rev.1.00 Page 43 of 100

44 Device Address START (iic_after_re_devadd_send( )) iic_judge_nack() ACK/NACK NACK NACK? (iic_judge_nack()) No Yes 1 1 Read (iic_chg_to_read()) END 24 Device Address RJJ06B Rev.1.00 Page 44 of 100

45 Memory address START (iic_memadd_sending( )) 1 Yes NACK? (iic_judge_nack()) iic_judge_nack() ACK/NACK NACK 1 No EEPROM / Yes Memory address? No Memory address (iic_after_memadd_send()) Memory address (iic_send_memory_address()) EEPROM / Memory address 2nd END 25 Memory address RJJ06B Rev.1.00 Page 45 of 100

46 WriteData START (iic_write_data_sending( )) iic_judge_nack() ACK/NACK NACK NACK? (iic_judge_nack()) Yes 1 No 1 EEPROM / ICSR.TEND = 0 TEI No Write Data? Yes STPI EEPROM / ICDRT Write (iic_after_memadd_send_write_mode()) 9? No Yes ICSR.STOP=0 Write D_IIC_EEP_WRITE_END_ISSUE_WAIT END 26 WriteData RJJ06B Rev.1.00 Page 46 of 100

47 ReadData START (iic_read_data_rcv( )) EEPROM / == 0? == 1 > 1 RXI ICIER.ACKBT = 1 (NACK ) IIC0.ICDRR EEPROM / STPI IIC0.ICDRR EEPROM / EEPROM / 9? Yes No EEPROM / ICSR.STOP=0 D_IIC_EEP_END_ISSUE_WAIT END 27 ReadData RJJ06B Rev.1.00 Page 47 of 100

48 Write Polling START (iic_after_end_issue_write_polling( )) EEPROM / STPI (IIC0.ICIER.STIE = 0 ) EEPROM / Write polling counter TXI (IIC0.ICIER.TIE=1 ) (IIC0.ICCR2 BBSY=1 SCP=0 ) D_IIC_EEP_START_ISSUE_WAIT END 28 Write Polling RJJ06B Rev.1.00 Page 48 of 100

49 WritePolling START (iic_eep_writepolling( )) EEPROM / No ACK? Yes No EEPROM / Write Polling Counter = 0? EEPROM / Write Polling Counter EEPROM / Write Polling Counter Yes TEIE IIC0.ICIER.TEIE=0 TEIE (IIC0.ICIER.TEIE=0 ) TEIE (IIC0.ICIER.TEIE=0 ) STPI STPI TXI (IIC0.ICIER.TIE=1 ) 9? Yes No ( ) (IIC0.ICCR2 BBSY=1 SCP=0 ) 9? Yes ICSR.STOP=0 No 9? Yes ICSR.STOP=0 No D_IIC_EEP_START_ISSUE_WAIT D_IIC_EEP_ERR_WCT_OVER (WritePolling ) D_IIC_EEP_END_ISSUE_WAIT D_IIC_EEP_END_ISSUE_WAIT END 29 WritePolling RJJ06B Rev.1.00 Page 49 of 100

50 START (iic_after_end_issue( )) ICSR.TEND=0 ICSR.RDRF=0 ICSR.STOP=0 STIE TEIE TIE RIE = D_IIC_EEP_READ or D_IIC_EEP_CURRENT_READ? Yes No ICDRR EEPROM / (ICCR1 RCVD 0 ) Slave receive mode (ICCR1 MST,TRS 0 ) = D_IIC_EEP_WRITE? No Yes ICSR.TDRE=0 D_IIC_EEP_IDLE END 30 RJJ06B Rev.1.00 Page 50 of 100

51 4.17 ( ) Read START (iic_chg_to_read( )) EEPROM / ICSR.TEND=0 TEIE (ICCR1 MST=B'1 TRS=B'0) ICSR.TDRE=0 TXI ICCR1.RCVD=1 Yes 1? No (ICIER.ACKBT=1) NACK (ICIER.ACKBT=0) RXI ICDRR Data D_IIC_EEP_SEND_RCV_DATA_WAIT END 31 Read RJJ06B Rev.1.00 Page 51 of 100

52 D_IIC_EEP_CURRENT_READ Device Address D_IIC_EEP_READ Device Address RJJ06B Rev.1.00 Page 52 of 100

53 Memory address START (iic_send_memory_address( )) EEPROM / EEPROM / Memory address length EEPROM / Memory address( or ) ICDR END 32 Memory address D_IIC_EEP_READ or D_IIC_EEP_WRITE Device Address 1stMemory address D_IIC_EEP_READ or D_IIC_EEP_WRITE 1st Memory address 2nd Memory address RJJ06B Rev.1.00 Page 53 of 100

54 Memory address START (iic_after_memadd_send( )) EEPROM / = D_IIC_EEP_READ? No Yes = D_IIC_EEP_WRITE? No Yes Memory address Read (iic_after_memadd_send_read_mode()) Memory address Write (iic_after_memadd_send_write_mode()) END 33 Memory address D_IIC_EEP_READ or D_IIC_EEP_WRITE Memory address 1st (D_IIC_EEP_ WRITE) or 1st (D_IIC_EEP_READ) RJJ06B Rev.1.00 Page 54 of 100

55 Memory address Read START (iic_after_memadd_send_read_mode( )) ICSR.TEND=0 TEIE TXI SCL 9? No Yes ( ) D_IIC_EEP_START_ISSUE_WAIT END 34 Memory address Read D_IIC_EEP_READ Memory address Memory address (iic_after_memadd_send()) RJJ06B Rev.1.00 Page 55 of 100

56 Memory address Write START (iic_after_memadd_send_write_mode( )) EEPROM / ICDRT Write (iic_after_memadd_send_write_mode()) D_IIC_EEP_SEND_RCV_DATA_WAIT END 35 Memory address Write D_IIC_EEP_WRITE Memory address Memory address (iic_after_memadd_send()) RJJ06B Rev.1.00 Page 56 of 100

57 NACK (EEPROM) NACK RJJ06B Rev.1.00 Page 57 of 100

58 4.18 IIC intprg.c START (INT_IIC0_IICI0()) IIC0 (iic_user_int_select()) IIC (IIC0.ICSR.BYTE) *1) No Bcyc 4cyc Pcyc 2cyc Wait? *1) *1) INTC1.INTREQ00 Bcyc 4 + Pcyc 2 Yes END 36 IIC RJJ06B Rev.1.00 Page 58 of 100

59 5. (1) "sh7730.c" /****************************************************************************** * DISCLAIMER * This software is supplied by Renesas Electronics Corporation. and is only * intended for use with Renesas products. No other uses are authorized. * This software is owned by Renesas Electronics Corporation. and is protected under * all applicable laws, including copyright laws. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES * REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, * INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A * PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY * DISCLAIMED. * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS * TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES * FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS * AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * Renesas reserves the right, without notice, to make changes to this * software and to discontinue the availability of this software. * By using this software, you agree to the additional terms and * conditions found by accessing the following link: * ******************************************************************************/ /* Copyright (C) Renesas Electronics Corporation., All Rights Reserved.*/ /*""FILE COMMENT""*********** Technical reference data **************** * System Name : SH7730 Sample Program * File Name : sh7730.c * Abstract : SH7730 IIC Sample Program EEPROM * Version : Ver 1.00 * Device : SH7730 * Tool-Chain : High-performance Embedded Workshop (Version ) C/C++ Compiler Package for SuperH Family (V.9.03 release00) * OS : None * H/W Platform : SH-4A AP-SH4A-1A * Description : SH7730 IIC EEPROM * Operation : * Limitation : *********************************************************************** * History : 18.Jun.2010 Ver First Release *""FILE COMMENT END""**************************************************/ #include <machine.h> #include <string.h> #include "iodefine.h" #include "iic_eeprom.h" #define D_IIC_EEPROM_SEND_DATA_NUM 10 /* EEPROM */ #define D_IIC_EEPROM_READ_DATA_NUM 10 /* EEPROM */ /* */ unsigned char geeprom_write_data[] =0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a; RJJ06B Rev.1.00 Page 59 of 100

60 /* */ unsigned char geeprom_read_data[d_iic_eeprom_read_data_num]; void main(void); /*""FUNC COMMENT""*************************************************** * ID : * Outline : * Include : * Declaration : void main(void) * Description : SH7730 EEPROM EEPROM 10 9 Random Read Operation Sequential Read Operation Memory address 1 Current Address Read Operation EEPROM EEPROM * Argument : none * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ void main(void) E_Iic_eep_mode ret; int i; T_IIC_EEPROM_RW_INFO gwrite_info; /* Write */ T_IIC_EEPROM_RW_INFO gread_info; /* Random Read Operation Sequential Read Operation */ T_IIC_EEPROM_RW_INFO gcurrent_read_info; /* Current Address Read Operation */ T_IIC_EEPROM_CONDITION condition_info; /* EEPROM */ memset(&gwrite_info, 0x00, sizeof(gwrite_info)); memset(&gread_info, 0x00, sizeof(gread_info)); memset(&gcurrent_read_info, 0x00, sizeof(gcurrent_read_info)); memset(geeprom_read_data, 0x00, sizeof(geeprom_read_data)); memset(&condition_info, 0x00, sizeof(condition_info)); /* IIC */ iic_user_init(); /* EEPROM */ gwrite_info.i_mode = D_IIC_EEP_WRITE; gwrite_info.i_devadr = 0x00; gwrite_info.i_romadr = 0x ; gwrite_info.i_len = D_IIC_EEPROM_SEND_DATA_NUM; gwrite_info.i_pbuf = geeprom_write_data; /* EEPROM Random Read Operation Sequential Read Operation */ gread_info.i_mode = D_IIC_EEP_READ; gread_info.i_devadr = 0x00; gread_info.i_romadr = 0x ; gread_info.i_len = D_IIC_EEPROM_READ_DATA_NUM - 1; gread_info.i_pbuf = geeprom_read_data; RJJ06B Rev.1.00 Page 60 of 100

61 /* EEPROM Current Address Read Operation */ gcurrent_read_info.i_mode = D_IIC_EEP_CURRENT_READ; gcurrent_read_info.i_devadr = 0x00; gcurrent_read_info.i_len = 1; gcurrent_read_info.i_pbuf = &geeprom_read_data[9]; do /* EEPROM */ /* 0x */ ret = iic_user_eepromrw(&gwrite_info); if(d_iic_eep_ok!= ret) break; /* EEPROM */ do ret = iic_user_chk_eeprom(&condition_info); while(ret!= D_IIC_EEP_OK); /* EEPROM Random Read Operation Sequential Read Operation */ /* 0x */ ret = iic_user_eepromrw(&gread_info); if(d_iic_eep_ok!= ret) break; /* EEPROM Random Read Operation Sequential Read Operation */ do ret = iic_user_chk_eeprom(&condition_info); while(ret!= D_IIC_EEP_OK); /* EEPROM Current Address Read Operation */ /* (0x0009) 1 */ ret = iic_user_eepromrw(&gcurrent_read_info); if(d_iic_eep_ok!= ret) break; /* EEPROM Current Address Read Operation */ do ret = iic_user_chk_eeprom(&condition_info); while(ret!= D_IIC_EEP_OK); while(0); /* EEPROM EEPROM */ /* */ for(i = 0 ; i < D_IIC_EEPROM_SEND_DATA_NUM; i++) RJJ06B Rev.1.00 Page 61 of 100

62 if(geeprom_write_data[i]!= geeprom_read_data[i]) while(1) /* */ while(1) /* End of File */ RJJ06B Rev.1.00 Page 62 of 100

63 (2) "iic_eeprom_use_if.c" /****************************************************************************** * DISCLAIMER * This software is supplied by Renesas Electronics Corporation. and is only * intended for use with Renesas products. No other uses are authorized. * This software is owned by Renesas Electronics Corporation. and is protected under * all applicable laws, including copyright laws. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES * REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, * INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A * PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY * DISCLAIMED. * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS * TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES * FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS * AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * Renesas reserves the right, without notice, to make changes to this * software and to discontinue the availability of this software. * By using this software, you agree to the additional terms and * conditions found by accessing the following link: * ******************************************************************************/ /* Copyright (C) Renesas Electronics Corporation., All Rights Reserved.*/ /*""FILE COMMENT""*********** Technical reference data **************** * System Name : SH7730 Sample Program * File Name : iic_eeprom_use_if.c * Abstract : SH7730 IIC Sample Program EEPROM * Version : Ver 1.00 * Device : SH7730 * Tool-Chain : High-performance Embedded Workshop (Version ) C/C++ Compiler Package for SuperH Family (V.9.03 release00) * OS : None * H/W Platform : SH-4A AP-SH4A-1A * Description : SH7730 IIC EEPROM * Operation : * Limitation : *********************************************************************** * History : 18.Jun.2010 Ver First Release *""FILE COMMENT END""**************************************************/ #include <machine.h> #include <stdio.h> #include "iodefine.h" #include "iic_eeprom.h" /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC0 * Include : * Declaration : E_Iic_eep_Ret iic_user_init(void) * Description : IIC * Argument : none * Return Value : E_Iic_eep_Ret * Calling Functions : *""FUNC COMMENT END""**********************************************/ E_Iic_eep_Ret iic_user_init(void) RJJ06B Rev.1.00 Page 63 of 100

64 E_Iic_eep_Ret ret; ret = iic_mtx_executefunctable(d_iic_eep_ev_init, NULL); return ret; /*""FUNC COMMENT""*************************************************** * ID : * Outline : EEPROM / * Include : * Declaration : E_Iic_eep_Ret iic_user_eepromrw (T_IIC_EEPROM_RW_INFO *i_rw_info) * Description : EEPROM / * Argument : T_IIC_EEPROM_RW_INFO *i_rw_info R/W mode Device address Memory address Transfer/Receive data length Transfer/Receive data buffer pointer * Return Value : D_IIC_EEP_OK : Success D_IIC_EEP_BUS_BUSY : Bus Busy * Calling Functions : *""FUNC COMMENT END""**********************************************/ E_Iic_eep_Ret iic_user_eepromrw(t_iic_eeprom_rw_info *i_rw_info) E_Iic_eep_Ret ret; void *pdata; pdata = (void *)i_rw_info; ret = iic_mtx_executefunctable(d_iic_eep_ev_rw_start, pdata); return ret; /*""FUNC COMMENT""*************************************************** * ID : * Outline : EEPROM * Include : * Declaration : E_Iic_eep_Ret iic_user_chk_eeprom( T_IIC_EEPROM_CONDITION *o_condition_info) * Description : EEPROM / * Argument : T_IIC_EEPROM_CONDITION *o_condition_info EEPROM * Return Value : E_Iic_eep_Ret D_IIC_EEP_OK : Success D_IIC_EEP_NG : Error D_IIC_EEP_READING : READING D_IIC_EEP_WRITING : WRITING * Calling Functions : *""FUNC COMMENT END""**********************************************/ E_Iic_eep_Ret iic_user_chk_eeprom ( T_IIC_EEPROM_CONDITION *o_condition_info ) E_Iic_eep_Ret ret = D_IIC_EEP_OK; void *pdata; pdata = (void *)o_condition_info; ret = iic_mtx_executefunctable(d_iic_eep_ev_check, pdata); RJJ06B Rev.1.00 Page 64 of 100

65 return ret; /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC0 * Include : * Declaration : E_Iic_eep_Ret iic_user_int_select(void) * Description : IIC0 * Argument : none * Return Value : E_Iic_eep_Ret * Calling Functions : *""FUNC COMMENT END""**********************************************/ E_Iic_eep_Ret iic_user_int_select(void) E_Iic_eep_Ret ret = D_IIC_EEP_OK; /* */ if(iic0.icsr.bit.alove == 1 && IIC0.ICIER.BIT.NAKIE == 1) /* NAKI */ ret = iic_mtx_executefunctable(d_iic_eep_ev_int_naki, NULL); else if(iic0.icsr.bit.tend == 1 && IIC0.ICIER.BIT.TEIE == 1) /* TEI */ ret = iic_mtx_executefunctable(d_iic_eep_ev_int_tei, NULL); else if(iic0.icsr.bit.tdre == 1 && IIC0.ICIER.BIT.TIE == 1) /* TXI */ ret = iic_mtx_executefunctable(d_iic_eep_ev_int_txi, NULL); else if(iic0.icsr.bit.rdrf == 1 && IIC0.ICIER.BIT.RIE == 1) /* RXI */ ret = iic_mtx_executefunctable(d_iic_eep_ev_int_rxi, NULL); else if(iic0.icsr.bit.stop == 1 && IIC0.ICIER.BIT.STIE == 1) /* STPI */ ret = iic_mtx_executefunctable(d_iic_eep_ev_int_stpi, NULL); else return ret; /* End of File */ RJJ06B Rev.1.00 Page 65 of 100

66 (3) "iic_eeprom.c" /****************************************************************************** * DISCLAIMER * This software is supplied by Renesas Electronics Corporation. and is only * intended for use with Renesas products. No other uses are authorized. * This software is owned by Renesas Electronics Corporation. and is protected under * all applicable laws, including copyright laws. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES * REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, * INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A * PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY * DISCLAIMED. * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS * TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES * FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS * AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * Renesas reserves the right, without notice, to make changes to this * software and to discontinue the availability of this software. * By using this software, you agree to the additional terms and * conditions found by accessing the following link: * ******************************************************************************/ /* Copyright (C) Renesas Electronics Corporation., All Rights Reserved.*/ /*""FILE COMMENT""*********** Technical reference data **************** * System Name : SH7730 Sample Program * File Name : iic_eeprom.c * Abstract : SH7730 IIC Sample Program EEPROM * Version : Ver 1.00 * Device : SH7730 * Tool-Chain : High-performance Embedded Workshop (Version ) C/C++ Compiler Package for SuperH Family (V.9.03 release00) * OS : None * H/W Platform : SH-4A AP-SH4A-1A * Description : SH7730 IIC EEPROM * Operation : * Limitation : *********************************************************************** * History : 18.Jun.2010 Ver First Release *""FILE COMMENT END""**************************************************/ #include <machine.h> #include <stdio.h> #include "iodefine.h" #include "iic_eeprom.h" E_Iic_eep_condition giic_eep_condition; /* IIC_EEPROM */ E_Iic_eep_condition giic_eep_before_condition; /* IIC_EEPROM */ E_Iic_eep_err_condition giic_eep_err_condition; /* IIC_EEPROM */ T_IIC_EEPROM_RW_MANAGE giic_eep_manage_info; /* EEPROM / */ /* */ static E_Iic_eep_Ret iic_init(void *info); static E_Iic_eep_Ret iic_eepromrw(void *info); static E_Iic_eep_Ret iic_chk_eeprom(void *info); static E_Iic_eep_Ret iic_al_generate(void *info); static E_Iic_eep_Ret iic_after_start_issue(void *info); static E_Iic_eep_Ret iic_send_after_dev_address(void* info); static E_Iic_eep_Ret iic_after_re_devadd_send(void *info); RJJ06B Rev.1.00 Page 66 of 100

67 static E_Iic_eep_Ret iic_memadd_sending(void *info); static E_Iic_eep_Ret iic_write_data_sending(void *info); static E_Iic_eep_Ret iic_read_data_rcv(void *info); static E_Iic_eep_Ret iic_after_end_issue_write_polling(void *info); static E_Iic_eep_Ret iic_eep_writepolling(void *info); static E_Iic_eep_Ret iic_after_end_issue(void *info); /* */ static const T_IIC_EEPROM_MTX_TBL g_iic_eep_mtx_tbl[d_iic_eep_condition_max][d_iic_eep_event_max] = /* */ D_IIC_EEP_EV_INIT, iic_init, /* iic_user_init() */ D_IIC_EEP_EV_RW_START, NULL, /* iic_user_eepromrw() */ D_IIC_EEP_EV_CHECK, NULL, /* iic_user_chk_eeprom() */ D_IIC_EEP_EV_INT_NAKI, NULL, /* NAKI */ D_IIC_EEP_EV_INT_TXI, NULL, /* TXI */ D_IIC_EEP_EV_INT_TEI, NULL, /* TEI */ D_IIC_EEP_EV_INT_RXI, NULL, /* RXI */ D_IIC_EEP_EV_INT_STPI, NULL /* STPI */, */ */ */ */ */ */ /* */ D_IIC_EEP_EV_INIT, iic_init, /* iic_user_init() D_IIC_EEP_EV_RW_START, iic_eepromrw, /* iic_user_eepromrw() D_IIC_EEP_EV_CHECK, iic_chk_eeprom, /* iic_user_chk_eeprom() */ D_IIC_EEP_EV_INT_NAKI, iic_al_generate, /* NAKI */ D_IIC_EEP_EV_INT_TXI, NULL, /* TXI */ D_IIC_EEP_EV_INT_TEI, NULL, /* TEI */ D_IIC_EEP_EV_INT_RXI, NULL, /* RXI */ D_IIC_EEP_EV_INT_STPI, NULL /* STPI */, /* */ D_IIC_EEP_EV_INIT, NULL, /* iic_user_init() D_IIC_EEP_EV_RW_START, NULL, /* iic_user_eepromrw() D_IIC_EEP_EV_CHECK, iic_chk_eeprom, /* iic_user_chk_eeprom() */ D_IIC_EEP_EV_INT_NAKI, iic_al_generate, /* NAKI */ D_IIC_EEP_EV_INT_TXI, iic_after_start_issue, /* TXI */ D_IIC_EEP_EV_INT_TEI, NULL, /* TEI */ D_IIC_EEP_EV_INT_RXI, NULL, /* RXI */ D_IIC_EEP_EV_INT_STPI, NULL /* STPI */, /* Device Address */ D_IIC_EEP_EV_INIT, NULL, /* iic_user_init() D_IIC_EEP_EV_RW_START, NULL, /* iic_user_eepromrw() D_IIC_EEP_EV_CHECK, iic_chk_eeprom, /* iic_user_chk_eeprom() */ D_IIC_EEP_EV_INT_NAKI, iic_al_generate, /* NAKI */ D_IIC_EEP_EV_INT_TXI, NULL, /* TXI */ D_IIC_EEP_EV_INT_TEI, iic_send_after_dev_address, /* TEI */ D_IIC_EEP_EV_INT_RXI, NULL, /* RXI */ D_IIC_EEP_EV_INT_STPI, NULL /* STPI */ RJJ06B Rev.1.00 Page 67 of 100

68 */ */ */ */ */ */ */ */ */ */ */, /* Device Address */ D_IIC_EEP_EV_INIT, NULL, /* iic_user_init() D_IIC_EEP_EV_RW_START, NULL, /* iic_user_eepromrw() D_IIC_EEP_EV_CHECK, iic_chk_eeprom, /* iic_user_chk_eeprom() */ D_IIC_EEP_EV_INT_NAKI, iic_al_generate, /* NAKI */ D_IIC_EEP_EV_INT_TXI, NULL, /* TXI */ D_IIC_EEP_EV_INT_TEI, iic_after_re_devadd_send, /* TEI */ D_IIC_EEP_EV_INT_RXI, NULL, /* RXI */ D_IIC_EEP_EV_INT_STPI, NULL /* STPI */, /* Memory address */ D_IIC_EEP_EV_INIT, NULL, /* iic_user_init() D_IIC_EEP_EV_RW_START, NULL, /* iic_user_eepromrw() D_IIC_EEP_EV_CHECK, iic_chk_eeprom, /* iic_user_chk_eeprom() */ D_IIC_EEP_EV_INT_NAKI, iic_al_generate, /* NAKI */ D_IIC_EEP_EV_INT_TXI, NULL, /* TXI */ D_IIC_EEP_EV_INT_TEI, iic_memadd_sending, /* TEI */ D_IIC_EEP_EV_INT_RXI, NULL, /* RXI */ D_IIC_EEP_EV_INT_STPI, NULL /* STPI */, /* */ D_IIC_EEP_EV_INIT, NULL, /* iic_user_init() D_IIC_EEP_EV_RW_START, NULL, /* iic_user_eepromrw() D_IIC_EEP_EV_CHECK, iic_chk_eeprom, /* iic_user_chk_eeprom() */ D_IIC_EEP_EV_INT_NAKI, iic_al_generate, /* NAKI */ D_IIC_EEP_EV_INT_TXI, NULL, /* TXI */ D_IIC_EEP_EV_INT_TEI, iic_write_data_sending, /* TEI */ D_IIC_EEP_EV_INT_RXI, iic_read_data_rcv, /* RXI */ D_IIC_EEP_EV_INT_STPI, NULL /* STPI */, /* Write */ D_IIC_EEP_EV_INIT, NULL, /* iic_user_init(), D_IIC_EEP_EV_RW_START, NULL, /* iic_user_eepromrw() D_IIC_EEP_EV_CHECK, iic_chk_eeprom, /* iic_user_chk_eeprom() */ D_IIC_EEP_EV_INT_NAKI, iic_al_generate, /* NAKI */ D_IIC_EEP_EV_INT_TXI, NULL, /* TXI */ D_IIC_EEP_EV_INT_TEI, NULL, /* TEI */ D_IIC_EEP_EV_INT_RXI, NULL, /* RXI */ D_IIC_EEP_EV_INT_STPI, iic_after_end_issue_write_polling /* STPI /* WritePolling */ D_IIC_EEP_EV_INIT, NULL, /* iic_user_init() D_IIC_EEP_EV_RW_START, NULL, /* iic_user_eepromrw() D_IIC_EEP_EV_CHECK, iic_chk_eeprom, /* iic_user_chk_eeprom() */ RJJ06B Rev.1.00 Page 68 of 100

69 */ */ ; D_IIC_EEP_EV_INT_NAKI, iic_al_generate, /* NAKI */ D_IIC_EEP_EV_INT_TXI, NULL, /* TXI */ D_IIC_EEP_EV_INT_TEI, iic_eep_writepolling, /* TEI */ D_IIC_EEP_EV_INT_RXI, NULL, /* RXI */ D_IIC_EEP_EV_INT_STPI, NULL /* STPI */, /* */ D_IIC_EEP_EV_INIT, NULL, /* iic_user_init() D_IIC_EEP_EV_RW_START, NULL, /* iic_user_eepromrw() D_IIC_EEP_EV_CHECK, iic_chk_eeprom, /* iic_user_chk_eeprom() */ D_IIC_EEP_EV_INT_NAKI, iic_al_generate, /* NAKI */ D_IIC_EEP_EV_INT_TXI, NULL, /* TXI */ D_IIC_EEP_EV_INT_TEI, NULL, /* TEI */ D_IIC_EEP_EV_INT_RXI, NULL, /* RXI */ D_IIC_EEP_EV_INT_STPI, iic_after_end_issue /* STPI */ /* */ static E_Iic_eep_Ret iic_chk_bus_scl_sda(void); static E_Iic_eep_Ret iic_chg_to_read(void); static E_Iic_eep_Ret iic_send_memory_address(void); static void iic_after_memadd_send(void); static void iic_after_memadd_send_read_mode(void); static void iic_after_memadd_send_write_mode(void); static void iic_send_write_data(void); static E_Iic_eep_Nack iic_judge_nack(void); static void iic_chk_scl_down(void); static void set_internal_info_init(void); static void set_iic_eep_condition(e_iic_eep_condition i_condition); static E_Iic_eep_condition get_iic_eep_condition(void); static void set_iic_eep_before_condition(e_iic_eep_condition i_condition); static E_Iic_eep_condition get_iic_eep_before_condition(void); static void set_iic_eep_manage_info(t_iic_eeprom_rw_manage *i_info); static void get_iic_eep_manage_info(t_iic_eeprom_rw_manage *o_info); static void set_iic_eep_err_condition(e_iic_eep_err_condition i_err); static E_Iic_eep_err_condition get_iic_eep_err_condition(void); static E_Iic_eep_mode get_iic_eep_mode(void); /*""FUNC COMMENT""*************************************************** * ID : * Outline : * Include : * Declaration : E_Iic_eep_Ret iic_mtx_executefunctable(void) * Description : * Argument : E_Iic_eep_event event void *info * Return Value : E_Iic_eep_Ret * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_mtx_executefunctable( E_Iic_eep_event event, /* */ void *info /* */ ) E_Iic_eep_Ret ret = D_IIC_EEP_OK ; /* */ E_Iic_eep_condition NowCondition; /* */ E_Iic_eep_Ret (*pfunc)( void *); /* */ unsigned long IntMask; /* */ RJJ06B Rev.1.00 Page 69 of 100

70 IntMask = get_imask(); /* */ if(intmask < D_IIC_EEP_INT_LEVEL) set_imask(d_iic_eep_int_level); /* */ /* */ NowCondition = get_iic_eep_condition(); /* */ if(( NowCondition < D_IIC_EEP_CONDITION_MAX ) && ( event < D_IIC_EEP_EVENT_MAX )) /* */ if( g_iic_eep_mtx_tbl[nowcondition][event].proc!= NULL ) /* */ pfunc = g_iic_eep_mtx_tbl[nowcondition][event].proc; ret = (*pfunc)(info); /* NULL */ else ret = D_IIC_EEP_NOP; set_imask(intmask); /* */ return ret; /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC * Include : * Declaration : E_Iic_eep_Ret iic_init(void *info) * Description : iic * Argument : void *info * Return Value : D_IIC_EEP_OK * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_init(void *info) unsigned long dummy; set_internal_info_init(); /* */ /* ==== 1 ==== */ LOWP.MSTPCR1 &= ~0x ; /* IIC module clock supply */ dummy = LOWP.MSTPCR1; /* */ /* ==== PFC ==== */ PFC.PLCR.BIT.PL0MD = 0; /* SDA0 */ PFC.PLCR.BIT.PL1MD = 0; /* SCL0 */ /* ==== 1 ==== */ INTC0.IPRH = INTC0.IPRH 0x0001; /* EEPROM */ set_iic_eep_condition(d_iic_eep_idle); /* */ return D_IIC_EEP_OK; RJJ06B Rev.1.00 Page 70 of 100

71 /*""FUNC COMMENT""*************************************************** * ID : * Outline : EEPROM / * Include : * Declaration : E_Iic_eep_Ret iic_eepromrw(void *info) * Description : EEPROM / * Argument : void *info R/W mode Device address Memory address Transfer/Receive data length Transfer/Receive data buffer pointer * Return Value : D_IIC_EEP_OK : Success D_IIC_EEP_NG : Error D_IIC_EEP_BUS_BUSY : Bus Busy * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_eepromrw(void *info) unsigned char work; E_Iic_eep_Ret ret; T_IIC_EEPROM_RW_INFO *i_rw_info; T_IIC_EEPROM_RW_MANAGE manage_info; if(info == NULL) set_iic_eep_err_condition(d_iic_eep_err_other); /* */ return D_IIC_EEP_NG; /* Master transfer mode setting */ IIC0.ICCR1 = 0xf6; /* ICE : RCVD : MST : B'1 TRS : B'1 CKS : Pφ/100 */ /* BBSY */ work = IIC0.ICCR2; work = work >> 7; /* Bus busy check */ if(work == 1) return D_IIC_EEP_BUS_BUSY; i_rw_info = (T_IIC_EEPROM_RW_INFO *)info; /* */ memset(&manage_info, 0, sizeof(manage_info)); set_iic_eep_before_condition(d_iic_eep_no_init); /* */ set_iic_eep_err_condition(d_iic_eep_err_no); /* */ set_iic_eep_manage_info(&manage_info); /* mode set */ manage_info.i_mode = i_rw_info->i_mode; /* Device address set */ manage_info.i_devadr = (i_rw_info->i_devadr & 0x0f); manage_info.i_devadr = D_IIC_DEV_CODE; RJJ06B Rev.1.00 Page 71 of 100

72 /* */ switch(manage_info.i_mode) case D_IIC_EEP_WRITE: case D_IIC_EEP_READ: manage_info.i_devadr &= ~D_IIC_R_CODE; /* Write code set */ break; case D_IIC_EEP_CURRENT_READ: manage_info.i_devadr = D_IIC_R_CODE; /* Read code set */ break; default: set_iic_eep_err_condition(d_iic_eep_err_other); /* */ return D_IIC_EEP_NG; /* Memory address info set */ manage_info.i_memadrlen = D_IIC_EEP_MEMADR_SIZE; manage_info.i_memadrbuf[1] = (unsigned char)((i_rw_info->i_romadr >> 8) & 0x000000FF); manage_info.i_memadrbuf[0] = (unsigned char)(i_rw_info->i_romadr & 0x000000FF); /* Read/Write data size set */ manage_info.i_rw_data_info.i_datalen = i_rw_info->i_len; manage_info.i_rw_data_info.i_databuf = i_rw_info->i_pbuf; /* I2C */ iic_chk_bus_scl_sda(); /* I2C I2C IIC */ /* I2C I2C IIC */ /* ==== IIC.ICCR2 ==== */ IIC0.ICCR2 = 0x02; /* IIC */ work = IIC0.ICCR2; IIC0.ICCR2 &= ~0x02; /* IIC */ /* ==== IIC.ICCR1 ==== */ IIC0.ICCR1 &= ~0x80; /* */ /* Master transfer mode setting */ IIC0.ICCR1 = 0xf6; /* ICE : RCVD : MST : B'1 TRS : B'1 CKS : Pφ/100 */ /* I2C */ ret = iic_chk_bus_scl_sda(); /* IIC I2C */ if(ret == D_IIC_EEP_NG) return D_IIC_EEP_BUS_BUSY; /* ==== IIC0.ICMR0 ==== */ IIC0.ICMR = 0x30; /* MSB =9 RJJ06B Rev.1.00 Page 72 of 100

73 /* TXI interrupt enable */ IIC0.ICIER.BIT.TIE = 1; /* NAKI interrupt enable */ IIC0.ICIER.BIT.NAKIE = 1; /* Start condition generate */ IIC0.ICCR2 = ((IIC0.ICCR2 & 0xbf) 0x80); */ /* EEPROM / */ set_iic_eep_manage_info(&manage_info); /* EEPROM */ set_iic_eep_condition(d_iic_eep_start_issue_wait); /* */ return D_IIC_EEP_OK; /*""FUNC COMMENT""*************************************************** * ID : * Outline : EEPROM * Include : * Declaration : E_Iic_eep_Ret iic_chk_eeprom(void *info) * Description : EEPROM / * Argument : T_IIC_EEPROM_CONDITION * Return Value : E_Iic_eep_Ret * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_chk_eeprom(void *info) E_Iic_eep_Ret ret = D_IIC_EEP_NG; T_IIC_EEPROM_CONDITION *condition_info; if(info == NULL) set_iic_eep_err_condition(d_iic_eep_err_other); return D_IIC_EEP_NG; condition_info = (T_IIC_EEPROM_CONDITION *)info; /* */ condition_info->i_eep_condition = get_iic_eep_condition(); /* */ condition_info->i_err_condition = get_iic_eep_err_condition(); do /* */ if(d_iic_eep_err_no!= condition_info->i_err_condition) /* */ break; /* */ /* */ if(d_iic_eep_idle == get_iic_eep_condition() && D_IIC_EEP_END_ISSUE_WAIT == get_iic_eep_before_condition()) ret = D_IIC_EEP_OK; /* */ break; RJJ06B Rev.1.00 Page 73 of 100

74 switch(get_iic_eep_mode()) case D_IIC_EEP_WRITE: /* Write */ ret = D_IIC_EEP_WRITING; break; case D_IIC_EEP_READ: /* Read */ case D_IIC_EEP_CURRENT_READ: ret = D_IIC_EEP_READING; break; while(0); default: break; return ret; /*""FUNC COMMENT""*************************************************** * ID : * Outline : AL * Include : * Declaration : E_Iic_eep_Ret iic_al_generate(void* info) * Description : AL * Argument : void *info : No Use * Return Value : D_IIC_EEP_OK : Success * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_al_generate(void* info) /* AL */ /* */ if(iic0.icsr.bit.alove == 1) /* */ set_iic_eep_err_condition(d_iic_eep_err_al); IIC0.ICSR.BIT.ALOVE = 0; return D_IIC_EEP_OK; /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC * Include : * Declaration : E_Iic_eep_Ret iic_after_start_issue(void *info) * Description : Device address TXI * Argument : void *info : No Use * Return Value : D_IIC_EEP_OK : Success D_IIC_EEP_NG : Error * Calling Functions : RJJ06B Rev.1.00 Page 74 of 100

75 *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_after_start_issue(void *info) E_Iic_eep_Ret ret = D_IIC_EEP_OK; T_IIC_EEPROM_RW_MANAGE manage_info; E_Iic_eep_condition Eep_Condition; memset(&manage_info, 0, sizeof(manage_info)); /* TXI interrupt disable */ IIC0.ICIER.BIT.TIE = 0; /* EEPROM / */ get_iic_eep_manage_info(&manage_info); /* */ switch(get_iic_eep_before_condition()) case D_IIC_EEP_IDLE: /* */ /* EEPROM */ Eep_Condition = D_IIC_EEP_SEND_DEVADD_WAIT; /* Device Address */ break; case D_IIC_EEP_WRITE_END_ISSUE_WAIT: /* Write */ case D_IIC_EEP_WRITE_POLLING_WAIT: /* WritePolling */ /* EEPROM */ Eep_Condition = D_IIC_EEP_WRITE_POLLING_WAIT; /* WritePolling */ break; case D_IIC_EEP_SEND_MEMADD_WAIT: /* Memory address */ /* Read code set */ manage_info.i_devadr = D_IIC_R_CODE; /* EEPROM / */ set_iic_eep_manage_info(&manage_info); /* EEPROM */ Eep_Condition = D_IIC_EEP_RESEND_DEVADD_WAIT; /* */ break; default: set_iic_eep_err_condition(d_iic_eep_err_other); /* */ ret = D_IIC_EEP_NG; break; if(ret == D_IIC_EEP_OK) /* TEI interrupt enable */ IIC0.ICIER.BIT.TEIE = 1; /* Device address set to transfer data */ IIC0.ICDRT = manage_info.i_devadr; /* EEPROM */ set_iic_eep_condition(eep_condition); RJJ06B Rev.1.00 Page 75 of 100

76 return ret; /*""FUNC COMMENT""*************************************************** * ID : * Outline : Device Address * Include : * Declaration : E_Iic_eep_Ret iic_send_after_dev_address (void* info) * Description : Device Address * Argument : void *info : No Use * Return Value : D_IIC_EEP_OK : Success D_IIC_EEP_NG : Error * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_send_after_dev_address(void* info) T_IIC_EEPROM_RW_MANAGE manage_info; E_Iic_eep_Ret ret = D_IIC_EEP_NG; memset(&manage_info, 0, sizeof(manage_info)); /* NACK found? */ if(d_iic_nack_found == iic_judge_nack()) /* */ return D_IIC_EEP_NG; /* EEPROM / */ get_iic_eep_manage_info(&manage_info); /* */ switch(manage_info.i_mode) case D_IIC_EEP_CURRENT_READ: /* Current Address Read Sequential Read Operation */ /* Read */ ret = iic_chg_to_read(); break; case D_IIC_EEP_READ: /* Random Read Operation Sequential Read Operation */ case D_IIC_EEP_WRITE: /* Write */ /* Memory address */ ret = iic_send_memory_address(); /* EEPROM */ set_iic_eep_condition(d_iic_eep_send_memadd_wait); /* Memory address */ break; default: set_iic_eep_err_condition(d_iic_eep_err_other); /* */ ret = D_IIC_EEP_NG; break; return ret; RJJ06B Rev.1.00 Page 76 of 100

77 /*""FUNC COMMENT""*************************************************** * ID : * Outline : Device Address * Include : * Declaration : E_Iic_eep_Ret iic_after_re_devadd_send (void* info) * Description : * Argument : void *info : No Use * Return Value : D_IIC_EEP_OK : Success D_IIC_EEP_NG : Error * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_after_re_devadd_send(void* info) E_Iic_eep_Ret ret; /* NACK found? */ if(d_iic_nack_found == iic_judge_nack()) /* */ return D_IIC_EEP_NG; /* Read */ ret = iic_chg_to_read(); return ret; /*""FUNC COMMENT""*************************************************** * ID : * Outline : Memory address * Include : * Declaration : E_Iic_eep_Ret iic_memadd_sending (void* info) * Description : Memory address TEI * Argument : void *info : No Use * Return Value : D_IIC_EEP_OK : Success D_IIC_EEP_NG : Error * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_memadd_sending(void* info) T_IIC_EEPROM_RW_MANAGE manage_info; memset(&manage_info, 0, sizeof(manage_info)); /* NACK found? */ if(d_iic_nack_found == iic_judge_nack()) /* */ return D_IIC_EEP_NG; /* EEPROM / */ get_iic_eep_manage_info(&manage_info); /* Memory address? */ if(manage_info.i_memadrlen == 0) /* Memory address */ iic_after_memadd_send(); else RJJ06B Rev.1.00 Page 77 of 100

78 /* 2nd Memory address to transfer data */ iic_send_memory_address(); return D_IIC_EEP_OK; /*""FUNC COMMENT""*************************************************** * ID : * Outline : WriteData * Include : * Declaration : E_Iic_eep_Ret iic_write_data_sending (void* info) * Description : WriteData Write Write TEI * Argument : void *info : No Use * Return Value : D_IIC_EEP_OK : Success D_IIC_EEP_NG : Error * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_write_data_sending(void* info) T_IIC_EEPROM_RW_MANAGE manage_info; */ memset(&manage_info, 0, sizeof(manage_info)); /* NACK found? */ if(d_iic_nack_found == iic_judge_nack()) /* */ return D_IIC_EEP_NG; /* EEPROM / */ get_iic_eep_manage_info(&manage_info); if(manage_info.i_rw_data_info.i_datalen == 0) /* */ /* TEND */ IIC0.ICSR.BIT.TEND = 0; /* TEI interrupt disable */ IIC0.ICIER.BIT.TEIE = 0; /* STPI interrupt enable */ IIC0.ICIER.BIT.STIE = 1; /* SCL */ /* 9 */ iic_chk_scl_down(); /* Stop condition generate */ IIC0.ICSR.BIT.STOP = 0; /* STOP flag clear */ IIC0.ICCR2 = IIC0.ICCR2 & (0x7F & 0xBF); /* EEPROM */ set_iic_eep_condition(d_iic_eep_write_end_issue_wait); /* Write RJJ06B Rev.1.00 Page 78 of 100

79 else /* */ /* Write */ iic_send_write_data(); return D_IIC_EEP_OK; /*""FUNC COMMENT""*************************************************** * ID : * Outline : ReadData * Include : * Declaration : E_Iic_eep_Ret iic_read_data_rcv(void *info) * Description : RXI * Argument : void *info : No Use * Return Value : D_IIC_EEP_OK : Success * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_read_data_rcv(void *info) unsigned char dummy; E_Iic_eep_condition Eep_Condition; T_IIC_EEPROM_RW_MANAGE manage_info; memset(&manage_info, 0, sizeof(manage_info)); Eep_Condition = get_iic_eep_condition(); /* */ /* EEPROM / */ get_iic_eep_manage_info(&manage_info); manage_info.i_rw_data_info.i_datalen--; /* */ if(manage_info.i_rw_data_info.i_datalen == 0) /* = 0 */ IIC0.ICIER.BIT.RIE = 0; /* RXI interrupt disable */ IIC0.ICIER.BIT.STIE = 1; /* STPI interrupt enable */ /* SCL */ /* 9 */ iic_chk_scl_down(); /* Stop condition generate */ IIC0.ICSR.BIT.STOP = 0; /* STOP flag clear */ IIC0.ICCR2 = IIC0.ICCR2 & (0x7F & 0xBF); /* EEPROM */ Eep_Condition = D_IIC_EEP_END_ISSUE_WAIT; /* */ else if(manage_info.i_rw_data_info.i_datalen == 1) /* = 1 */ IIC0.ICIER.BIT.ACKBT = 1; /* Send NACK */ *manage_info.i_rw_data_info.i_databuf = IIC0.ICDRR; manage_info.i_rw_data_info.i_databuf++; else *manage_info.i_rw_data_info.i_databuf = IIC0.ICDRR; manage_info.i_rw_data_info.i_databuf++; RJJ06B Rev.1.00 Page 79 of 100

80 /* EEPROM / */ set_iic_eep_manage_info(&manage_info); /* EEPROM */ set_iic_eep_condition(eep_condition); return D_IIC_EEP_OK; /*""FUNC COMMENT""*************************************************** * ID : * Outline : Write Polling * Include : * Declaration : E_Iic_eep_Ret iic_after_end_issue_write_polling (void *info) * Description : * Argument : void *info : No Use * Return Value : D_IIC_EEP_OK : Success * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_after_end_issue_write_polling(void *info) T_IIC_EEPROM_RW_MANAGE manage_info; memset(&manage_info, 0, sizeof(manage_info)); /* EEPROM / */ get_iic_eep_manage_info(&manage_info); IIC0.ICSR.BIT.STOP = 0; /* STOP clear */ IIC0.ICIER.BIT.STIE = 0; /* STPI interrupt disable */ /* Write Polling cycle set */ manage_info.i_wctcnt = D_IIC_WCT_CNT; /* TXI interrupt enable */ IIC0.ICIER.BIT.TIE = 1; /* Start condition generate */ IIC0.ICCR2 = ((IIC0.ICCR2 & 0xbf) 0x80); /* EEPROM / */ set_iic_eep_manage_info(&manage_info); /* EEPROM */ set_iic_eep_condition(d_iic_eep_start_issue_wait); /* */ return D_IIC_EEP_OK; /*""FUNC COMMENT""*************************************************** * ID : * Outline : WritePolling * Include : * Declaration : E_Iic_eep_Ret iic_eep_writepolling (void* info) * Description : EEPROM * Argument : void *info : No Use * Return Value : D_IIC_EEP_OK : Success RJJ06B Rev.1.00 Page 80 of 100

81 * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_eep_writepolling(void* info) T_IIC_EEPROM_RW_MANAGE manage_info; E_Iic_eep_condition Eep_Condition; memset(&manage_info, 0, sizeof(manage_info)); Eep_Condition = get_iic_eep_condition(); /* */ /* EEPROM / */ get_iic_eep_manage_info(&manage_info); /* NACK found? */ if(iic0.icier.bit.ackbr == 1) /* NACK? */ if(manage_info.i_wctcnt == 0) /* WritePolling == 0 */ /* TEND */ IIC0.ICSR.BIT.TEND = 0; /* TEI interrupt disable */ IIC0.ICIER.BIT.TEIE = 0; /* STPI interrupt enable */ IIC0.ICIER.BIT.STIE = 1; /* SCL */ /* 9 */ iic_chk_scl_down(); /* Stop condition generate */ IIC0.ICSR.BIT.STOP = 0; /* STOP flag clear */ IIC0.ICCR2 = IIC0.ICCR2 & (0x7F & 0xBF); set_iic_eep_err_condition(d_iic_eep_err_wct_over); /* */ /* EEPROM */ Eep_Condition = D_IIC_EEP_END_ISSUE_WAIT; /* */ else /* WritePolling > 0 */ /* WritePolling */ manage_info.i_wctcnt--; /* TEND */ IIC0.ICSR.BIT.TEND = 0; /* TEI interrupt disable */ IIC0.ICIER.BIT.TEIE = 0; /* TXI interrupt enable */ IIC0.ICIER.BIT.TIE = 1; /* SCL */ /* 9 */ iic_chk_scl_down(); /* ReStart condition generate */ IIC0.ICCR2 = ((IIC0.ICCR2 & 0xbf) 0x80); /* EEPROM */ Eep_Condition = D_IIC_EEP_START_ISSUE_WAIT; /* */ RJJ06B Rev.1.00 Page 81 of 100

82 else /* ACK? */ manage_info.i_wctcnt = 0; /* TEND */ IIC0.ICSR.BIT.TEND = 0; /* TEI interrupt disable */ IIC0.ICIER.BIT.TEIE = 0; /* STPI interrupt enable */ IIC0.ICIER.BIT.STIE = 1; /* SCL */ /* 9 */ iic_chk_scl_down(); /* Stop condition generate */ IIC0.ICSR.BIT.STOP = 0; /* STOP flag clear */ IIC0.ICCR2 = IIC0.ICCR2 & (0x7F & 0xBF); /* EEPROM */ Eep_Condition = D_IIC_EEP_END_ISSUE_WAIT; /* */ /* EEPROM / */ set_iic_eep_manage_info(&manage_info); /* EEPROM */ set_iic_eep_condition(eep_condition); return D_IIC_EEP_OK; /*""FUNC COMMENT""*************************************************** * ID : * Outline : * Include : * Declaration : E_Iic_eep_Ret iic_after_end_issue (void *info) * Description : STPI * Argument : void *info : No Use * Return Value : D_IIC_EEP_OK : Success * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_after_end_issue(void *info) E_Iic_eep_Ret ret; unsigned char work; T_IIC_EEPROM_RW_MANAGE manage_info; memset(&manage_info, 0, sizeof(manage_info)); /* flg clear */ IIC0.ICSR.BIT.TEND = 0; /* TEND clear */ IIC0.ICSR.BIT.RDRF = 0; /* RDRF clear */ IIC0.ICSR.BIT.STOP = 0; /* STOP clear */ /* IIC interrupt disable */ IIC0.ICIER.BIT.STIE = 0; /* STPI interrupt disable */ IIC0.ICIER.BIT.TEIE = 0; /* TEI interrupt disable */ RJJ06B Rev.1.00 Page 82 of 100

83 IIC0.ICIER.BIT.TIE = 0; /* TXI interrupt disable */ IIC0.ICIER.BIT.RIE = 0; /* RXI interrupt disable */ work = IIC0.ICCR1; if( D_IIC_EEP_READ == get_iic_eep_mode() D_IIC_EEP_CURRENT_READ == get_iic_eep_mode()) /* EEPROM / */ get_iic_eep_manage_info(&manage_info); *manage_info.i_rw_data_info.i_databuf = IIC0.ICDRR; /* */ work = work & ~0x40; /* RCVD = 0 */ /* EEPROM / */ set_iic_eep_manage_info(&manage_info); work &= 0xcf; /* Slave receive mode set */ IIC0.ICCR1 = work; if( D_IIC_EEP_WRITE == get_iic_eep_mode() ) IIC0.ICSR.BIT.TDRE = 0; /* TDRE clear */ /* I2C */ ret = iic_chk_bus_scl_sda(); /* I2C */ if(ret!= D_IIC_EEP_OK) while(1); /* EEPROM */ set_iic_eep_condition(d_iic_eep_idle); /* */ return D_IIC_EEP_OK; /**************************************************************************************/ /* */ /*""FUNC COMMENT""*************************************************** * ID : * Outline : I2C * Include : * Declaration : E_Iic_eep_Ret iic_chk_bus_scl_sda(void) * Description : I2C Low D_IIC_BUSYCHECK_TMOUT I2C * Argument : none * Return Value : D_IIC_EEP_OK :I2C D_IIC_EEP_NG :I2C * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_chk_bus_scl_sda(void) RJJ06B Rev.1.00 Page 83 of 100

84 unsigned long i; E_Iic_eep_Ret ret = D_IIC_EEP_OK; for (i = D_IIC_BUSYCHECK_TMOUT; i > 0; i--) /* BBSY,SDAO,SCLO */ if ( (IIC0.ICCR2 & 0xA8) == 0x28 ) /* BBSY = 0? SDAO SCLO = 1? */ break; /* I2C */ /* I2C? */ if(i == 0) ret = D_IIC_EEP_NG; return ret; /*""FUNC COMMENT""*************************************************** * ID : * Outline : Read * Include : * Declaration : E_Iic_eep_Ret iic_chg_to_read(void) * Description : * Argument : none * Return Value : D_IIC_EEP_OK : Success * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_chg_to_read(void) T_IIC_EEPROM_RW_MANAGE manage_info; unsigned char dummy; memset(&manage_info, 0, sizeof(manage_info)); /* EEPROM / */ get_iic_eep_manage_info(&manage_info); /* TEND clear */ IIC0.ICSR.BIT.TEND = 0; /* TEI interrupt disable */ IIC0.ICIER.BIT.TEIE = 0; /* Master receive mode */ IIC0.ICCR1 &= ~0x10; /* TDRE clear */ IIC0.ICSR.BIT.TDRE = 0; /* TXI interrupt disable */ IIC0.ICIER.BIT.TIE = 0; /* ICCR1.RCVD */ IIC0.ICCR1 = 0x40; /* Read 1? */ if(manage_info.i_rw_data_info.i_datalen == 1) IIC0.ICIER.BIT.ACKBT = 1; RJJ06B Rev.1.00 Page 84 of 100

85 else IIC0.ICIER.BIT.ACKBT = 0; /* RXI interrupt enable */ IIC0.ICIER.BIT.RIE = 1; /* dummy Read */ dummy = IIC0.ICDRR; /* EEPROM */ set_iic_eep_condition(d_iic_eep_send_rcv_data_wait); /* */ return D_IIC_EEP_OK; /*""FUNC COMMENT""*************************************************** * ID : * Outline : Memory address * Include : * Declaration : E_Iic_eep_Ret iic_send_memory_address (void) * Description : Memory address * Argument : none * Return Value : D_IIC_EEP_OK : Success * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Ret iic_send_memory_address(void) T_IIC_EEPROM_RW_MANAGE manage_info; memset(&manage_info, 0, sizeof(manage_info)); /* EEPROM / */ get_iic_eep_manage_info(&manage_info); /* Memory address set to transfer data */ manage_info.i_memadrlen--; IIC0.ICDRT = manage_info.i_memadrbuf[manage_info.i_memadrlen]; /* EEPROM / */ set_iic_eep_manage_info(&manage_info); return D_IIC_EEP_OK; /*""FUNC COMMENT""*************************************************** * ID : * Outline : Memory address * Include : * Declaration : void iic_after_memadd_send(void) * Description : Memory address * Argument : none * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ static void iic_after_memadd_send(void) switch(get_iic_eep_mode()) RJJ06B Rev.1.00 Page 85 of 100

86 case D_IIC_EEP_READ: /* Read */ iic_after_memadd_send_read_mode(); /* Memory address Read */ break; case D_IIC_EEP_WRITE: /* Write */ iic_after_memadd_send_write_mode(); /* Memory address Write */ break; default: break; /*""FUNC COMMENT""*************************************************** * ID : * Outline : Memory address Read * Include : * Declaration : void iic_after_memadd_send_read_mode(void) * Description : Restart condition generate * Argument : none * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ static void iic_after_memadd_send_read_mode(void) /* TEND */ IIC0.ICSR.BIT.TEND = 0; /* TEI interrupt disable */ IIC0.ICIER.BIT.TEIE = 0; /* TXI interrupt enable */ IIC0.ICIER.BIT.TIE = 1; /* SCL */ /* 9 */ iic_chk_scl_down(); /* ReStart condition generate */ IIC0.ICCR2 = ((IIC0.ICCR2 & 0xbf) 0x80); /* EEPROM */ set_iic_eep_condition(d_iic_eep_start_issue_wait); /* */ return; /*""FUNC COMMENT""*************************************************** * ID : * Outline : Write * Include : * Declaration : void iic_after_memadd_send_write_mode(void) * Description : ICDRT * Argument : none * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ static void iic_after_memadd_send_write_mode(void) /* Write */ RJJ06B Rev.1.00 Page 86 of 100

87 iic_send_write_data(); /* EEPROM */ set_iic_eep_condition(d_iic_eep_send_rcv_data_wait); /* */ return; /*""FUNC COMMENT""*************************************************** * ID : * Outline : Write * Include : * Declaration : void iic_send_write_data(void) * Description : ICDRT * Argument : none * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ static void iic_send_write_data(void) T_IIC_EEPROM_RW_MANAGE manage_info; memset(&manage_info, 0, sizeof(manage_info)); /* EEPROM / */ get_iic_eep_manage_info(&manage_info); /* Write Data to transfer data */ IIC0.ICDRT = *manage_info.i_rw_data_info.i_databuf; manage_info.i_rw_data_info.i_databuf++; manage_info.i_rw_data_info.i_datalen--; /* EEPROM / */ set_iic_eep_manage_info(&manage_info); return; /*""FUNC COMMENT""*************************************************** * ID : * Outline : NACK * Include : * Declaration : E_Iic_eep_Nack iic_judge_nack(void) * Description : NACK * Argument : void * Return Value : E_Iic_eep_Nack D_IIC_NACK_FOUND : NACK D_IIC_NACK_NOTFOUND : NACK * Calling Functions : *""FUNC COMMENT END""**********************************************/ static E_Iic_eep_Nack iic_judge_nack(void) E_Iic_eep_Nack ret = D_IIC_NACK_NOTFOUND; /* */ if(iic0.icier.bit.ackbr == 1) /* NACK */ /* */ RJJ06B Rev.1.00 Page 87 of 100

88 set_iic_eep_err_condition(d_iic_eep_err_nack); ret = D_IIC_NACK_FOUND; return ret; /*""FUNC COMMENT""*************************************************** * ID : * Outline : SCL * Include : * Declaration : void iic_chk_scl_down(void) * Description : SCL * Argument : none * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ static void iic_chk_scl_down(void) /* SCL */ do if(((iic0.iccr2 & 0x08) >> 3) == 0) break; while(1); /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC_EEPROM * Include : * Declaration : void set_internal_info_init(void) * Description : IIC_EEPROM * Argument : none * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ static void set_internal_info_init(void) giic_eep_condition = D_IIC_EEP_NO_INIT; /* IIC_EEPROM */ giic_eep_before_condition = D_IIC_EEP_NO_INIT; /* IIC_EEPROM */ set_iic_eep_err_condition(d_iic_eep_err_no); /* */ /* EEPROM / */ memset(&giic_eep_manage_info, 0, sizeof(giic_eep_manage_info)); /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC_EEPROM * Include : * Declaration : void set_iic_eep_condition( E_Iic_eep_condition i_condition) * Description : IIC_EEPROM * Argument : E_Iic_eep_condition i_condition RJJ06B Rev.1.00 Page 88 of 100

89 iic_eeprom.h E_Iic_eep_condition * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ void set_iic_eep_condition(e_iic_eep_condition i_condition) giic_eep_before_condition = giic_eep_condition; /* */ giic_eep_condition = i_condition; /* */ /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC_EEPROM * Include : * Declaration : E_Iic_eep_condition get_iic_eep_condition(void) * Description : IIC_EEPROM * Argument : none * Return Value : E_Iic_eep_condition iic_eeprom.h E_Iic_eep_condition * Calling Functions : *""FUNC COMMENT END""**********************************************/ E_Iic_eep_condition get_iic_eep_condition(void) return giic_eep_condition; /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC_EEPROM * Include : * Declaration : void set_iic_eep_before_condition( E_Iic_eep_condition i_condition) * Description : IIC_EEPROM * Argument : E_Iic_eep_condition i_condition iic_eeprom.h E_Iic_eep_condition * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ void set_iic_eep_before_condition(e_iic_eep_condition i_condition) giic_eep_before_condition = i_condition; /* */ /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC_EEPROM * Include : * Declaration : E_Iic_eep_condition get_iic_eep_before_condition(void) * Description : IIC_EEPROM * Argument : none * Return Value : E_Iic_eep_condition iic_eeprom.h E_Iic_eep_condition * Calling Functions : *""FUNC COMMENT END""**********************************************/ E_Iic_eep_condition get_iic_eep_before_condition(void) return giic_eep_before_condition; RJJ06B Rev.1.00 Page 89 of 100

90 /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC_EEPROM * Include : * Declaration : E_Iic_eep_mode get_iic_eep_mode(void) * Description : IIC * Argument : none * Return Value : E_Iic_eep_mode iic_eeprom.h E_Iic_eep_mode * Calling Functions : *""FUNC COMMENT END""**********************************************/ E_Iic_eep_mode get_iic_eep_mode(void) return giic_eep_manage_info.i_mode; /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC_EEPROM * Include : * Declaration : void set_iic_eep_manage_info( T_IIC_EEPROM_RW_MANAGE *i_info) * Description : IIC_EEPROM * Argument : T_IIC_EEPROM_RW_MANAGE *i_info * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ void set_iic_eep_manage_info(t_iic_eeprom_rw_manage *i_info) memcpy(&giic_eep_manage_info, i_info, sizeof(t_iic_eeprom_rw_manage)); /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC_EEPROM * Include : * Declaration : void get_iic_eep_manage_info( T_IIC_EEPROM_RW_MANAGE *o_info) * Description : IIC_EEPROM * Argument : T_IIC_EEPROM_RW_MANAGE *o_info * Return Value : none * Calling Functions : *""FUNC COMMENT END""**********************************************/ void get_iic_eep_manage_info(t_iic_eeprom_rw_manage *o_info) memcpy(o_info, &giic_eep_manage_info, sizeof(t_iic_eeprom_rw_manage)); /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC_EEPROM * Include : * Declaration : void set_iic_eep_err_condition( E_Iic_eep_err_condition i_err) * Description : IIC_EEPROM * Argument : E_Iic_eep_err_condition i_err * Return Value : none * Calling Functions : RJJ06B Rev.1.00 Page 90 of 100

91 *""FUNC COMMENT END""**********************************************/ void set_iic_eep_err_condition(e_iic_eep_err_condition i_err) giic_eep_err_condition = i_err; /*""FUNC COMMENT""*************************************************** * ID : * Outline : IIC_EEPROM * Include : * Declaration : E_Iic_eep_err_condition get_iic_eep_err_condition() * Description : IIC_EEPROM * Argument : none * Return Value : E_Iic_eep_err_condition * Calling Functions : *""FUNC COMMENT END""**********************************************/ E_Iic_eep_err_condition get_iic_eep_err_condition(void) return giic_eep_err_condition; /* End of File */ RJJ06B Rev.1.00 Page 91 of 100

92 (4) "iic_eeprom.h" /****************************************************************************** * DISCLAIMER * This software is supplied by Renesas Electronics Corporation. and is only * intended for use with Renesas products. No other uses are authorized. * This software is owned by Renesas Electronics Corporation. and is protected under * all applicable laws, including copyright laws. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES * REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, * INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A * PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY * DISCLAIMED. * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS * TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES * FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS * AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * Renesas reserves the right, without notice, to make changes to this * software and to discontinue the availability of this software. * By using this software, you agree to the additional terms and * conditions found by accessing the following link: * ******************************************************************************/ /* Copyright (C) Renesas Electronics Corporation., All Rights Reserved.*/ /*""FILE COMMENT""*********** Technical reference data **************** * System Name : SH7730 Sample Program * File Name : iic_eeprom.h * Abstract : SH7730 IIC Sample Program EEPROM * Version : Ver 1.00 * Device : SH7730 * Tool-Chain : High-performance Embedded Workshop (Version ) C/C++ Compiler Package for SuperH Family (V.9.03 release00) * OS : None * H/W Platform : SH-4A AP-SH4A-1A * Description : SH7730 IIC EEPROM * Operation : * Limitation : *********************************************************************** * History : 18.Jun.2010 Ver First Release *""FILE COMMENT END""**************************************************/ #ifndef IIC_EEPROM_DEF_H #define IIC_EEPROM_DEF_H /* ==== ==== */ /* IIC */ /* */ #define D_IIC_EEP_INT_LEVEL 2 /* Memory address size */ #define D_IIC_EEP_MEMADR_SIZE 2 /* Write Polling Count 10ms (400Kbps base) */ #define D_IIC_WCT_CNT 480 RJJ06B Rev.1.00 Page 92 of 100

93 /* I2C */ #define D_IIC_BUSYCHECK_TMOUT /* Device Code */ #define D_IIC_DEV_CODE /* Write code */ #define D_IIC_W_CODE /* Read code */ #define D_IIC_R_CODE /* */ typedef enum D_IIC_EEP_NG = -1, D_IIC_EEP_OK = 0, D_IIC_EEP_NOP, D_IIC_EEP_READING, D_IIC_EEP_WRITING, D_IIC_EEP_BUS_BUSY, E_Iic_eep_Ret; /* NACK */ typedef enum D_IIC_NACK_FOUND = 0, D_IIC_NACK_NOTFOUND E_Iic_eep_Nack; 0xA0 0x00 0x01 /* EEPROM */ typedef enum D_IIC_EEP_NO_INIT, /* */ D_IIC_EEP_IDLE, /* */ D_IIC_EEP_START_ISSUE_WAIT, /* */ D_IIC_EEP_SEND_DEVADD_WAIT, /* Device Address */ D_IIC_EEP_RESEND_DEVADD_WAIT, /* Device Address */ D_IIC_EEP_SEND_MEMADD_WAIT, /* Memory address */ D_IIC_EEP_SEND_RCV_DATA_WAIT, /* */ D_IIC_EEP_WRITE_END_ISSUE_WAIT, /* Write */ D_IIC_EEP_WRITE_POLLING_WAIT, /* WritePolling */ D_IIC_EEP_END_ISSUE_WAIT, /* */ D_IIC_EEP_CONDITION_MAX /* */ E_Iic_eep_condition; /* EEPROM */ typedef enum D_IIC_EEP_EV_INIT, /* iic_user_init() */ D_IIC_EEP_EV_RW_START, /* iic_user_eepromrw() */ D_IIC_EEP_EV_CHECK, /* iic_user_chk_eeprom() */ D_IIC_EEP_EV_INT_NAKI, /* NAKI */ D_IIC_EEP_EV_INT_TXI, /* TXI */ D_IIC_EEP_EV_INT_TEI, /* TEI */ D_IIC_EEP_EV_INT_RXI, /* RXI */ D_IIC_EEP_EV_INT_STPI, /* STPI */ D_IIC_EEP_EVENT_MAX /* */ E_Iic_eep_event; /* EEPROM */ RJJ06B Rev.1.00 Page 93 of 100

94 typedef enum D_IIC_EEP_ERR_NO = 0, /* */ D_IIC_EEP_ERR_NACK, /* NACK */ D_IIC_EEP_ERR_AL, /* AL */ D_IIC_EEP_ERR_WCT_OVER, /* Write cycle time over */ D_IIC_EEP_ERR_OTHER, /* */ E_Iic_eep_err_condition; /* EEPROM */ typedef enum D_IIC_EEP_NO_MODE = 0, /* mode */ D_IIC_EEP_WRITE, /* Write */ D_IIC_EEP_READ, /* Random Read Operation Sequential Read Operation */ D_IIC_EEP_CURRENT_READ /* Current Address Read Sequential Read Operation */ E_Iic_eep_mode; /** */ typedef struct t_cbs_mtx_ev_tbl E_Iic_eep_condition event_type; /* */ E_Iic_eep_Ret (*proc)( void *); /* */ T_IIC_EEPROM_MTX_TBL ; /* EEPROM / */ typedef struct E_Iic_eep_mode i_mode; /* mode */ unsigned char i_devadr; /* Device address */ unsigned long i_romadr; /* EEPROM reading address */ unsigned long i_len; /* Transfer/Receive data length */ unsigned char *i_pbuf; /* Transfer/Receive data buffer pointer */ T_IIC_EEPROM_RW_INFO; /* EEPROM / */ typedef struct unsigned long i_datalen; /* R/W Data length */ unsigned char *i_databuf; /* R/W Data Buffer pointer */ T_IIC_EEPROM_RW_DATA_INFO; /* EEPROM / */ typedef struct E_Iic_eep_mode i_mode; /* mode */ unsigned char i_devadr; /* Device address */ unsigned long i_memadrlen; /* Memory address length */ unsigned char i_memadrbuf[d_iic_eep_memadr_size]; /* Memory address buffer */ T_IIC_EEPROM_RW_DATA_INFO i_rw_data_info; /* RW Data Info */ unsigned short i_wctcnt; /* Write cycle time waiting counter */ T_IIC_EEPROM_RW_MANAGE; /* EEPROM / */ typedef struct RJJ06B Rev.1.00 Page 94 of 100

95 E_Iic_eep_condition i_eep_condition; /* EEPROM */ E_Iic_eep_err_condition i_err_condition; /* EEPROM */ T_IIC_EEPROM_CONDITION; /* ==== ==== */ E_Iic_eep_Ret iic_mtx_executefunctable(e_iic_eep_event event, void *info); /* ==== User IF ==== */ E_Iic_eep_Ret iic_user_init(void); E_Iic_eep_Ret iic_user_eepromrw(t_iic_eeprom_rw_info *i_rw_info); E_Iic_eep_Ret iic_user_chk_eeprom(t_iic_eeprom_condition *o_condition_info); E_Iic_eep_Ret iic_user_int_select(void); #endif /* IIC_EEPROM_DEF_H */ RJJ06B Rev.1.00 Page 95 of 100

96 (5) "intprg.c" IIC /* H'E60 IIC0 IICI0 */ void INT_IIC0_IICI0(void) unsigned short dummy; /* IIC0 */ iic_user_int_select(); /* */ dummy = IIC0.ICSR.BYTE; int_responstime_wait(intc_responsewait); /* */ (6) "vecttbl.src" IIC IIC 1 IIC IIC ;IIC0 ;H'E60 IIC0 IICI0.data.b H'10 RJJ06B Rev.1.00 Page 96 of 100

97 6. EEPROM / EEPROM EEPROM 37 EEPROM / (iic0_user_eepromrw( )) (geeprom_read_data[d_iic_eeprom_read_data_num]) High-performance Embedded Workshop EEPROM EEPROM 37 geeprom_read_data[d_iic_eeprom_read_data_num] RJJ06B Rev.1.00 Page 97 of 100