VHDL/Verilog S-Edit T-SPICE W-Edit SPICE SDF EDIF SPICE L-Edit T-Cells & SDL HiPer DRC L-Edit SPR L-Edit L-Edit DRC L-Edit LVS L-Edit HiPer DRC L-Edit& LVS
L-Edit
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2.7.1. 2.7.2. 2.7.3. ArcTorus
2.7.4. 2.7.5.
2.7.6. 2.7.7.
t
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2.9.1.
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3.4.1.
3.4.2. Edit-in-place
\\\\\\ 4.1.1. Setup Palette
4.1.2. Setup Design
4.1.3. Setup Special Layers
4.1.4. Setup Layers
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5.3.1.
5.3.2. N MOSFET
5.3.3. P MOSFET
5.3.4.
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DRC
Interactive DRC
HiPer - Calibre Dracula DRC
T-Cell \\\\\
SDL, NHL, EXT, LVS, LVL \\\\\\ Cl Cl Cl Cl Cl Cl Cl Cl T2 Cl D Q Cl D Q Cl D Q Cl D Q Cl D Q Cl D Q Cl D Q Cl D Q OUT Q Q Q Q Q Q Q Q T1 Clk
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\\\\\\ p M4 W='22*l' L='2*l' M=1 M10 M9 W='22*l' W='22*l' L='2*l' L='2*l' M=1 M=1 I2 I4 I5 Out M3 W='22*l' L='2*l' M=1 I1 M8 M7 W='22*l' W='22*l' L='2*l' L='2*l' M=1 M=1 M11 W='19*l' L='2*l' M=1 B A M1 M2 W='24*l' W='24*l' L='2*l' L='2*l' M=1 M=1 M6 W='24*l' L='2*l' M=1 I3 M5 W='24*l' L='2*l' M=1
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