Shonan Institute of Technology MEMOIRS OF SHONAN INSTITUTE OF TECHNOLOGY Vol. 41, No. 1, 2007 Ships1 * ** ** ** Development of a Small-Mid Range Paral

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MEMOIRS OF SHONAN INSTITUTE OF TECHNOLOGY Vol. 41, No. 1, 2007 Ships1 * ** ** ** Development of a Small-Mid Range Parallel Computer Ships1 Makoto OYA*, Hiroto MATSUBARA**, Kazuyoshi SAKURAI** and Yu KATO** Parallel computer technology has been mainly researched focusing on high performance computation of large scale scientific applications. On the other hand, performance of usual processors and memories has become very high and their price lower, and low price or free operating system and middleware software have become popular. Parallel computer technology is now applicable to low-price small-mid range computation including scientific applications, Web services, database applications, and education applications. Ships1 ( Parallel System 1) is a small-mid range parallel computer realizing such direction, starting its R&D since April, 2006. This paper mentions its purpose of development, its architecture, and the result of development of its base portion that has already been completed. 1 1 OS Web Ships1 ( Parallel System 1) Ships1 18 2006 4 Ships1 * ** 18 11 6 2 Ships1 2 1) SP2 2) PC/WS OS LAN PC/WS TCP/IP PC PC PC/WS 3,4) PC 43

41 1 2 1 Ships1 2 2 Ships1 CPU OS COTS Commercial Off the Shelf Ships1 (Shonan Institute Technology Parallel System1) 2 1 Ships1 Ships1 3 COTS 2 2 Ships1 Ships1 16 PC COTS Ships1 3 Ships1 4 Ships1 5 3 Ships1 Ships1 3.1 2 2 Ships1 (1) (Node) 1 1 1 PC a b 2 Ships1 12 a 4 b (2) (CM) Shps1 1 CM 4.3 Ships1 CM 1 44

Ships1 (3) CM 2 LAN 1 Ships1 1 CM 1Gbps LAN PCI Express LAN COTS TCP/IP CM (4) STC b PCI (STC) 2 b 1 1 (1) (4) Ships1 3 1 3 2 3 1 Ships1 3.2 Ships1 3 3 3 (1) OS OS 3 Ships1 Linux OS OS OS 6) Windows b (2) Ships1 DNS, NAT, SSH, DHCP, Web, FTP, LDAP COTS Ships1 OSS MPICH Globus OSS Ships1 Ships1 (3) (1) (2) Ships1 3 2 Ships1 UML 3 3 Ships1 45

41 1 DB Web 1 4 Ships1 2006 4 Ships1 5 OS Ships1 Ships1 2006 10 3 4.1 (1) 1 3.1 1 1 PC CPU Ships1 PC 1 b 100 K a 80 K CPU Intel Pentium 4 3.0 GHz 4 1 CPU Intel Pentium 4 (H/T) 3.0 GHz Intel 945 G ICH7 a: 1 GB, b: 2 GB HDD SATA160 GB a: PCI 3 b: PCI 4 LAN 1Gbps (PCI Express) LAN 1Gbps NIC (PCI) Intel 945 G Ships1 Ships1 PCI WOL(Wake on LAN) a Gygabyte GA-8I945G b MSI 945 GNeo2-F a 1G b 2G 4 1 (2) (LAN) 3 1 1 Gbps 8 17 Ships1 16 2 8 4 1 (3) LAN 46

Ships1 4 1 4 3 4 2 4 2 4.2 (1) OS OS Linux2.6 Linux2.4 PCI Linux Windows OS OS GRUB Linux Ships1 Fedora Core Fedora Core Debian (2) Fedora Core (3) 4.3 Ships1 4 3 Ships1 3 2 3 (1) Ships1 TCO (Total Cost of Operation) (CM) Ships1 Web CM 2 47

41 1 4 4 4 5 4 4 HTTP (80) HTTPS (433) Web CM CM SSH (2) CM CM ping Ships1 DHCP IP NFS 4 5 Ships1 2006 10 4.4 4 6 OS 2 b PCI FPGA LINUX 1 Gbps LAN 10 character raw device DMA 4 6 write() OS DMA 48

Ships1 DMA read() 5 read() read() 1 4 6 DMA 2006 10 4.5 Ships1 2 CPU Ships1 4 7 4 8 UML 4 7 MDA 7) (PIM) (PSM) MySQL PostgreSQL O/R 5 Ships1 16 5 1(a)(b) Ships1 IP DNS, MTA, FTP, Web 49

41 1 4 8 5 1(a) 5 1(b) 1 5 2 Ships1 5 3 CM 6 Ships1 Ships1 50

Ships1 7 5 2 2 Ships1 5 3 8,9) 1) Vol. 45, No. 2, pp. 116 121, 2006 2) Hoffnagle, G., et al, Scalable Parallel Computing, IBM Systems Journal, Vol. 34, No. 2, 1995 3) Vol. 47. No. 9, pp. 970 977, 2006 4) Harmonious Computing 2004 F76, pp. 587 588, 2004 5) Foster, I., Kishimoto H., Savva, A. et al, The Open Grif Services Architecture, Version 1.0, (Jan. 29 2005). 6) OSS Vol. 47, No. 10, pp. 1250 1251, 2006 7) Oya, M., Study on Model Driven Architecture, Ph. D. Thesis in the Field of Systems and Information Engineering, Graduate School of Engineering, Hokkaido University, 2005 8) Oya, M. and Ito, M.: Dynamic Model Harmonization between Unknown ebusiness Systems, IFIP I3E, Challenges of Expanding Internet: E-Commerce, E-Business, and E-Government, Springer ISBN: 0-387-28753-1, pp. 389 403, 2005 9) Oya, M., Kinoshita, M. and Kakazu, Y.: On Dynamic Generation of Business Protocols in Autonomous Web Services, Systems and Computers in Japan, Wiley, Vol. 37, No. 2, pp. 37 45, 2006 51