14 14.1 14-2 14.2 14-3 14.3 14-6 14.4 14-9 14.5 14-14 14.6 14-14 14.7 16 14-15 14.8 2 32 khz 14-15 14.9 32 14-16 14.10 32 14-18 14.11 32 14-21 14.12 14-21 14.13 14-22 14.14 14-23 14.15 14-24 14.16 14-25 14 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-1
PIC24F 14.1 PIC24F 16 1 2 3 16 / TMRx: 16 PRx: 16 TxCON: 16 (TxIE) (TxIF) (TxIP<2:0>) 16 16 3 A B C 16 32 DS39704A_JP-page 14-2 Advance Information 2007 Microchip Technology Inc.
14 14.2 PIC24F 16 16 A B C 3 : 14.2.1 A 1 A PIC24F A A 32kHz A : PIC24F RTCC HW RTCC 14-1: A ( 1) SOSCO/ T1CK 1x TON TCKPS1:TCKPS0 2 14 SOSCEN 01 1, 8, 64, 256 SOSCI TGATE TCY 00 TGATE TCS T1IF 1 0 Q Q D CK TMR1 0 1 TSYNC PR1 1: 6 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-3
PIC24F 14.2.2 B 2 4 PIC24F B B B C 32 B TxCON 32 T32 B 14.4.4 B 14-2 14-2: B TCKPS1:TCKPS0 TxCK 1x TON 2 01 1, 8, 64, 256 TGATE 00 TxIF 1 0 Q Q D CK TCY TCS TGATE TMR2 (TMR4) PR2 (PR4) DS39704A_JP-page 14-4 Advance Information 2007 Microchip Technology Inc.
14 14.2.3 C PIC24F 3 5 C C C B 32 1 C A/D C 14-3 14-3: C TCKPS1:TCKPS0 TxCK (1) 1x TON 2 01 1, 8, 64, 256 TGATE 00 TCY TCS TxIF 1 0 TMR3 (TMR5) Q Q D CK TGATE 14 ADC * PR3 (PR5) * ADC 4/5 1: PIC24 TxCK I/O 32 (FOSC/2) 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-5
PIC24F 14.3 14-1: TxCON: A R/W-0 U-0 R/W-0 U-0 U-0 U-0 U-0 U-0 TON TSIDL 15 8 U-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 U-0 TGATE TCKPS<1:0> TSYNC TCS 7 0 : R = W = U = 0 -n = POR 1 = 0 = x = 15 14 13 12-7 6 5-4 3 2 1 0 TON: x 1 = 0 = 0 TSIDL: 1 = 0 = 0 TGATE x When TCS = 1: When TCS = 0: 1 = 0 = TCKPS<1:0>: x 11 = 1:256 10 = 1:64 01 = 1:8 00 = 1:1 0 TSYNC: x When TCS = 1: 1 = 0 = When TCS = 0: 0 x TCS=0 TCS: x 1 = TxCK 0 = (FOSC/2) 0 DS39704A_JP-page 14-6 Advance Information 2007 Microchip Technology Inc.
14 14-2: TxCON: B R/W-0 U-0 R/W-0 U-0 U-0 U-0 U-0 U-0 TON TSIDL 15 8 U-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 U-0 TGATE TCKPS<1:0> T32 TCS 7 0 : R = W = U = 0 -n = POR 1 = 0 = x = 15 14 13 12-7 6 5-4 3 2 1 0 TON: x T32 = 1 (32 ) 1 = 32 TMRx TMRy 0 = 32 TMRx TMRy T32 = 0 (16 ) 1 = 16 0 = 16 0 TSIDL: 1 = 0 = 0 TGATE: x TCS = 1 TCS = 0 1 = 0 = TCKPS<1:0>: x 11 = 1:256 10 = 1:64 01 = 1:8 00 = 1:1 T32: 32 x 1 = TMRx TMRy 32 0 = TMRx TMRy 16 0 TCS: x 1 = TxCK 0 = (FOSC/2) 0 14 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-7
PIC24F 14-3: TyCON: C R/W-0 U-0 R/W-0 U-0 U-0 U-0 U-0 U-0 TON(1) TSIDL 15 8 U-0 R/W-0 R/W-0 R/W-0 U-0 U-0 R/W-0 U-0 TGATE(1) TCKPS<1:0> TCS 7 0 : R = W = U = 0 -n = POR 1 = 0 = x = 15 TON: y (1) 14 13 1 = 16 y 0 = 16 y 0 TSIDL: 1 = 0 = 12-7 0 6 TGATE: y (1) 5-4 3-2 1 0 TCS = 1 TCS = 0 1 = 0 = TCKPS<1:0>: y 11 = 1:256 10 = 1:64 01 = 1:8 00 = 1:1 0 TCS: y 1 = TxCK 0 = (FOSC/2) 0 1: 32 (T2CON<3> = 1) y T2CON DS39704A_JP-page 14-8 Advance Information 2007 Microchip Technology Inc.
14 14.4 ( A C ) TCS (TxCON<1>): TSYNC (TxCON<2>): ( A ) TGATE (TxCON<6>): TON (TxCON <15>) : A C 14.4.1 (FOSC/2) 1:1 1 TCS (TxCON<1>) TSYNC (TxCON<2>) 14-1: 16 14 /* The following code example will enable Timer1 interrupts, load the Timer1 Period register and start Timer1. */ When a Timer1 period match interrupt occurs, the interrupt service routine must clear the Timer1 interrupt status flag in software. T1CON = 0x00; TMR1 = 0x00; PR1 = 0xFFFF; IPC0bits.T1IP = 0x01; IFS0bits.T1IF = 0; IEC0bits.T1IE = 1; T1CONbits.TON = 1; //Stops the Timer1 and reset control reg. //Clear contents of the timer register //Load the Period register with the value 0xFFFF //Setup Timer1 interrupt for desired priority level // (This example assigns level 1 priority) //Clear the Timer1 interrupt status flag //Enable Timer1 interrupts //Start Timer1 with prescaler settings at 1:1 and //clock source set to the internal instruction cycle /* Example code for Timer1 ISR*/ void attribute (( interrupt, shadow )) _T1Interrupt(void) { /* Interrupt Service Routine code goes here */ } IFS0bits.T1IF = 0; //Reset Timer1 interrupt flag and Return from ISR 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-9
PIC24F 14.4.2 TCS (TxCON<1>) TxCK A TSYNC (TxCON<2>) B C TCY High Low 1 2 : High Low 14-2: 16 /* The following code example will enable Timer1 interrupts, load the Timer1 Period register and start Timer1 using an external clock and a 1:8 prescaler setting. */ When a Timer1 period match interrupt occurs, the interrupt service routine must clear the Timer1 interrupt status flag in software. T1CON = 0x00; TMR1 = 0x00; PR1 = 0x8CFF; IPC0bits.T1IP = 0x01; IFS0bits.T1IF = 0; IEC0bits.T1IE = 1; T1CON = 0x8016; //Stops the Timer1 and reset control reg. //Clear contents of the timer register //Load the Period register with the value 0x8CFF //Setup Timer1 interrupt for desired priority level // (this example assigns level 1 priority) //Clear the Timer1 interrupt status flag //Enable Timer1 interrupts //Start Timer1 with prescaler settings at 1:8 and //clock source set to the external clock in the //synchronous mode /* Example code for Timer1 ISR*/ void attribute (( interrupt, shadow )) _T1Interrupt(void) { /* Interrupt Service Routine code goes here */ } IFS0bits.T1IF = 0; //Reset Timer1 interrupt flag and Return from ISR DS39704A_JP-page 14-10 Advance Information 2007 Microchip Technology Inc.
14 14.4.3 A A TxCK TSYNC (TxCON<2>) 32kHz 1: A 2: x High Low 14-3: 16 /* The following code example will enable Timer1 interrupts, load the Timer1 Period register and start Timer1 using an asynchronous external clock and a 1:8 prescaler setting. */ When a Timer1 period match interrupt occurs, the interrupt service routine must clear the Timer1 interrupt status flag in software. T1CON = 0x00; TMR1 = 0x00; PR1 = 0x8CFF; IPC0bits.T1IP = 0x01; IFS0bits.T1IF = 0; IEC0bits.T1IE = 1; T1CON = 0x8012; //Stops the Timer1 and reset control reg. //Clear contents of the timer register //Load the Period register with the value 0x8CFF //Setup Timer1 interrupt for desired priority level // (this example assigns level 1 priority) //Clear the Timer1 interrupt status flag //Enable Timer1 interrupts //Start Timer1 with prescaler settings at 1:8 and //clock source set to the external clock in the //asynchronous mode 14 /* Example code for Timer1 ISR*/ void attribute (( interrupt, shadow )) _T1Interrupt(void) { /* Interrupt Service Routine code goes here */ } IFS0bits.T1IF = 0; //Reset Timer1 interrupt flag and Return from ISR 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-11
PIC24F 14.4.4 A B ( 14-1 14-2 ) High Low A B 1:1 High Low A High Low I/O 14.4.5 TxCK High TxCK High TxCK Low High Low TxIF TxCK 1 2 TGATE (TxCON<6>) TON (TxCON<15>) = 1 TCS (TxCON<1>) = 0 TxCK TxCK High TxIF : CPU 1:1 1:256 256 DS39704A_JP-page 14-12 Advance Information 2007 Microchip Technology Inc.
14 14-4: 1 (TCY) TMRx 0000 0001 0002 0003 0004 0005 TxCK pin TxIF TxIF 14-4: 16 /* The following code example will enable Timer2 interrupts, load the Timer2 Period register and start Timer2 using an internal clock and an external gate signal. On the falling edge of the gate signal a Timer2 interrupt occurs. The interrupt service routine must clear the Timer2 interrupt status flag in software. */ T2CON = 0x00; //Stops the Timer2 and reset control reg. TMR2 = 0x00; //Clear contents of the timer register PR2 = 0xFFFF; //Load the Period register with the value 0xFFFF IPC1bits.T2IP = 0x01; //Setup Timer2 interrupt for desired priority level // (this example assigns level 1 priority) IFS0bits.T2IF = 0; //Clear the Timer2 interrupt status flag IEC0bits.T2IE = 1; //Enable Timer2 interrupts T2CONbits.TGATE = 1; //Set up Timer2 for operation in Gated //Time Accumulation mode T2CONbits.TON = 1; //Start Timer2 void attribute (( interrupt, shadow )) _T2Interrupt(void) { /* Interrupt Service Routine code goes here */ 14 } IFS0bits.T2IF = 0; //Reset Timer2 interrupt flag and Return from ISR 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-13
PIC24F 14.5 14.6 16 (FOSC/2 ) 1:1 1:8 1:64 1:256 TCKPS<1:0> (TxCON<5:4>) TMRx TON (TxCON<15>) 0 : TMRx TxCON 16 TxIF TxIF TxIE (TxIP<2:0>) 8 : PRx 0x0000 14-5: 1 (TCY) TMR2 47FD 47FE 47FF 4800 0000 0001 0002 0003 0004 0005 TMR2 PR2 4800 TxIF DS39704A_JP-page 14-14 Advance Information 2007 Microchip Technology Inc.
14 14.7 16 SFR (8 ) (16 ) SFR (16 ) 14.7.1 16 0xFF 0x00 0xFF TMRx ( ) TMRx 14.4.1 14.7.2 16 SFR (16 ) ( 0 ) TMRx 14.8 2 32 khz A (RTC) 32 khz 2 2 2 OSCCON SOSCEN 32 khz SOSCO/SOSCI 6 14 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-15
PIC24F 14.9 32 32 B C 16 C (msw) B (lsw) 32 B 32 C TxCON 32 C B 32 : B C C 3 B 2 TON (T2CON<15>) = 1 T32 (T2CON<3>) = 1 TCKPS<1:0> (T2CON<5:4>) 2( B ) TMR3 TMR2 32 TMR3( C ) 32 TMR2( B ) PR3 PR2 TMR3:TMR2 32 T3IE (IEC0<8>) 32 T3IF (IFS0<8>) T3IP<2:0> (IPC2<2:0>) 32 T3CON<15:0> 2 3 32 14-6 : 32 DS39704A_JP-page 14-16 Advance Information 2007 Microchip Technology Inc.
14 14-6: B/ C (32 ) TCKPS1:TCKPS0 T2CK (T4CK) 1x TON 2 01 1, 8, 64, 256 TCY 00 TGATE TGATE TCS T3IF (T5IF) 1 0 Q Q D CK PR3 (PR5) PR2 (PR4) ADC * MSB LSB 16 TMR3 (TMR5) TMR2 (TMR4) 14 TMR2 (TMR4) TMR2 (TMR4) 16 TMR3HLD (TMR5HLD) 16 <15:0> * ADC 4/5 : 32 / 32 T32 T2CON T4CON 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-17
PIC24F 14.10 32 14.10.1 14-5 32 2 B 3 C 32 T2CON ( B ) T32 2 3 32 T3CON T2CON 2 32 T3IF 2 32 lsw 3 msw TMR3 TMR2 ( ) 32 PR2 PR3 32 PR3:PR2 0xFFFFFFFF 32 14-5: 32 /* The following code example will enable Timer3 interrupts, load the Timer3:Timer2 Period Register and start the 32-bit timer module consisting of Timer3 and Timer2. */ When a 32-bit period match interrupt occurs, the user must clear the Timer3 interrupt status flag in software. T2CON = 0x00; T3CON = 0x00; TMR3 = 0x00; TMR2 = 0x00; PR3 = 0xFFFF; PR2 = 0xFFFF; //Stops any 16/32-bit Timer2 operation //Stops any 16-bit Timer3 operation //Clear contents of the timer3 register //Clear contents of the timer2 register //Load the Period register3 with the value 0xFFFF //Load the Period register2 with the value 0xFFFF IPC2bits.T3IP = 0x01; IFS0bits.T3IF = 0; IEC0bits.T3IE = 1; T2CONbits.T32 = 1; T2CONbits.TON = 1; //Setup Timer3 interrupt for desired priority level //(this example assigns level 1 priority) //Clear the Timer3 interrupt status flag //Enable Timer3 interrupts //Enable 32-bit Timer operation //Start 32-bit timer with prescaler //settings at 1:1 and clock source set to //the internal instruction cycle void attribute (( interrupt, shadow )) _T3Interrupt(void) { /* Interrupt Service Routine code goes here */ } IFS0bits.T3IF = 0; //Reset Timer1 interrupt flag and Return from ISR DS39704A_JP-page 14-18 Advance Information 2007 Microchip Technology Inc.
14 14.10.2 32 16 14-6 32 2 B 3 C 14-6: 32 /* The following code example will enable Timer2 interrupts, load the Timer3:Timer2 Period register and start the 32-bit timer module consisting of Timer3 and Timer2. */ When a 32-bit period match interrupt occurs, the user must clear the Timer3 interrupt status flag in the software. T2CON = 0x00; T3CON = 0x00; TMR3 = 0x00; TMR2 = 0x00; PR3 = 0xFFFF; PR2 = 0xFFFF; //Stops any 16/32-bit Timer2 operation //Stops any 16-bit Timer3 operation //Clear contents of the timer3 register //Clear contents of the timer2 register //Load the Period register3 with the value 0xFFFF //Load the Period register2 with the value 0xFFFF IPC2bits.T3IP = 0x01; IFS0bits.T3IF = 0; IEC0bits.T3IE = 1; T2CON = 0x801A; //Setup Timer3 interrupt for desired priority level //(this example assigns level 1 priority) //Clear the Timer3 interrupt status flag //Enable Timer3 interrupts //Enable 32-bit Timer operation and start //32-bit timer with prescaler settings at 1:8 //and clock source set to external clock 14 void attribute (( interrupt, shadow )) _T3Interrupt(void) { /* Interrupt Service Routine code goes here */ } IFS0bits.T3IF = 0; //Reset Timer1 interrupt flag and Return from ISR 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-19
PIC24F 14.10.3 B C 32 14.10.4 32 16 14-7 32 2 B 3 C 14-7: 32 /* The following code example will enable Timer2 interrupts, load the Timer3:Timer2 Period register and start the 32-bit timer module consisting of Timer3 and Timer2. When a 32-bit period match occurs the timer will simply roll over and continue counting. */ However, when at the falling edge of the Gate signal on T2CK an interrupt is generated, if enabled. The user must clear the Timer3 interrupt status flag in the software. T2CON = 0x00; T3CON = 0x00; TMR3 = 0x00; TMR2 = 0x00; PR3 = 0xFFFF; PR2 = 0xFFFF; IPC2bits.T3IP = 0x01; IFS0bits.T3IF = 0; IEC0bits.T3IE = 1; T2CON = 0x8048; //Stops any 16/32-bit Timer2 operation //Stops any 16-bit Timer3 operation //Clear contents of the timer3 register //Clear contents of the timer2 register //Load the Period register3 with the value 0xFFFF //Load the Period register2 with the value 0xFFFF //Setup Timer3 interrupt for desired priority level //(this example assigns level 1 priority) //Clear the Timer3 interrupt status flag //Enable Timer3 interrupts //Enable 32-bit Timer operation and //Start 32-bit timer in gated time accumulation mode. void attribute (( interrupt, shadow )) _T3Interrupt(void) { /* Interrupt Service Routine code goes here */ } IFS0bits.T3IF = 0; //Reset Timer1 interrupt flag and Return from ISR DS39704A_JP-page 14-20 Advance Information 2007 Microchip Technology Inc.
14 14.11 32 32 lsw msw 32 ( 14-6 ) C TMRxHLD TMRxHLD 32 TMR3:TMR2 32 TMR2 lsw lsw TMR3 TMR3HLD TMR3HLD msw 14-8 14-8: 32 /* The following code segment reads the 32-bit timer formed by the Timer3-Timer2 pair into the registers W1(MS Word) and W0(LS Word). */ unsigned int temp_lsb; unsigned int temp_msb; temp_lsb = TMR2; temp_msb = TMR3HLD; //Transfer the LSW into temp_lsb //Transfer the MSW from the holding register to into //temp_msb TMR3:TMR2 TMR3HLD msw TMR2 lsw TMR3HLD TMR3 14.12 14.12.1 (FOSC/2) A A A 1 TON (TxCON<15>) = 1 1 TCS (TxCON<1>) = 1 TSYNC (TxCON<2>) 0 ( ) : 1 1 TxIF 10 14.12.2 CPU TSIDL (TxCON<13>) TSIDL = 0 TSIDL = 1 14.12.3 CPU 10 14 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-21
PIC24F 14.13 14.13.1 2 15, 16 14.13.2 A/D 1 C 16 32 A/D A/D T32 = 0 16 (TMRx) 16 (PRx) A/D T32 = 1 32 (TMRx:TMRy) 32 (PRx:PRy) A/D A/D 17 10 A/D 14.13.3 PRx TMRx 1 1:1 14.13.4 I/O I/O 14.13.5 (PMD1 TxMD ) TxMD DS39704A_JP-page 14-22 Advance Information 2007 Microchip Technology Inc.
14 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-23 14.14 14-1: PIC24F 14-1 SFR Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PMD1 T5MD T4MD T3MD T2MD T1MD I2C1MD U2MD U1MD SPI2MD SPI1MD ADCMD 0000 TMR1 xxxx PR1 FFFF T1CON TON TSIDL TGATE TCKPS1 TCKPS0 TSYNC TCS 0000 TMR2 xxxx TMR3HLD ( ) xxxx TMR3 xxxx PR2 FFFF PR3 3 FFFF T2CON TON TSIDL TGATE TCKPS1 TCKPS0 T32 TCS 0000 T3CON TON TSIDL TGATE TCKPS1 TCKPS0 TCS 0000 TMR4 xxxx TMR5HLD ( ) xxxx TMR5 xxxx PR4 FFFF PR5 FFFF T4CON TON TSIDL TGATE TCKPS1 TCKPS0 T32 TCS 0000 T5CON TON TSIDL TGATE TCKPS1 TCKPS0 TCS 0000 IFS0 AD1IF U1TXIF U1RXIF SPI1IF SPF1IF T3IF T2IF OC2IF IC2IF T1IF OC1IF IC1IF INT01F 0000 IFS1 U2TXIF U2RXIF INT2IF T5IF T4IF OC4IF OC3IF INT1IF CNIF CMIF M2C1IF SI2C1IF 0000 IEC0 AD1IE U1TXIE U1RXIE SPI1IE SPF1IE T3IE T2IE OC2IE IC2IE T1IE OC1IE IC1IE INT01E 0000 IEC1 U2TXIE U2RXIE INT2IE T5IE T4IE OC4IE OC3IE INT1IE CNIE CMIE M2C1IE SI2C1IE 0000 IPC0 T1IP2 T1IP1 T1IP0 OC1IP2 OC1IP1 OC1IP0 IC1IP2 IC1IP1 IC1IP0 INT0IP2 INT0IP1 INT0IP0 4444 IPC1 T2IP2 T2IP1 T2IP0 OC2IP2 OC2IP1 OC2IP0 IC2IP2 IC2IP1 IC2IP0 4440 IPC2 U1RXIP2 U1RXIP1 U1RXIP0 SPI1IP2 SPI1IP1 SPI1IP0 SPF1IP2 SPF1IP1 SPF1IP0 T3IP2 T3IP1 T3IP0 4444 IPC6 T4IP2 T4IP1 T4IP0 OC4IP2 OC4IP1 OC4IP0 OC3IP2 OC3IP1 OC3IP0 4440 IPC7 U2TXIP2 U2TXIP1 U2TXIP0 U2RXIP2 U2RXIP1 U2RXIP0 INT2IP2 INT2IP1 INT2IP0 T5IP2 T5IP1 T5IP0 4444 : 14
PIC24F 14.15 PIC24F # AN580 : PIC24F (www.microchip.com) DS39704A_JP-page 14-24 Advance Information 2007 Microchip Technology Inc.
14 14 14.16 A (2006 4 ) 2007 Microchip Technology Inc. Advance Information DS39704A_JP-page 14-25
PIC24F : DS39704A_JP-page 14-26 Advance Information 2007 Microchip Technology Inc.