6,GPIO, PSoC 3/5 GPIO HW Polling and Interrupt PSoC Experiment Lab PSoC 3/5 GPIO Experiment Course Material 6 V2.02 October 15th. 2012 GPIO_35.PPT (65 Slides) Renji Mikami Renji_Mikami@nifty.com
Lab GPIO_35 GPIO
( C: PSoC5_Lab ) ( ) : PSoC_Lab_MasterXXXX Workspace ( ) Project ( ) Workspace Project 1 1 ( ) :
Workspace Workspace main.c Workspace 1. PSoC Creator 2. File Close Workspace Workspace 3. Advanced Workspace Create New Workspace
Workspace Workspace Current New Workspace Add to Current Workspace Workspace Create New Workspace Workspace
GPIO_35 GPIO (MPU ) (GPIO_35D) GPIO (MPU ) (GPIO_35P) GPIO (MPU ) (GPIO_35I) (GPIO_35D -> GPIO_35P ) GPIO_ D LED GPIO_ P / GPIO_35I LED GPIO_35D GPIO_35P (GPIO_35I) SW2 (P6_1) P0[5] LED SW2 (P6_1) P0[5] LED PSoC3/5 PSoC3/5
Step 1: PSoC Creator Software Step 2: Step 3: Step 4: Step 5: Step 6: Step 7: Step 8: Build Debug
Step 1 PSoC Creator Software 2. File>Close Workspace 1.PSoC Creater > >Cypress >PSoC Creater 2.X> PSoC Creater
1,Main Window 2,Work Space Explore 3,Component Catalog 4,Output Work space explore ( ) Schimatic Window Window TAB TAB TAB New XXX window SourceTAB Components Result Cypress Log Output Window
Step 2 File->New->Project Project GPIO_35D Location C: PSoC5_Lab
Step 2.1 ( ) 2.Empty PSoC5 Design ( ) 1.+ 3.Name,GPIO_35D ( ) 4. ( C: PSoC5_Lab) 6.OK 5. ( )
Device Selector PSoC CY8C-KIT-050 CY8C5588-AXI-060 2011 Q4 ES1 http://www.cypress.com/?id=2232
Workspace Explorer
Step 3 1.TopDesign.cysh ( ) 2.Port and Pins > Digital Input Pin, ( ) ( ) Ctrl + Ctrl + Ctrl + Shift + Ctrl + Shift + Alt +
Step 4 Pin_1 Configure
Step 4.1 1 Name: Analog : Digital Input : HW Connection : Digital Output : HW Connection : Output Enable : IO IO Bidirectional : IO
Step 4.2 2
Step 4.3 3 Drive Mode : IO TRM 22.I/O System Initial State : POR IO Drive Mode Pull Up/Down Pull Down 0 Pull Up 1
Step 4.4 Ctrl + Ctrl + Ctrl + Shift + Ctrl + Shift + ( ) Alt +
Step 5
Step 5.1
(.cydwr ) PSoC Creator.cydwr Pins Clocks Interrupts DMA
Step 6
Step 6.1 IO
Step 7 Pin
Step 8 Build : Project 1.Build>Build GPIO_35D Notice List X
Step 8.1
Step 8.2 1. USB 2.Debug>Program(Cntl+F5) 1.USB USB ( )
Step 8.3
Step 8.4 LED1 P0[5] SW2 (P6[1])
Step 8.5
1 GPIO_35D File>Save XXXX As GPIO_35D GPIO_35P
2 GPIO_35P
3 File > Close Workspace
4 GPIO_35P
6 File >Open >Project/Workspace GPIO_35P
7 GPIO_35P-0000 GPIO_35P PSoC5 3 Generated_Source PSoC5 PSoC3 Generate Config
GPIO_35P MPU (GPIO_35P) GPIO_35P LED LED GPIO_35P GPIO_35D GPIO_35P SW2 (P6_1) P0[5] LED SW2 (P6_1) P0[5] LED PSoC3/5 PSoC3/5
Step 1 1 ( ) Ctrl + Ctrl + Ctrl + Shift + Ctrl + Shift + Alt + GPIO_35P
Step 2 2
Step 3 SW
Step 4 LED
Step 5 main.c if(sw_read()){ LED_Write(0); } else { LED_Write(1); }
Step 6 #include <device.h> void main() { } for(;;) { } if( SW_Read() ){ } else { } LED_Write(0); LED_Write(1); API uint8 Pin_1_Read( void ) void Pin_1_Write( uint8 value )
Step 7
Step 8
Step 9
Step 10 LED1 P0[5] SW2 (P6[1])
GPIO_35I IO GPIO_35P GPIO_35I (GPIO_35P ) GPIO_35I GPIO_35I LED LED GPIO_35P GPIO_35I
Step 1 1 ( ) Ctrl + Ctrl + Ctrl + Shift + Ctrl + Shift + Alt + GPIO_35I
Step 2 SW
Step 3
Step 4 main.c
Step 5 #include <device.h> CY_ISR(sw_isr){ } SW_ClearInterrupt(); if( SW_Read() ){ LED_Write(0); } else { } LED_Write(1); CY_ISR( MyISR) PSoC Creator CY_ISR void Pin_1_ClearInterrupt(void) Pin void main() { } isr_1_startex(sw_isr); CYGlobalIntEnable; for(;;) { } ISR_StartEx(cyisraddress addrss) ISR Enable CYGlobalIntEnable Enable
Step 6
Step 7
Step 8
Step 9 LED1 SW2 P0[5] SW2 (P6[1])
GPIO I/O割り込み GPIOポート毎に保有: Port Interrupt Control Unit (PICU) 専用の割り込みベクタ Interrupt on: Rising edge Falling edge Any edge Status Register どのピンによってI/O割り込みが発 生したかをラッチする ファームウェアによる読み出し可能 読み出しによるクリア
GPIO I/O Analog Global Bus Analog Mux Bus (P0[0], P0[1], P3[6], P3[7]) Opamps High Current DAC mode CapSense Touch Sensing LCD char/segment drive Hardware controlled analog mux at pin
SIO (Special I/O) GPIO Vdda 5.5V tolerant DAC High Speed Logic level max current 25 ma sink 4 ma source Pin max current ~50 ma sink ~25 ma source No Analog No LCD char/segment drive No CapSense touch sensing Digital Input Path Programmable Input Buffer Config CMOS or LVTTL Pin Status Register Digital Input Pin Interrupt Type Register Pin Interrupt Status Register Interrupt Controller Digital Output Path Programmable Output Buffer Configuration Slow Slew Enable Data Register Digital Output Data Register Bypass Drive Mode 2 Drive Mode 1 Drive Mode 0 Bidirectional Control Bidirectional Enable 0 1 Interrupt Logic Buffer Thresholds Drive Logic Buffer Disable Slew Cntl Driver Vhigh 5K 5K PIN
Lab GPIO_35
Memo URL http://mikamir.web.fc2.com/?/?.htm? 142-0042 2-17-8 ( ) Renji_Mikami@nifty.com http://homepage3.nifty.com/western/mikamiconsult.htm 080-5422-2503(au)