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Transcription:

Mentor Graphics High Speed Board 2002 January 2002 Electronic Design and Solution Fair

Agenda AutoActive / DRC Interconnectix / IBIS SPICE AutoActive + Interconnectix + EMI Sigrity SPEED2000 ( 2

AutoActive / DRC Interconnectix / IBIS SPICE AutoActive + Interconnectix + EMI Sigrity SPEED2000 ( 3

AutoActive 1/2 DRC DRC Common Data AutoActive 4

AutoActive 2/2 CAD Zuken PWS I/F Expedition PCB Mentor BS RE Board Station Cadence Allegro I/F AutoActive AutoActive SFX DestinyRE SFX RE 5

AutoActive / DRC Interconnectix / IBIS SPICE AutoActive + Interconnectix + EMI Sigrity SPEED2000 ( 6

Interconnectix 1/2 Common Data Interconnectix 7

Interconnectix 2/2 CAD Expedition PCB Mentor Board Station Interconnectix Interconnectix Allegro 3 rd Party CR5000 BD 8

AutoActive / DRC Interconnectix / IBIS SPICE AutoActive + Interconnectix + EMI Sigrity SPEED2000 ( 9

1/2 IBIS SPICE Common Data 10

2/2 Interconnectix ICX2.6 SPICE IBIS ICX3.0 ICX Series L,R,C ) 11

AutoActive / DRC Interconnectix / IBIS SPICE AutoActive + Interconnectix + EMI Sigrity SPEED2000 ( 12

1/3 AutoActive + Interconnectix AutoActive Interconnectix Interconnectix AutoActive 13

2/3 Auto Active ICX Rule Constraint storage 14

3/3 IBIS Interconnectix SPICE AutoActive Common Data 15

AutoActive / DRC Interconnectix / IBIS SPICE AutoActive + Interconnectix + EMI Sigrity SPEED2000 ( 16

EMI & Open Door Interconnectix SPEED2000 Interconnectix EMI / / 17

Interconnectix GUI 18

SPEED2000 19

Sigrity, Inc. January 2002 Electronic Design and Solution Fair

Agenda Sigrity Mentor Graphics Interconnectix SPEED2000 SPDGEN : SPDSIM : 21

Sigrity 1994 Dr.Jiayuan Fang / 1997 SPEED97 2000 7 SPEED2000 (PI) PCB/LSI : Santa Clara (U.S.) : 22

Mentor Graphics Open Door Interconnectix 2001 11 Mentor Graphics /SI SPEED2000 PI / EMI 23

Interconnectix IBIS IBIS 24

SPDGEN / / / PCB IC /, r, tan, SkinEffect / 25

SPDSIM / LC /GND 26

/GND 2D 3D SPDSIM / 27

SPDSIM / 28

SPDSIM / / etc. 29

SPDSIM EMI 30

/ (Delta-I noise, SSN) I/O /GND /GND /GND capacitor chip capacitor chip signal traces power/ground plan vias Printed Circuit Board 31

SPEED2000 / / 32

/GND ASIC Keep out Area C C C C C C Caps just outside the ASIC C C C C C C C C C C C C C C C C C C Current Sources Representing drivers Plane size 12 inch by 8 inch Plane separation 15 mils 33

/GND (V) 34

/GND (V) 35

/GND 12 0805 caps + 24 0603 caps 24 0603 caps 12 0805 caps No caps 12 IDC caps 36

No decoupling caps 36 decoupling caps Edge radiation was calculated corresponding to waveforms in the previous slides. The higher power-ground noise without decoupling caps leads to much higher edge radiation. This was measured at a horizontal distance of 3m and a vertical distance of 3m from the board 37

<MCM+ > /GND Bernd Garben, Michael McAllister, IBM Germany, EPEP Conf., October 2000 38

/GND 12 layers 15795 traces 18293 vias Power and ground planes and all other components are simulated together 39

/GND 10 3 10 2 Z (Ohm) 10 1 10 0 10-1 Measurement Simulation 10-2 10 0 10 1 10 2 10 3 Frequency (MHz) 40

SPEED2000 Interconnectix 2002 Mentor Graphics PI / EMI PowerSI 2002 3 S, Y, Z ICX2SPD ndd 41

42