5 2 5 Stratix IV PLL 2 CMU PLL 1 ALTGX MegaWizard Plug-In Manager Reconfig Alt PLL CMU PLL Channel and TX PLL select/reconfig CMU PLL reconfiguration

5. Stratix IV SIV52005-2.0 Stratix IV GX PMA BER FPGA PMA CMU PLL Pphased-Locked Loop CDR 5 1 5 3 5 5 Quartus II MegaWizard Plug-In Manager 5 42 5 47 rx_tx_duplex_sel[1:0] 5 49 logical_channel_address 5 50 PMA 5 60 5 132 ALTGX_RECONFIG MegaWizard Plug-In Manager 5 133 5 135 FPGA- 5 138 ALTGX_RECONFIG ALTGX_RECONFIG MegaWizard Plug-In Manager ALTGX ALTGX MegaWizard Plug-In Manager

5 2 5 Stratix IV PLL 2 CMU PLL 1 ALTGX MegaWizard Plug-In Manager Reconfig Alt PLL CMU PLL Channel and TX PLL select/reconfig CMU PLL reconfiguration Channel and CMU PLL reconfiguration Channel Reconfiguration with TX PLL select 3 CMU PMA CMU PLL Dynamic Reconfiguration Controller Logical Channel Addressing ALTGX_RECONFIG MegaWizard Plug-In Manager logical_channel_address Use 'logical_channel_address' port for Analog controls reconfiguration PLL PLL 0 1 ALTGX MegaWizard Plug-In Manager Reconfig Clks 1 Reconfig Alt PLL TX PLL.mif PLL PLL 2 CMU PLL 1 ALTGX MegaWizard Plug-In Manager General CMU PLL.mif.mif.mif ALTGX MegaWizard Plug-In Manager.mif 16.mif Channel and TX PLL select/reconfig PMA ALTGX MegaWizard Plug-In Manager ALTGX_ RECONFIG MegaWizard Plug-In Manager Analog controls (VOD Pre-emphasis Manual Equalization) PMA CMU PMA General Basic (PMA Direct)ALTGX MegaWizard Plug-In Manager PMA PMA PCS Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 3 PMA 1 PMA PMA Stratix IV GX PVT Offset cancellation for Receiver channels ALTGX ALTGX_RECONFIG MegaWizard Plug-In Manager Receiver and Transmitter Receiver onlytransmitter only Receiver and Transmitter Receiver only ALTGX_RECONFIG ALTGX 5 42 1 ALTGX_RECONFIG ALTGX PMA Controls Reconfiguration PMA DC V OD 5 50 PMA 4 2 CMU PMA PCS CMU PMA Basic (PMA Direct) CMU PLL CMU PMA

5 4 5 Stratix IV Stratix IV 4 8 Stratix GX Stratix II GX [PRBS] [BIST] N Basic (PMA Direct) 1 Basic (PMA Direct) 1 CMU 5 50 PMA Data rate division in TX Data rate division in TX Basic (PMA Direct) Basic (PMA Direct) 1 Basic (PMA Direct) N 5 61 Data Rate Division in TX Channel and TX PLL select/reconfig Channel and CMU PLL reconfiguration Channel reconfiguration with TX PLL select CMU PLL reconfiguration Channel and TX PLL select/reconfig Basic (PMA Direct) Basic (PMA Direct) 1 Basic (PMA Direct) N 5 66 Channel and TX PLL select/reconfig reconfig_mode_sel[2:0] 1 reconfig_mode_sel[2:0] reconfig_mode_sel[2:0] reconfig_mode_sel[2:0] 3 5 1 CMU 1 reconfig_mode_sel[2:0] Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 5 Quartus II MegaWizard Plug-In Manager 5 1. CMU CMU reconfig_mode_sel[2:0] (1) PMA Controls Reconfiguration 3'b000 Data Rate Division in TX 3'b011 Channel and TX PLL select/reconfig CMU PLL Reconfiguration 3'b100 Channel and CMU PLL Reconfiguration 3'b101 Channel Reconfiguration with TX PLL Select 3'b110 3'b111 5 1 : (1) reconfig_mode_sel [2:0] = 3'b001 3'b010 1 reconfig_mode_sel[2:0] ALTGX_RECONFIG MegaWizard Plug-In Manager reconfig_mode_sel[2:0] 000 Quartus II MegaWizard Plug-In Manager Stratix IV GX ALTGX ALTGX_RECONFIG 2 MegaWizard Plug-In Manager ALTGX ALTGX_RECONFIG MegaWizard Plug-In Manager ALTGX MegaWizard Plug-In Manager ALTGX MegaWizard Plug-In Manager Reconfig 5 1 PMA Analog controls (VOD Pre-emphasis Manual Equalization) Offset cancellation for Receiver channels Data Rate Division in TX CMU PLL reconfiguration Channel and CMU PLL reconfiguration Channel reconfiguration with TX PLL select Enable Channel and Transmitter PLL Reconfiguration

5 6 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 1. ALTGX MegaWizard Plug-In Manager ALTGX_RECONFIG MegaWizard Plug-In Manager Quartus II ALTGX_RECONFIG MegaWizard Plug-In Manager Reconfiguration Settings 5 2 Offset cancellation for Receiver channels PMA Analog controls PMA Analog controls PMA 1 Data Rate Division in TX Data rate division in TX CMU PLL reconfiguration Channel and CMU PLL reconfiguration Channel reconfiguration with TX PLL select Channel and TX PLL select/reconfig Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 7 Quartus II MegaWizard Plug-In Manager 5 2. ALTGX_RECONFIG MegaWizard Plug-In Manager 1 ALTGX_RECONFIG Stratix II GX Stratix GX FPGA IP 1 Stratix IV GX 5 3

5 8 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 3. reconfig_clk read write_all reconfig_fromgxb[] PMA controls reconfig logic Dynamic Reconfiguration Controller PMA control ports (1) rate_switch_ctrl[1:0] (TX only) Data Rate Switch control logic reset_reconfig_address reconfig_data[15:0] CMU PLL reconfig control logic Channel and CMU PLL reconfig control logic Address Translation addr data Parallel to Serial Converter reconfig_togxb[3:0] data valid busy error rate_switch_out[1:0] (TX only) logical_tx_pll_sel logical_tx_pll_sel_en Channel reconfig with TX PLL select control logic reconfig_address_out[5:0] reconfig_address_en channel_reconfig_done logical_channel_address[] rx_tx_duplex_sel[1:0] Offset Cancellation control logic reconfig_mode_sel[2:0] 5 3 : (1) PMA V OD DC ALTGX_RECONFIG 5 10 PMA controls reconfiguration Offset cancellation TX Data rate division Channel reconfiguration with TX PLL select/reconfig CMU PLL reconfiguration Channel and CMU PLL reconfiguration Channel reconfiguration with TX PLL select Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 9 Quartus II MegaWizard Plug-In Manager PMA controls reconfiguration TX Data rate division rate_switch_ctrl[1:0] CMU PLL reconfiguration Channel and CMU PLL reconfiguration Channel reconfiguration with TX PLL select.mif 16.mif 5 67.mif 5 4

5 10 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 4. reconfig_clk reconfig_togxb [3..0] reconfig_fromgxb [16:0] data_valid read busy write_all error tx_vodctrl [2..0] (1), (2) tx_vodctrl_out [2..0] (1), (2) rx_eqctrl [3..0] (1), (2) rx_eqctrl_out [3..0] (1), (2) rx_eqdcgain [2..0] (1), (2) rx_eqdcgain_out [2..0] (1), (2) tx_preemp_0t [4..0] (1), (2) tx_preemp_1t [4..0] (1), (2) Dynamic Reconfiguration Controller tx_preemp_0t_out [4..0] (1), (2) tx_preemp_1t_out [4..0] (1), (2) tx_preemp_2t [4..0] (1), (2) tx_preemp_2t_out [4..0] (1), (2) reconfig_mode_sel [2:0] rate_switch_out [1:0] rate_switch_ctrl [1:0] reconfig_data [15:0] logical_tx_pll_sel channel_reconfig_done logical_tx_pll_sel_en reconfig_address_en reset_reconfig_address reconfig_address_out [5:0] rx_tx_duplex_sel [1:0] logical_channel_address [8:0] (3) 5 4 : (1) 1 (2) PMA PMA PMA PMA 1 ALTGX_RECONFIG 5 10 (3) logical_channel_address 2 5 2 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 11 Quartus II MegaWizard Plug-In Manager 5 2. ALTGX_RECONFIG ( / ) / ALTGX_RECONFIG reconfig_clk Receiver only 37.5 MHz 50 MHz Receiver and Transmitter 37.5 MHz 50 MHz Transmitter only 2.5 MHz 50 MHz 5 19 5 4 Quartus II ALTGX ALTGX_RECONFIG reconfig_fromgxb Reconfiguration settings What is the number of channels controlled by the reconfig controller? 13 5 39 reconfig_fromgxb reconfig_togxb reconfig_togxb[3..0] 4 Reconfiguration settings What is the number of channels controlled by the reconfig controller? 5 39 reconfig_fromgxb reconfig_togxb FPGA ALTGX_RECONFIG write_all ALTGX_RECONFIG ALTGX 1 reconfig_clk 5 51 PMA

5 12 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 2. ALTGX_RECONFIG ( / ) / busy reconfig_clk Low ALTGX_RECONFIG High High busy 5 43 PMA High.mif High read 1 reconfig_clk read PMA read Reconfiguration settings Analog controls Analog controls PMA 1 5 51 PMA data_valid data_valid PMA data_valid High tx_vodctrl_out PMA 1 error Error checks/data rate switch busy error 2 reconfig_clk 5 132 ALTGX_RECONFIG MegaWizard Plug-In Manager Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 13 Quartus II MegaWizard Plug-In Manager 5 2. ALTGX_RECONFIG ( / ) / logical_channel_address [8:0] logical_channel_address Analog controls Use 'logical_channel_address' port for Analog controls reconfiguration ALTGX_RECONFIG MegaWizard Plug-In Manager logical_channel_address Reconfiguration settings What is the number of channels controlled by the reconfig controller? logical_channel_address 2 5 22 5 31 PMA rx_tx_duplex_sel[1:0] 2 Error checks/data rate switch rx_tx_duplex_sel[1:0] = 2'b00 => rx_tx_duplex_sel[1:0] = 2'b01 => rx_tx_duplex_sel[1:0] = 2'b10 => / tx_vodctrl[2..0] (1) V OD 3 ALTGX MegaWizard Plug-In Manager TX Analog Analog controls Use 'logical_channel_address' port for Analog controls reconfiguration Use same control signal for all the channels 3 3 5 51 PMA 100-Ω tx_vodctrl V OD Stratix IV Volume 2 Stratix IV Programmable Output Differential Voltage 1.4 V V CCH tx_vodctrl[2:0] V OD (mv) 3'b000 200 3'b001 400 3'b010 600 3'b011 700 3'b100 800 3'b101 900 3'b110 1000 3'b111 1200

5 14 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 2. ALTGX_RECONFIG ( / ) / tx_preemp_0t[4..0] (1) Analog controls Use 'logical_channel_address' port for Analog controls reconfiguration Use same control signal for all the channels 5 5 5 51 PMA 0 0 1-15 -15-1 16 0 17-31 1 15 PCI Express (PIPE) Gen 1 Gen 2 tx_preemp_0t[4:0] 5'b00000 tx_pipemargin tx_pipeswing tx_pipedeemph PCI Express (Gen 2) tx_preemp_0t[4:0] Stratix IV Volume 2 Stratix IV Programmable Pre-Emphasis tx_preemp_1t[4..0] (1) 1 1 Analog controls Use 'logical_channel_address' port for Analog controls reconfiguration Use same control signal for all the channels 5 5 5 51 PMA Stratix IV Volume 2 Stratix IV Programmable Pre-Emphasis Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 15 Quartus II MegaWizard Plug-In Manager 5 2. ALTGX_RECONFIG ( / ) / tx_preemp_2t[4..0] (1) 2 Analog controls Use 'logical_channel_address' port for Analog controls reconfiguration Use same control signal for all the channels 5 5 5 51 PMA 0 0 1-15 -15-1 16 0 17-31 1 15 PCI Express (PIPE) Gen 1 Gen 2 tx_preemp_2t[4:0] 5'b00000 tx_pipemargin tx_pipeswing tx_pipedeemph PCI Express (Gen 2) tx_preemp_2t[4:0] Stratix IV Volume 2 Stratix IV Programmable Pre-Emphasis rx_eqctrl[3..0] (1) PMA Analog controls Use 'logical_channel_address' port for Analog controls reconfiguration Use same control signal for all the channels 4 4 5 51 PMA Stratix IV Volume 2 Stratix IV Programmable Equalization and DC Gain

5 16 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 2. ALTGX_RECONFIG ( / ) / rx_eqdcgain[2..0] (1) (2) DC Analog controls Use 'logical_channel_address' port for Analog controls reconfiguration Use same control signal for all the channels 3 3 5 51 PMA 3'b000 => 0 db 3'b001 => 3 db 3'b010 => 6 db 3'b011 => 9 db 3'b100 => 12 db => N/A Stratix IV Volume 2 Stratix IV Programmable Equalization and DC Gain tx_vodctrl_out[2..0] V OD V OD tx_preemp_0t_out[4..0] tx_preemp_1t_out[4..0] 1 tx_preemp_2t_out[4..0] 2 rx_eqctrl_out[3..0] ALTGX rx_eqdcgain_out[2..0] DC ALTGX DC Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 17 Quartus II MegaWizard Plug-In Manager 5 2. ALTGX_RECONFIG ( / ) / / reconfig_mode_sel[2:0] 3'b000 PMA controls reconfiguration 3'b011 Data Rate Division in TX 3'b100 CMU PLL reconfiguration 3'b101 Channel and CMU PLL reconfiguration 3'b110 Channel reconfiguration with TX PLL select 3'b111 reconfig_address_out[5:0] Channel and TX PLL reconfiguration Channel and TX PLL select/reconfig.mif ALTGX_RECONFIG 0 1 0.mif.mif reconfig_address_out [5:0] 0 reconfig_address_en Channel and TX PLL reconfiguration Channel and TX PLL select/reconfig reconfig_address_en reconfig_address_out[5:0].mif 1 16 reset_reconfig_address Channel and TX PLL reconfiguration Channel and TX PLL select/reconfig ALTGX_RECONFIG 1 reconfig_clk reconfig_data[15:0] Channel and TX PLL select/reconfig 16.mif ALTGX_RECONFIG.mif write_all reconfig_data [15:0]

5 18 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 2. ALTGX_RECONFIG ( / ) / rate_switch_ctrl[1:0] Data Rate Division in TX 2'b00 1 2'b01 2 2'b10 4 2'b11 5 61 Data Rate Division in TX rate_switch_out[1:0] Data Rate Division in TX 2'b00 1 2'b01 2 2'b10 4 2'b11 5 64 Data Rate Division in TX logical_tx_pll_sel[1:0] TX PLL ID TX PLL ID.mif logical_tx_pll logical_tx_pll_sel_en logical_tx_pll_sel[1:0].mif logical_tx_pll logical_tx_pll_sel_en logical_tx_pll_sel_en 1 logical_tx_pll_sel[1:0] TX PLL channel_reconfig_done 1 reconfig_clk High.mif Channel and CMU PLL reconfiguration Channel reconfiguration with TX PLL select 5 2 : (1) (2) PCI Express (PIPE) PCI E 001 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 19 Quartus II MegaWizard Plug-In Manager ALTGX ALTGX_RECONFIG ALTGX ALTGX_RECONFIG ALTGX PCI Express (PIPE) ALTGX reconfig_clk ALTGX_RECONFIG reconfig_clk ALTGX PCI Express (PIPE) reconfig_clk fixedclk 5 3 reconfig_clk fixedclk 5 3. ALTGX (1) reconfig_clk fixedclk PCI Express [PIPE] 5 3 : ALTGX_RECONFIG 37.5 MHz 50 MHz 125 MHz (1) reconfig_clk fixedclk ALTGX_RECONFIG reconfig_clk ALTGX reconfig_clk 5 4 ALTGX Receiver only Receiver and Transmitter Transmitter only reconfig_clk 5 4 ALTGX ALTGX_RECONFIG reconfig_clk 1 ALTGX_RECONFIG ALTGX Receiver only Transmitter only Receiver and Transmitter reconfig_clk 5 4. ALTGX reconfig_clk (1) ALTGX Receiver and Transmitter Receiver only Transmitter only reconfig_clk 37.5 MHz 50 MHz 37.5 MHz 50 MHz 2.5 MHz 50 MHz 5 4 : (1) reconfig_clk

5 20 5 Stratix IV Quartus II MegaWizard Plug-In Manager ALTGX_RECONFIG ALTGX ALTGX_RECONFIG MegaWizard Plug-In Manager ALTGX MegaWizard Plug-In Manager ALTGX_RECONFIG ALTGX ALTGX_RECONFIG ALTGX 2 1 ALTGX_RECONFIG ALTGX 5 5 ALTGX 1 ALTGX_RECONFIG 5 5. 1 reconfig_fromgxb [n:0] ALTGX Instance 1 ALTGX_RECONFIG Instance ALTGX Instance 2 reconfig_togxb [3:0] Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 21 Quartus II MegaWizard Plug-In Manager ALTGX_RECONFIG ALTGX ALTGX_RECONFIG 5 6 1 ALTGX ALTGX_RECONFIG 5 6. reconfig_fromgxb [n:0] ALTGX_RECONFIG Instance 1 reconfig_togxb [3:0] ALTGX Instance 1 reconfig_fromgxb [n:0] ALTGX_RECONFIG Instance 2 reconfig_togxb [3:0] ALTGX Instance 2 ALTGX MegaWizard Plug-In Manager Reconfig What is the starting channel number? ALTGX 5 22 ALTGX_RECONFIG 1 ALTGX ALTGX ALTGX ALTGX_RECONFIG MegaWizard Plug-In Manager 5 34 ALTGX_RECONFIG ALTGX ALTGX_RECONFIG reconfig_fromgxb reconfig_togxb

5 22 5 Stratix IV Quartus II MegaWizard Plug-In Manager ALTGX Basic (PMA Direct) ALTGX PMA PMA PMA CMU PCS PMA ALTGX ALTGX PMA PMA Basic (PMA Direct) What is the starting channel number? 5 7 ALTGX MegaWizard Plug-In Manager Reconfig What is the starting channel number? 5 7. ALTGX MegaWizard Plug-In Manager What is the Starting Channel Number? Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 23 Quartus II MegaWizard Plug-In Manager ALTGX ALTGX 4 1 ALTGX What is the starting channel number? 4 1 What is the starting channel number? ATLGX MegaWizard Plug-In Manager ALTGX 5 1 3 1 2 3 2 ALTGX 1 ALTGX_RECONFIG 3 ALTGX 1 5 5 1 5 5. ALTGX 1 ALTGX ALTGX_RECONFIG 1 2 ALTGX ALTGX 1 (1 ) ALTGX 2 (3 ) ALTGX 1 ALTGX_RECONFIG 5 6 1 5 6. 1 ALTGX MegaWizard Plug-In Manager General What is the number of channels? Reconfig What is the starting channel number? ALTGX ALTGX_RECONFIG ALTGX 1 ALTGX 2 ALTGX_RECONFIG 1 0 1 3 1 0 4 ALTGX 4 4 1 3 4 5 6 ALTGX 1 ALTGX 2 ALTGX_RECONFIG 1 5 36 5 17

5 24 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 8 ALTGX 1 ALTGX 2 5 8. 1 ALTGX ALTGX_RECONFIG (1) Case 1 ALTGX Instance 1 Single Channel Instance The What is the starting channel number? option = 0 Set the What is the number of channels controlled by the reconfig controller? option = 8 reconfig_fromgxb [16:0] Channel 0 (logical_address_channel = 0) ALTGX_RECONFIG Instance reconfig_fromgxb [33:0] (2) ALTGX Instance 2 Three Channel Instance The What is the starting channel number? option = 4 Channel 0 (logical_address_channel = 4) reconfig_fromgxb [16:0] Channel 1 (logical_address_channel = 5) Channel 2 (logical_address_channel = 6) reconfig_togxb [3:0] 5 8 : (1) 5 23 1 (2) reconfig_fromgxb[33:0] = {reconfig_fromgxb[16:0], reconfig_fromgxb[16:0]} 2 5 7 2 5 7. ALTGX 2 ALTGX ALTGX_RECONFIG 2 2 ALTGX ALTGX 1 (6 ) ALTGX 2 (3 ) ALTGX 1 ALTGX_RECONFIG Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 25 Quartus II MegaWizard Plug-In Manager 5 8 2 5 8. 2 ALTGX MegaWizard Plug-In Manager General What is the number of channels? Reconfig What is the starting channel number? ALTGX ALTGX_RECONFIG ALTGX 1 ALTGX 2 ALTGX_RECONFIG 1 0 1 6 0 1 2 3 4 5 6 3 4 ALTGX 4 8 1 3 8 9 10 ALTGX 1 ALTGX 2 5 36 5 17 ALTGX_RECONFIG 1 1 2 4 5 ALTGX1 5 6 1 ALTGX 2 What is the starting channel number? 4 ALTGX 2 4

5 26 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 9 ALTGX 1 ALTGX 2 5 9. 2 ALTGX ALTGX_RECONFIG (1) ALTGX Instance 1 Six Channel Instance The What is the starting channel number? option = 0 Case 2 Channel 0 (logical_address_channel = 0) Channel 1 (logical_address_channel = 1) reconfig_fromgxb [33:0] Channel 2 (logical_address_channel = 2) Set the What is the number of channels controlled by the reconfig controller? option = 12 (1) Channel 3 (logical_address_channel = 3) Channel 4 (logical_address_channel = 4) ALTGX_RECONFIG Instance reconfig_fromgxb [50:0] (2) Channel 0 (logical_address_channel = 5) ALTGX Instance 2 Three Channel Instance The What is the starting channel number? option = 8 Channel 0 (logical_address_channel = 8) reconfig_fromgxb [16:0] Channel 0 (logical_address_channel = 9) Channel 0 (logical_address_channel = 10) reconfig_togxb [3:0] 5 9 : (1) 5 24 2 (2) reconfig_fromgxb[50:0] = {reconfig_fromgxb[16:0], reconfig_fromgxb[33:0]}. Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 27 Quartus II MegaWizard Plug-In Manager 3 5 9 3 5 9. ALTGX 3 ALTGX ALTGX_RECONFIG 3 2 ALTGX ALTGX 1 (6 ) ALTGX 2 (6 ) ALTGX 1 ALTGX_RECONFIG 5 10 3 5 10. 3 ALTGX MegaWizard Plug-In Manager General What is the number of channels? Reconfig What is the starting channel number? ALTGX ALTGX_RECONFIG ALTGX 1 ALTGX 2 ALTGX_RECONFIG 1 0 6 6 1 6 0 1 2 3 4 5 4 ALTGX 4 8 1 3 8 9 10 11 12 13 ALTGX 1 ALTGX 2 5 36 5 17 ALTGX_RECONFIG 1

5 28 5 Stratix IV Quartus II MegaWizard Plug-In Manager 2 4 5 ALTGX 1 5 6 1 ALTGX 2 What is the starting channel number? 4 ALTGX 2 4 5 10 ALTGX 1 ALTGX 2 5 10. 3 ALTGX ALTGX_RECONFIG (1) ALTGX Instance 1 Six Channel Instance The What is the starting channel number? option = 0 Case 3 Tx only Channel 0 (logical_address_channel = 0) Tx only Channel 1 (logical_address_channel = 1) reconfig_fromgxb [33:0] Tx only Channel 2 (logical_address_channel = 2) Set the What is the number of channels controlled by the reconfig controller? option = 16 (1) Tx only Channel 3 (logical_address_channel = 3) Tx only Channel 4 (logical_address_channel = 4) Tx only Channel 5 (logical_address_channel = 5) reconfig_fromgxb [67:0] (2) ALTGX_RECONFIG Instance ALTGX Instance 2 Six Channel Instance The What is the starting channel number? option = 8 Rx only Channel 0 (logical_address_channel = 8) Rx only Channel 1 (logical_address_channel = 9) Rx only Channel 2 (logical_address_channel = 10) reconfig_fromgxb [33:0] Rx only Channel 3 (logical_address_channel = 11) Rx only Channel 4 (logical_address_channel = 12) Rx only Channel 5 (logical_address_channel = 13) reconfig_togxb [3:0] 5 10 : (1) 5 27 3 (2) reconfig_fromgxb[67:0] = {reconfig_fromgxb[33:0], reconfig_fromgxb[33:0]}. Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 29 Quartus II MegaWizard Plug-In Manager 4 ALTGX_RECONFIG 1 ALTGX 4 What is the starting channel number? ALTGX ALTGX_RECONFIG 5 11 4 5 11. ALTGX 4 ALTGX ALTGX_RECONFIG 4 2 ALTGX ALTGX 1 ALTGX 2 2 ALTGX_RECONFIG ALTGX_RECONFIG 1 ALTGX_RECONFIG 2 ALTGX_RECONFIG 1 ALTGX 1 ALTGX_RECONFIG 2 ALTGX 2 5 12 4 5 12. 4 ALTGX MegaWizard Plug-In Manager General What is the number of channels? Reconfig What is the starting channel number? ALTGX ALTGX_RECONFIG ALTGX 1 ALTGX 2 ALTGX_RECONFIG 1 0 1 5 0 1 2 3 4 5 5 0 ALTGX 2 ALTGX_RECONFIG 2 1 3 0 1 2 3 4 ALTGX 1 5 36 5 17 ALTGX_ RECONFIG 1 ALTGX_RECONFIG ALTGX_RECONFIG 2 ALTGX 2 5 36 5 17 ALTGX_ RECONFIG 2

5 30 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 11 ALTGX 1 ALTGX 2 5 11. 4 ALTGX ALTGX_RECONFIG (1) ALTGX Instance 1 Five Channel Instance The What is the starting channel number? option = 0 Set the What is the number of channels controlled by the reconfig controller? option = 8 (1) Case 4 Channel 0 (logical_address_channel = 0) Channel 1 (logical_address_channel = 1) Channel 2 (logical_address_channel = 2) ALTGX_RECONFIG Instance 1 reconfig_fromgxb [33:0] reconfig_togxb [3:0] Channel 3 (logical_address_channel = 3) Channel 4 (logical_address_channel = 4) Set the What is the number of channels controlled by the reconfig controller? option = 8 (1) ALTGX Instance 2 Five Channel Instance The What is the starting channel number? option = 0 Channel 0 (logical_address_channel = 0) Channel 1 (logical_address_channel = 1) ALTGX_RECONFIG Instance 2 reconfig_fromgxb [33:0] Channel 2 (logical_address_channel = 2) reconfig_togxb [3:0] Channel 3 (logical_address_channel = 3) Channel 4 (logical_address_channel = 4) 5 11 : (1) 5 29 4 5 ALTGX ALTGX 1 ALTGX_RECONFIG 1 ALTGX 1 1 ALTGX.v ALTGX.vhd 5 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 31 Quartus II MegaWizard Plug-In Manager 5 13 5 5 13. ALTGX 5 ALTGX ALTGX_RECONFIG 5 5 1 ALTGX ALTGX 1 5 ALTGX.v ALTGX.vhd 1 ALTGX_ RECONFIG ALTGX 1 What is the starting channel number? 0 ATLGX MegaWizard Plug-In Manager ALTGX 1 0 5 4 2 3 4 5 4 8 12 16 defparam Verilog defparam instance2. starting_channel_number = 4; defparam instance3. starting_channel_number = 8; PMA PMA ALTGX What is the starting channel number? PMA ALTGX MegaWizard Plug-In Manager General Basic (PMA direct) ALTGX PMA PMA CMU Basic (PMA direct) CMU Basic (PMA direct) 1 CMU PMA PMA 5 22 5 7 What is the starting channel number? PMA What is the starting channel number? ALTGX PMA What is the starting channel number? 4 ALTGX PMA 4 ALTGX 1 Basic (PMA direct)

5 32 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 14 What is the starting channel number? PMA 5 14 6 5 14. 6 ALTGX MegaWizard Plug-In Manager General What is the number of channels? Reconfig What is the starting channel number? ALTGX Basic (PMA direct) ALTGX 1 8 (PMA-only channels) 0 1 6 0 4 8 12 16 20 24 28 ALTGX_RECONFIG ALTGX_RECONFIG 1 ALTGX 1 5 38 5 18 ALTGX_RECONFIG 1 1 ALTGX 4 PMA Not in Basic (PMA Direct) ALTGX_RECONFIG ALTGX What is the starting channel number? 1 ALTGX PMA ALTGX Basic (PMA Direct) Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 33 Quartus II MegaWizard Plug-In Manager 5 15 What is the starting channel number? PMA 5 15. 7 PMA Basic (PMA Direct) ALTGX MegaWizard Plug-In Manager General What is the number of channels? Reconfig What is the starting channel number? ALTGX Basic ALTGX 1 0 1 5 0 1 2 3 4 ALTGX 2 6 6 4 ALTGX 4 ALTGX 2 8 0 4 ALTGX 1 1 4 8 12 16 20 ALTGX_RECONFIG ALTGX_RECONFIG 1 ALTGX 1 ALTGX 2 5 38 5 19 ALTGX_RECONFIG 1 5 16 Stratix IV Stratix IV GX 48 24 4 24 4 48 48 Transmitter only 48 Receiver only 48 Transmitter only ALTGX 48 Receiver only ALTGX

5 34 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 16. ALTGX MegaWizard Plug-In Manager General What is the number of channels? Reconfig What is the starting channel number? 96 ALTGX ALTGX_RECONFIG ALTGX 1 ALTGX 2 ALTGX_RECONFIG 1 48 48 96 ALTGX TX 1 0 TX 2 4...... TX 48 184 RX 1 188 RX 2 192...... RX 48 380 96 ALTGX Receiver only 380 1 Stratix IV PMA Quartus II 5 133 ALTGX_RECONFIG reconfig_fromgxb logical_channel_address 5 12 ALTGX_RECONFIG MegaWizard Plug-In Manager Reconfiguration settings What is the number of channels controlled by the reconfig controller? ALTGX_RECONFIG 256 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 35 Quartus II MegaWizard Plug-In Manager 5 12. ALTGX_RECONFIG MegaWizard Plug-In Manager What is the Number of Channels Controlled by the Reconfig Controller? 1 ALTGX_RECONFIG ALTGX What is the number of channels controlled by the controller? 5 22 4 What is the number of channels controlled by the reconfig controller? ALTGX_RECONFIG 5 19 5 4 5 23 5 6 5 25 5 8 5 27 5 10 5 29 5 12 What is the number of channels controlled by the reconfig controller

5 36 5 Stratix IV Quartus II MegaWizard Plug-In Manager 5 17 1 5 ALTGX ALTGX_RECONFIG 1 2 5 17. 1 5 ALTGX ALTGX_RECONFIG 1 2 ( / ) ALTGX 1 ALTGX 2 ALTGX_RECONFIG 1 ALTGX_RECONFIG 2 1 ALTGX ALTGX_RECONFIG 5 24 5 8 1 Reconfig What is the starting channel number? 0 1 0 3 Reconfig What is the starting channel number? 4 1 3 4 5 6 ALTGX 1 6 4 Reconfiguration settings What is the number of channels controlled by the controller? 8 N/A 2 ALTGX ALTGX_RECONFIG 5 26 5 9 6 Reconfig What is the starting channel number? 0 1 6 0 1 2 3 4 5 3 Reconfig What is the starting channel number? 8 1 3 8 9 10 10 4 Reconfiguration settings What is the number of channels controlled by the controller? 12 N/A 3 ALTGX ALTGX_RECONFIG 5 28 5 10 6 Reconfig What is the starting channel number? 0 1 6 0 1 2 3 4 5 6 Reconfig What is the starting channel number? 8 1 6 8 9 10 11 12 13 13 4 Reconfiguration settings What is the number of channels controlled by the controller? 16 N/A Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 37 Quartus II MegaWizard Plug-In Manager 5 17. 1 5 ALTGX ALTGX_RECONFIG 1 2 ( / ) 4 ALTGX ALTGX_RECONFIG 5 30 5 11 ALTGX 1 ALTGX_RECONFIG 1 5 Reconfig What is the starting channel number? 0 1 5 0 1 2 3 4 5 5 ALTGX 1 defparam Verilog defparam instance2. starting_channe l_number = 4; defparam instance3. starting_channe l_number = 8; 0 4 8 12 16 ALTGX 2 ALTGX_RECONFIG 2 5 Reconfig What is the starting channel number? 0 1 5 0 1 2 3 4 ALTGX_RECONFIG 1 ALTGX 1 4 4 Reconfiguration settings What is the number of channels controlled by the controller? 8 N/A 16 4 Reconfiguration settings What is the number of channels controlled by the controller? 20 ALTGX_RECONFIG 2 ALTGX 2 4 4 Reconfiguration settings What is the number of channels controlled by the controller? 8 N/A

5 38 5 Stratix IV Quartus II MegaWizard Plug-In Manager ALTGX_RECONFIG PMA 5 32 5 14ALTGX_RECONFIG MegaWizard Plug-In Manager What is the number of channels controlled by the reconfig controller? 5 18 6 ALTGX ALTGX_RECONFIG 5 18. 6 1 2 ALTGX ALTGX_RECONFIG ALTGX 1 ALTGX 2 ALTGX_RECONFIG 1 6 8 PMA Reconfig What is the starting channel number? 0 1 8 0 4 8 12 16 20 24 28 N/A 28 4 Reconfig What is the number of channels controlled by the controller? 32 ALTGX_RECONFIG PMA Basic PMA Direct ALTGX_RECONFIG MegaWizard Plug-In Manager What is the number of channels controlled by the reconfig controller? 5 33 5 15 5 19 7 1 2 ALTGX ALTGX_RECONFIG 5 19. 7 1 2 ALTGX ALTGX_RECONFIG ALTGX 1 ALTGX 2 ALTGX_RECONFIG 1 7 Basic PMA Direct 5 Reconfig What is the starting channel number? 0 1 5 0 1 2 3 4 4 PMA Reconfig What is the starting channel number? 8 1 4 8 12 16 20 20 4 Reconfiguration settings What is the number of channels controlled by the controller? 24 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 39 Quartus II MegaWizard Plug-In Manager reconfig_fromgxb reconfig_togxb reconfig_fromgxb reconfig_togxb ALTGX_RECONFIG ALTGX reconfig_togxb[3:0] ALTGX ALTGX_RECONFIG ALTGX reconfig_ togxb[3:0] ALTGX_RECONFIG reconfig_togxb[3:0] 5 40 5 13 reconfig_fromgxb ALTGX ALTGX_RECONFIG 17 ALTGX MegaWizard Plug-In Manager ALTGX PMA General What is the number of channels? ALTGX : 1 4 reconfig_fromgxb = 17 5 8 reconfig_fromgxb = 34 9 12 reconfig_fromgxb = 51 ALTGX PMA : PMA = n reconfig_fromgxb = n*17 PMA 6 reconfig_fromgxb = 6 * 17 ALTGX_RECONFIG MegaWizard Plug-In Manager Reconfiguration settings What is the number of channels controlled by the reconfig controller? ALTGX_RECONFIG : 1 4 reconfig_fromgxb = 17 5 8 reconfig_fromgxb = 34 9 12 reconfig_fromgxb = 51

5 40 5 Stratix IV Quartus II MegaWizard Plug-In Manager ALTGX_RECONFIG ALTGX reconfig_fromgxb ALTGX1 reconfig_fromgxb[16:0] ALTGX_RECONFIG reconfig_fromgxb[16:0] ALTGX reconfig_fromgxb[] ALTGX_RECONFIG What is the starting channel number? ALTGX reconfig_fromgxb ALTGX_RECONFIG reconfig_fromgxb MSB ALTGX reconfig_fromgxb reconfig_togxb ALTGX_RECONFIG Quartus II Fitter reconfig_fromgxb 5 13 ALTGX reconfig_fromgxb ALTGX_RECONFIG reconfig_fromgxb 5 13. ALTGX_RECONFIG ALTGX reconfig_fromgxb reconfig_togxb (1) (2) ALTGX Instance 1 reconfig_fromgxb1 [16:0] ALTGX_RECONFIG Instance reconfig_togxb [3:0] reconfig_togxb [3:0] reconfig_fromgxb [50:0] (1) ALTGX Instance 2 reconfig_fromgxb2 [33:0] reconfig_togxb [3:0] 5 13 : (1) reconfig_fromgxb[50:0] = {reconfig_fromgxb[16:0] reconfig_fromgxb[33:0]}. (2) 5 13 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 41 Quartus II MegaWizard Plug-In Manager 5 20 reconfig_fromgxb 5 20. reconfig_fromgxb ALTGX ALTGX_RECONFIG ALTGX General What is the number of channels? Reconfig What is the starting channel number? reconfig_fromgxb1 reconfig_fromgxb2 ALTGX 1 Basic 3 0 1 3 0 1 2 reconfig_fromgxb1 17 (1 * 17) ALTGX 2 Basic 5 4 1 5 4 5 6 7 8 reconfig_fromgxb2 34 (2 * 17) ALTGX_RECONFIG Reconfiguration settings What is the number of channels controlled by the reconfig controller? reconfig_fromgxb ALTGX_RECONFIG 1 8 4 12 reconfig_fromgxb 15 12 3 5 40 5 13 ALTGX_RECONFIG reconfig_fromgxb ALTGX 1 reconfig_fromgxb1 ALTGX 2 reconfig_fromgxb2 What is the starting channel number? ALTGX 1 reconfig_fromgxb1 ALTGX_RECONFIG reconfig_fromgxb [16:0] ALTGX 2 reconfig_fromgxb2 ALTGX_RECONFIG reconfig_fromgxb[50:17] PMA reconfig_fromgxb PMA 5 21. PMA reconfig_fromgxb reconfig_togxb ( / ) ALTGX MegaWizard Plug-In Manager ALTGX Basic (PMA direct) ALTGX 1 Basic PMA Direct ALTGX 2 ALTGX_RECONFIG ALTGX_RECONFIG MegaWizard Plug-In Manager ALTGX_RECONFIG 1

5 42 5 Stratix IV 5 21. PMA reconfig_fromgxb reconfig_togxb ( / ) General What is the number of channels? Reconfig What is the starting channel number? reconfig_fromgxb1 reconfig_fromgxb2 ALTGX 1 5 PMA PMA 0 1 0 reconfig_fromgxb1 17 (1 * 17) 4 1 5 4 8 12 16 20 reconfig_fromgxb2 85 (5 * 17) Reconfiguration settings What is the number of channels controlled by the reconfig controller? 1 ALTGX_RECONFIG reconfig_fromgxbaltgx 1 reconfig_fromgxb1 ALTGX 2 reconfig_fromgxb2 reconfig_fromgxb[101:0] = {reconfig_fromgxb2[84:0], reconfig_fromgxb1[16:0]} ALTGX_RECONFIG reconfig_fromgxb 20 4 24 reconfig_fromgxb2 102 (6 * 17 24 6 What is the starting channel number? ALTGX 1 reconfig_fromgxb1 ALTGX_RECONFIG reconfig_fromgxb[16:0] ALTGX 2 reconfig_fromgxb2 ALTGX_RECONFIG reconfig_fromgxb[101:17] 1 ALTGX_RECONFIG1 reconfig_togxb 3 ALTGX reconfig_togxb Stratix IV GX ALTGX_RECONFIG ALTGX reconfig_fromgxb reconfig_togxb ALTGX_RECONFIG ALTGX Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 43 1 ALTGX_RECONFIG ALTGX 1 PMA Receiver and Transmitter Receiver Only ALTGXALTGX MegaWizard Plug-In Manager Reconfig Offset cancellation for Receiver channels 5 14 2 Transmitter Only 5 14 ALTGX Offset cancellation for Receiver channels 5 14. ALTGX MegaWizard Plug-In Manager Offset cancellation for receiver channels ALTGX ALTGX_RECONFIG ALTGX_RECONFIG Reconfiguration settings

5 44 5 Stratix IV ALTGX_RECONFIG ALTGX What is the starting channel number? 5 22 5 15 ALTGX_RECONFIG MegaWizard Plug-In Manager Offset cancellation for Receiver channels 5 15. ALTGX_RECONFIG MegaWizard Plug-In Manager Offset cancellation for Receiver channels VCO CDR CDR reconfig_togxb reconfig_fromgxb ALTGX_RECONFIG ALTGX ALTGX_RECONFIG MegaWizard Plug-In Manager Reconfiguration settings What is the number of channels controlled by the reconfig controller? 5 34 ALTGX_RECONFIG ALTGX_RECONFIG MegaWizard Plug-In Manager Analog controls Use 'logical_channel_address' port for Analog controls reconfiguration Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 45 1 PMA LE ALTGX 1 ALTGX_RECONFIG 1 gxb_powerdown 1 1 5 135 PMA Transmitter OnlyReceiver Only ALTGX ALTGX What is the starting channel number? ALTGX_RECONFIG What is the number of channels controlled by the reconfig controller? Transmitter Only busy reconfig_clk Low busy 2 reconfig_clk busy 5 16 5 16. reconfig_clk busy (1) 5 16 : (1) busy reconfig_clk Low 1 Stratix IV Volume 2

5 46 5 Stratix IV ALTGX_RECONFIG ALTGX 5 22 5 22 ALTGX_RECONFIG ALTGX MegaWizard Plug-In Manager 5 22. ALTGX ALTGX_RECONFIG ALTGX ALTGX 1 ALTGX 2 General What is the number of channels? Reconfig What is the starting channel number? 5 22 reconfig_fromgxb1 reconfig_fromgxb2 5 0 1 5 0 1 2 3 4 reconfig_fromgxb1 34 2 * 17 3 8 1 3 8 9 10 ALTGX_RECONFIG Reconfiguration settings What is the number of channels controlled by the reconfig controller? 5 34 ALTGX_RECONFIG reconfig_fromgxb2 reconfig_fromgxb 17 1 * 17 ALTGX_RECONFIG 1 10 4 12 reconfig_fromgxb 51 3 * 17 12 3 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 47 rx_tx_duplex_sel[1:0] 5 17 ALTGX 1 ALTGX 2 ALTGX_RECONFIG 5 17. ALTGX_RECONFIG ALTGX Set the What is the starting channel number? option = 0 Set the What is the number of channels controlled by the reconfig controller? option = 12 ALTGX Instance 1 (Number of Channels is 5) reconfig_fromgxb1[33:0] reconfig_clk reconfig_fromgxb[50:0] (1) ALTGX_RECONFIG Instance busy Set the What is the starting channel number? option = 8 ALTGX Instance 2 (Number of Channels is 3) reconfig_fromgxb2[16:0] 5 17 : (1) reconfig_fromgxb[50:0] = {reconfig_fromgxb2[16:0], reconfig_fromgxb1[33:0]}. (2) 5 17 ALTGX ALTGX_RECONFIG 1. ALTGX 1 reconfig_fromgxb1[33:0] ALTGX_ RECONFIG reconfig_fromgxb[33:0] 2. ALTGX 2 reconfig_fromgxb2[16:0] ALTGX_RECONFIG reconfig_fromgxb[50:17] 3. ALTGX_RECONFIG reconfig_togxb[3:0] ALTGX 1 ALTGX 2 reconfig_togxb[3:0] 5 39 reconfig_fromgxb reconfig_togxb 1. ALTGX_RECONFIG ALTGX 2. busy reconfig_clk Low 3. busy 2 reconfig_clk 4. busy rx_tx_duplex_sel[1:0] rx_tx_duplex_sel 2 rx_tx_duplex_sel[1:0]

5 48 5 Stratix IV rx_tx_duplex_sel[1:0] 5 18 ALTGX_RECONFIG MegaWizard Plug-In Manager Error checks/data rate switch Use 'rx_tx_duplex_sel' port to enable RX only TX only or duplex reconfiguration 5 18. ALTGX_RECONFIG MegaWizard Plug-In Manager Use 'rx_tx_duplex_sel' Port to Enable RX Only TX only or Duplex Reconfiguration ALTGX_RECONFIG MegaWizard Plug-In Manager Reconfiguration settings 1 Offset cancellation for Receiver channels 5 23 ALTGX_RECONFIG rx_tx_duplex_sel[1:0] 5 23. ALTGX_RECONFIG rx_tx_duplex_sel[1:0] rx_tx_duplex_sel[1:0] 2'b00 Receiver and Transmitter 2'b01 Receiver only 2'b10 Transmitter only 2'b11 5 23 : (1) 5 10.mif rx_tx_duplex_ sel[1:0] Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 49 logical_channel_address Receiver Only ALTGX.mif rx_tx_duplex_sel[1:0] 2'b01 Receiver Only ALTGX.mif Receiver Only logical_channel_address logical_channel_address ALTGX_RECONFIG logical_channel_address PMA controls reconfiguration mode Data Rate Division in TX Channel and TX PLL select/reconfig 5 19 ALTGX_RECONFIG MegaWizard Plug-In Manager Analog controls Use 'logical_channel_address' port for Analog controls reconfiguration 5 19. ALTGX_RECONFIG MegaWizard Plug-In Manager logical_channel_address

5 50 5 Stratix IV PMA logical_channel_address 2 Reconfiguration Settings What is the number of channels controlled by the reconfig controller? 9 384 9 ALTGX_RECONFIG PMA 5 24 PMA logical_channel_address 5 24. logical_channel_address PMA logical_channel_address 8 8 PMA logical_channel_address = 3 logical_channel_address = 5 PMA PMA DC V OD CMU Basic PMA Direct CMU PLL PMA CMU PMA 1 Basic PMA Direct 1 N PMA Stratix IV CMU 1 N N N 1 PMA CMU Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 51 PMA PMA ALTGX_RECONFIG MegaWizard Plug-In Manager PMA 5 20 Analog controls PMA V OD tx_vodctrl V OD tx_vodctrl_out 5 20. ALTGX_RECONFIG MegaWizard Plug-In Manager PMA PMA 2 PMA 1 PMA 5 52 1 2 logical_channel_address PMA PMA 5 54 2 rx_tx_duplex_sel[1:0] 2 2

5 52 5 Stratix IV PMA 1 1 logical_channel_address PMA 5 49 5 19 Analog controls Use 'logical_channel_address' port for Analog controls reconfiguration logical_channel_address_port rx_tx_duplex_sel[1:0] PMA 1 ALTGX_RECONFIG PMA tx_vodctrl tx_vodctrl_out 3 tx_preemp_0t tx_preemp_1t tx_preemp_2t tx_preemp_0t_out tx_preemp_1t_out tx_preemp_2t_out 5 rx_eqdcgain rx_eqdcgain 3 rx_eqctrl_out rx_eqctrl_out 4 PMA tx_vodctrl = 3'b000 logical_channel_address PMA rx_tx_duplex_sel[1:0] 2'b10 PMA busy Low write_all 1 reconfig_clk busy High PMA busy Low 5 21 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 53 PMA 5 21. 1 reconfig_clk write_all rx_tx_duplex_sel [1:0] (1) 2 b00 2 b10 logical_address_channel [1:0] (2) 2 b00 2 b01 busy tx_vodctrl [2:0] 3 b00 3 b11 5 21 : (1) (2) 4 logical_channel_address 2 ALTGX_RECONFIG V OD V OD 1. logical_channel_address PMA tx_vodctrl_out 2. rx_tx_duplex_sel[1:0] 2'b10 PMA 3. busy Low 4. read 1 reconfig_clk busy High PMA busy Low data_valid

5 54 5 Stratix IV PMA 5 22 5 22. 1 reconfig_clk write_all rx_tx_duplex_sel [1:0] (1) 2 b00 2 b10 logical_address_channel [1:0] (2) 2 b00 2 b01 busy data_valid tx_vodctrl [2:0] 3 b000 3 bxxx 3 b0 5 22 : (1) (2) 4 logical_channel_address 2 1 2 2 PMA logical_channel_address 2 ALTGX_RECONFIG PMA 2 Use the same control signal for all the channels Use the same control signal for all the channels Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 55 PMA 5 23 ALTGX_RECONFIG MegaWizard Plug-In Manager Use the same control signal for all the channels 5 23. ALTGX_RECONFIG MegaWizard Plug-In Manager Use the same control signal for all the channels Use the same control signal for all the channels Use the same control signal for all the channels ALTGX_RECONFIG MegaWizard Plug-In Manager Analog controls PMA PMA tx_vodctrl 3 tx_preemp_0t tx_preemp_1t tx_preemp_2t 5 rx_eqdcgain 3 rx_eqctrl 4 PMA tx_vodctrl_out 1 3 tx_preemp_0t_out tx_preemp_1t_out tx_preemp_2t_out 1 5 rx_eqdcgain_out 1 3 rx_eqctrl_out 1 4 2 tx_vodctrl_out 6

5 56 5 Stratix IV PMA PMA ALTGX_RECONFIG V OD ALTGX_RECONFIG MegaWizard Plug-In Manager tx_vodctrl 5 24 V OD 1. PMA tx_vodctrl = 3'b000 2. rx_tx_duplex_sel[1:0] 2'b10 PMA 3. busy Low 4. write_all 1 reconfig_clk 5. busy High PMA busy Low 5 24. 2 Use the same control signal for all the channels reconfig_clk write_all rx_tx_duplex_sel [1:0] (1) 2 b00 2 b10 busy tx_vodctrl [2:0] 3 b00 3 b11 5 24 : (1) Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 57 PMA ALTGX_RECONFIG PMA ALTGX_RECONFIG 2 tx_vodctrl_out 6 tx_vodctrl_out[2:0] 1 tx_vodctrl_ out[5:3] 2 2 V OD 1. rx_tx_duplex_sel[1:0] 2'b10 PMA 2. busy Low 3. read 1 reconfig_clk 4. busy High PMA 5. busy Low data_valid 2 V OD tx_vodctrl_out[5:3]

5 58 5 Stratix IV PMA 5 25 1 2 V OD 3'b001 3'b010 5 25. 2 reconfig_clk read busy data_valid rx_tx_duplex_sel [1:0] (1) 2 b00 2 b10 tx_vodctrl [5:0] 6 b000000 6 bxxxxxx 6 b010001 5 25 : (1) 1 Use the same control signal for all the channels Use the same control signal for all the channels PMA PMA tx_vodctrl 1 3 tx_preemp_0t tx_preemp_1t tx_preemp_2t 1 5 rrx_eqdcgain 1 3 rx_eqctrl 1 4 2 tx_vodctrl 6 tx_vodctrl[2:0] 1 tx_vodctrl[5:3] 2 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 59 PMA PMA PMA 5 55 Use the same control signal for all the channels PMA PMA ALTGX_RECONFIG PMA ALTGX_RECONFIG 2 tx_vodctrl 6 tx_vodctrl[2:0] 1 tx_vodctrl[5:3] 2 1. 2 PMA tx_vodctrl_out[5:0] PMA tx_vodctrl_out[2:0] tx_vodctrl[2:0] 1 1 2. 2 1

5 60 5 Stratix IV 5 26 Use the same control signal for all the channels 5 26. 2 Use the same control signal for all the channels reconfig_clk write_all rx_tx_duplex_sel [1:0] (1) 2 b00 2 b10 busy tx_vodctrl [5:0] (2) 6 b000000 6 b000011 5 26 : (1) (2) ALTGX_RECONFIG 2 tx_vodctrl 1 5 57 Data Rate Division in TX Channel and TX PLL select/reconfig Channel and CMU PLL reconfiguration Channel reconfiguration with TX PLL select CMU PLL reconfiguration Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 61 1 ALTGX MegaWizard Plug-In Manager Reconfig Enable Channel and Transmitter PLL Reconfiguration 5 27 ALTGX MegaWizard Plug-In Manager 5 27. ALTGX MegaWizard Plug-In Manager Enable Channel and Transmitter PLL Reconfiguration Data Rate Division in TX Date Rate Division in TX 1 2 4

5 62 5 Stratix IV Data Rate Division in TX TX TX 5 28 /1 /2 /4 5 28. High-Speed Serial Clock High-Speed clock from TX PLL0 /n /4, /5, /8, or /10 Low-Speed Parallel Clock High-Speed clock from TX PLL1 /1, /2, or /4 Quartus II 1 Data Rate Division in TX PMA ALTGX MegaWizard Plug-In Manager ALTGX MegaWizard Plug-In Manager 1. Reconfig Channel and Transmitter PLL Reconfiguration ALTGX_RECONFIG TX 2. Reconfig What is the starting channel number? 5 22 1 1 /1 /2 /4 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 63 ALTGX_RECONFIG MegaWizard Plug-In Manager Data Rate Division in TX ALTGX_RECONFIG MegaWizard Plug-In Manager 1. Reconfiguration settings What is the number of channels controlled by the reconfig controller? 5 34 ALTGX_RECONFIG 2. logical_channel_address 3. 5 29 Reconfiguration settings Data rate division in TX 5 29. ALTGX_RECONFIG MegaWizard Plug-In Manager Data rate division in TX 4. Data rate division in TX rate_switch_ctrl[1:0] 5 25 rate_switch_ctrl[1:0] TX 5 25. rate_switch_ctrl[1:0] TX rate_switch_ctrl[1:0] 2'b00 Divide by 1 2'b01 Divide by 2 2'b10 Divide by 4 2'b11

5 64 5 Stratix IV Error checks/data rate switch Use 'rate_switch_out' port to read out the current data rate division rate_switch_out[1:0] rate_switch_ctrl[1:0] 1 1 Data Rate Division in TX.mif Data Rate Division in TX Data Rate Division in TX Data Rate Division in TX Data Rate Division in TX 1. reconfig_mode_sel[2:0] 3'b011 2. rate_switch_ctrl[1:0] TX 3. logical_channel_address 4. busy Low 5. write_all 1reconfig_clk Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 65 5 30 Data Rate Division in TX 5 30. Data Rate Division in TX reconfig_mode_sel[2:0] 3'bXXX 3'b011 reconfig_clk rate_switch_ctrl[1:0] (1) 2'bXX 2'b10 2'bXX logical_channel_address (2), (3) 2'bXX 2'b01 2'bXX write_all busy 5 30 : (1) Divide by 4 rate_switch_ctrl[1:0] 2'b10 (2) ALTGX_RECONFIG MegaWizard Plug-In Manager What is the number of channels controlled by the reconfig controller? 4 logical_channel_address 2 (3) 2'b01 Data Rate Division in TX 1. reconfig_mode_sel[2:0] 3'b011 2. rate_switch_out[1:0] TX 3. logical_channel_address 4. busy Low 5. read 1 reconfig_clk

5 66 5 Stratix IV 5 31 Data Rate Division in TX 5 31. Data Rate Division in TX reconfig_mode_sel[2:0] 3'bXXX 3'b011 reconfig_clk logical_channel_address (1), (2) 2'bXX 2'b01 2'bXX read busy rate_switch_out[1:0] (3) 2'bXX Invalid output 2'b01 data_valid 5 31 : (1) Divide by 2 rate_switch_out[1:0] 2'b10 (2) ALTGX_RECONFIG MegaWizard Plug-In Manager What is the number of channels controlled by the reconfig controller? 4 logical_channel_address 2 (3) 2'b01 1 ALTGX_RECONFIG MegaWizard Plug-In Manager rate_switch_out[1:0] Data Rate Division in TX Channel and TX PLL select/reconfig.mif Channel and CMU PLL reconfiguration Channel and CMU PLL reconfiguration FPGA - Channel and CMU PLL reconfiguration PLL Channel reconfiguration with TX PLL select CMU PLL CMU PLL Reconfiguration Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 67.mif 2.mif.mif? 5 68.mif Quartus II ALTGX Quartus II.mif ALTGX_RECONFIG ALTGX.mif Quartus II.mif.mif CMU PLL.mif CMU PLL ALTGX MegaWizard Plug-In Manager CMU PLL ALTGX.mif CMU PLL write_all reconfig_data[15:0].mif 55 16 reconfig_address_out[5:0].mif 16.mif 5 26 ALTGX 5 26. ALTGX.mif ALTGX.mif (1) Duplex Receiver and Transmitter 55 Receiver only 37 Transmitter only 19 5 26 : (1).mif 16 1 16 busy busy 16 Quartus II <Project_DIR>/reconfig_mif.mif ALTGX < >.mif basic_gxb.mif 1.mif 1.mif.mif

5 68 5 Stratix IV.mif Quartus II Quartus II.mif.mif Quartus II 1. Assignments Settings 5 32 5 32..mif 1 2. Fitter Settings More Settings 5 33 5 33..mif 2 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 69 3. More Fitter Settings Option Generate GXB Reconfig MIF On 5 34 5 34..mif 3.mif Quartus II.MIF PLL PLL.mif pll_inclk_rx_cruclk[] Inter Quad [IQ] PLL 1 StratixIV Volume 2.mif

5 70 5 Stratix IV.mif.mif ALTGX MegaWizard Plug-In Manager Quartus II Quartus II.mif 2.mif.mif 0 pll_inclk_rx_cruclk [0].mif 1 pll_inclk_rx_cruclk [0] 5 35 5 36 5 35 2 pll_inclk_rx_cruclk [].mif 5 35.mif 5 35..mif Stratix IV GX Device Transceiver Block 0 156.25 MHz pll_inclk_rx_cruclk[0] pll_inclk_rx_cruclk[1] ALTGX Instance 1 Transceiver Block 1 125 MHz pll_inclk_rx_cruclk[0] ALTGX Instance 2 pll_inclk_rx_cruclk[1] Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 71 5 36.mif 5 36..mif Stratix IV GX Device Transceiver Block 0 156.25 MHz pll_inclk_rx_cruclk[0] pll_inclk_rx_cruclk[1] ALTGX Instance 1 Transceiver Block 1 pll_inclk_rx_cruclk[0] 125 MHz ALTGX Instance 2 pll_inclk_rx_cruclk[1] 1 1.mif 1 ALTGX pll_inclk_rx_cruclk [].mif mif 5 105 logical_tx_pll_sel [1:0] logical_tx_pll_sel_en.mif logical_channel_ address logical_channel_address [8:0].mif.mif logical_channel_address 5 10 1 CMU PLL reconfigurationlogical_channel_address CMU PLL

5 72 5 Stratix IV Channel and CMU PLL reconfiguration ALTGX MegaWizard Plug-In Manager.mif ALTGX_RECONFIG.mif 1 Channel and CMU PLL Reconfiguration logical_channel_address 1 Channel and CMU PLL Reconfiguration Basic PMA Direct 1 Channel and CMU PLL Reconfiguration Basic PMA Direct 1 N Basic PMA Direct 1 N CMU CEI Channel and CMU PLL Reconfiguration CMU PLL PLL 1 1 1 2 4 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 73 1 Basic PMA Direct Basic PMA Direct XAU GIGE Serial RapidIO Basic Basic Basic CEI Basic PMA Direct 1 Basic PMA Direct 1 PCI Express [PIPE] x4 5 77 1 1 Transmitter Only Receiver Only ALTGX MegaWizard Plug-In Manager Receiver and Transmitter Channel and CMU PLL Reconfiguration PCS PMA CMU PLL

5 74 5 Stratix IV 5 37 5 37. CMU PLL CMU Channel refclk0 clock mux CMU PLL0 Full Duplex Transceiver Channel TX CHANNEL refclk1 Logical TX PLL select LOCAL DIVIDER digital+analog logic clock mux CMU PLL1 RX CHANNEL clock mux RX PLL digital+analog logic Blocks that can be reconfigured in Channel and CMU PLL Reconfiguration mode Receiver and Transmitter Transmitter Only Receiver only Transmitter Only 1 Transmitter Only.mif Receiver only Transmitter only 1 Transmitter Only Receiver Only Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 75 Channel and CMU PLL Reconfiguration ALTGX MegaWizard Plug-In Manager CMU PLL ALTGX MegaWizard Plug-In Manager.mif CMU PLL 1. Reconfig Channel and Transmitter PLL reconfiguration 2. CMU PLL General CMU PLL 3. Reconfig Clks What is the main PLL logical reference index? CMU PLL 5 38 1 CMU0 PLL 2 CMU1 PLL

5 76 5 Stratix IV 5 38. CMU PLL CMU Channels refclk0 refclk1 156.25 MHz 125 MHz clock mux 6.25 Gbps CMU0 PLL Logical TX PLL select full duplex transceiver channel 1 TX CHANNEL 1 LOCAL DIVIDER 6.25 Gbps digital+analog logic clock mux 2.5 Gbps CMU1 PLL RX CHANNEL 1 clock mux 6.25 Gbps RX PLL 6.25 Gbps digital+analog logic full duplex transceiver channel 2 TX CHANNEL 2 Logical TX PLL select LOCAL DIVIDER 2.5 Gbps digital+analog logic RX CHANNEL 2 clock mux 2.5 Gbps 2.5 Gbps RX PLL digital+analog logic CMU0 PLL CMU PLL ID ALTGX_RECONFIG CMU0 PLL CMU1 PLL ALTGX_RECONFIG CMU1 PLL 0 1 CMU PLL 0 1 1 CMU0 PLL CMU1 PLL Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 77 1 logical tx pll.mif 4. Reconfig Clks How many input clocks? CMU PLL 10 5 111 5. Reconfig Clks What is the selected input clock source for the Transmitter PLL and Receiver PLL? CMU PLL ID 6. 2 CMU PLL FIFO FIFO 5 27 5 28 5 27. ( / ) FPGA FIFO 1 FIFO tx_coreclk FPGA tx_clkout FIFO tx_coreclk ALTGX MegaWizard Plug-In Manager tx_clkout tx_clkout Quartus II tx_clkout FPGA FIFO 5 39 Reconfig 2 tx_clkout 2 ALTGX MegaWizard Plug-In Manager Reconfig 2 2 tx_clkout (1) 1 1 2

5 78 5 Stratix IV 5 27. ( / ) 1 0 tx_clkout FIFO 4 3 Gbps ALTGX_RECONFIG MegaWizard Plug-In Manager Channel and CMU PLL Reconfiguration 4 3 Gbps 1.5 Gbps 1.5 Gbps 3 Gbps 1 5 40 4 0 tx_clkout tx_clkout FIFO 4 3 Gbps ALTGX_RECONFIG MegaWizard Plug-In Manager Channel and CMU PLL Reconfiguration 4 4 2 5 41 tx_clkout FIFO Channel and CMU PLL Reconfiguration 5 27 : (1) PMA Basic [PMA Direct] 1 N Reconfig 2 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 79 5 39. ALTGX MegaWizard Plug-In Manager Reconfig 2 tx_clkout 2

5 80 5 Stratix IV 5 40. 1 Channel and CMU PLL Reconfiguration FPGA Core Transceiver Block TX0 (3 Gbps) RX0 TX1 (3 Gbps) tx_clkout[0] RX1 CMU1 PLL TX2 (3 Gbps) RX2 CMU0 PLL TX3 (3 Gbps) RX3 Low-speed parallel clock generated by the TX0 local divider (tx_clkout[0]) High-speed serial clock generated by the CMU0 PLL Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 81 5 41. 2 Channel and CMU PLL Reconfiguration FPGA Core Transciever Block tx_clkout[0] TX0 (3 Gbps) RX0 tx_clkout[1] TX1 (3 Gbps) RX1 CMU1 PLL tx_clkout[2] TX2 (3 Gbps) RX2 CMU0 PLL tx_clkout[3] TX3 (3 Gbps) RX3 High-speed serial clock generated by the CMU0 PLL 5 28. ( / ) FIFO FPGA 1 FIFO rx_coreclk FPGA rx_clkout FIFO rx_coreclk ALTGX MegaWizard Plug-In Manager rx_clkout rx_clkout Quartus II rx_clkout FPGA FIFO Reconfig 2 rx_clkout 3 ALTGX MegaWizard Plug-In Manager Reconfig 2 3 rx_clkout (1) 1 1 2 3

5 82 5 Stratix IV 5 28. ( / ) 1 0 tx_clkout FIFO Basic Basic 4 Basic 2 Gbps ALTGX_RECONFIG MegaWizard Plug-In Manager Channel and CMU PLL Reconfiguration 4 3.125 Gbps 1 5 42 4 0 tx_clkout tx_clkout FIFO Basic TX1/RX1 Basic 1 Gbps Basic 2 Gbps TX3/RX3 Basic 4 Gbps Basic 1 Gbps TX0/RX0 Basic 3.125 Gbps 1 Gbps ALTGX_RECONFIG MegaWizard Plug-In Manager Channel and CMU PLL Reconfiguration Basic 2 Basic 5 43 tx_clkout rx_clkout FIFO Basic Basic TX1/RX1 GIGE SONET/SDH OC48 TX2/RX2 Basic 2.5 Gbps Basic 1.244 Gbps ALTGX_RECONFIG MegaWizard Plug-In Manager Channel and CMU PLL Reconfiguration 3 5 44 rx_clkout 5 28 : (1) PMA Basic [PMA Direct] 1 N Reconfig 2 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 83 5 42. 1 FPGA Core Transceiver Block TX0 (2 Gbps) RX0 tx_clkout[0] TX1 (2 Gbps) RX1 CMU1 PLL TX2 (2 Gbps) CMU0 PLL RX2 TX3 (2 Gbps) RX3 Four regular transceiver channels configured at Basic 2G with Rate Matching and set up to switch to 3.125 Gbps with Rate Matching Low speed parallel clock generated by the TX0 local divider (tx_clkout[0]) High speed serial clock generated by the CMU0 PLL High speed serial clock generated by the CMU1 PLL

5 84 5 Stratix IV 5 43. 2 FPGA Core Transceiver Block tx_clkout[0] TX0 (2 Gbps) RX0 tx_clkout[1] TX1 (2 Gbps) RX1 CMU1 PLL tx_clkout[2] TX2 (2 Gbps) RX2 CMU0 PLL tx_clkout[3] TX3 (2 Gbps) RX3 Four regular transceiver channels configured at Basic 2G with Rate Matching and set up to switch to different functional modes with Rate Matching (and different data rates) High speed serial clock generated by the CMU0 PLL High speed serial clock generated by the CMU1 PLL Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 85 5 44. 3 FPGA Core Transceiver Block TX0 (2 Gbps) rx_clkout[0] RX0 TX1 (2 Gbps) rx_clkout[1] RX3 CMU1 PLL rx_clkout[2] TX2 (2 Gbps) RX2 CMU0 PLL TX3 (2 Gbps) rx_clkout[3] RX3 High-speed serial clock generated by the CMU0 PLL High-speed serial clock generated by the CMU1 PLL

5 86 5 Stratix IV 5 45. ALTGX MegaWizard Plug-In Manager rx_clkout 7. FPGA - Channel and CMU PLL Reconfiguration FPGA - ALTGX MegaWizard Plug-In Manager FPGA - FPGA - PCS 5 46 Reconfig Channel Interface FPGA - Channel Interface FPGA - Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 87 5 46. ALTGX MegaWizard Plug-In Manager Channel Interface 2 tx_datainfull General 1 44 Transmitter Only Receiver and Transmitter tx_datain rx_dataoutfull General 1 61 Receiver Only Receiver and Transmitter rx_dataout f 2 Reconfig 2

5 88 5 Stratix IV f Stratix IV GX Volume 2 Stratix IV GX Basic PMA Direct FPGA - : rx_dataout rx_syncstatus rx_patterndetect rx_a1a2sizeout rx_ctrldetect rx_errdetect rx_disperr FPGA - tx_datain tx_ctrlenable tx_forcedisp tx_dispval Quartus II tx_datainfull rx_dataoutfull Reconfig 2 Quartus II pipestatus powerdn PCI Express PIPE 5 29 tx_datainfull[43:0]fpga - 5 29. tx_datainfull[43:0] FPGA ( / ) FPGA Stratix IV GX FPGA tx_datainfull[7:0] 8 tx_datain 8B/10B 8 FPGA 10 FPGA tx_datainfull[8]tx_ctrlenable tx_datainfull[9] tx_datainfull[7:0] PIPE PIPE PIPE tx_forcedisp PIPE tx_forcedispcompliance tx_datainfull[10] tx_datainfull[7:0] tx_dispval tx_datainfull[9:0] 10 tx_datain Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 89 5 29. tx_datainfull[43:0] FPGA ( / ) FPGA Stratix IV GX FPGA 2 8 tx_datain tx_datainfull[7:0] - tx_datain LS tx_datainfull[18:11] - tx_datain MS PCS-PMA 16/20 16 FPGA 8B/10B tx_datainfull[8] - tx_ctrlenable LSB tx_datainfull[19] - tx_ctrlenable MSB tx_datainfull[9] - tx_forcedisp LSB tx_datainfull[20] - tx_forcedisp MSB tx_datainfull[10] - tx_dispval LSB tx_datainfull[21] - tx_dispval MSB 2 8 tx_datain tx_datainfull[7:0] - tx_datain LS tx_datainfull[29:22] - tx_datain MS 8B/10B PCS-PMA 8/10 16 FPGA PCS-PMA 20 20 FPGA PCS-PMA 10 20 FPGA 2 tx_ctrlenable tx_datainfull[8] - tx_ctrlenable LSB tx_datainfull[30] - tx_ctrlenable MSB PIPE tx_datainfull[9] - tx_forcedisp LSB tx_datainfull[31] - tx_forcedisp MSB PIPE tx_datainfull[9] - tx_forcedispcompliance LSB tx_datainfull[31] - tx_forcedispcompliance MSB tx_datainfull[10] - tx_dispval LSB tx_datainfull[32] - tx_dispval MSB 2 10 tx_datain tx_datainfull[9:0] - tx_datain LS tx_datainfull[20:11] - tx_datain MS 2 10 tx_datain tx_datainfull[9:0] - tx_datain LS tx_datainfull[31:22] - tx_datain MS

5 90 5 Stratix IV 5 29. tx_datainfull[43:0] FPGA ( / ) FPGA Stratix IV GX FPGA 4 8 tx_datain tx_datainfull[7:0]- tx_datain LS tx_datainfull[18:11] tx_datainfull[29:22] tx_datainfull[31:22]- tx_datain MS 8B/10B PCS-PMA 16/20 32 FPGA PCS-PMA 20 40 FPGA 4 tx_ctrlenable tx_datainfull[8]- tx_ctrlenable LSB tx_datainfull[19] tx_datainfull[30] tx_datainfull[41]- tx_ctrlenable MSB tx_forcedisp tx_datainfull[9]- tx_ctrlenable LSB tx_datainfull[20] tx_datainfull[31] tx_datainfull[42]- tx_forcedisp MSB tx_dispval tx_datainfull[10]- tx_dispval LSB tx_datainfull[21] tx_datainfull[32] tx_datainfull[43]- tx_dispval MSB 4 10 tx_datain tx_datainfull[9:0]- tx_datain LS tx_datainfull[20:11] tx_datainfull[31:22] tx_datainfull[42:33]- tx_datain MS Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 91 5 30. rx_dataoutfull[63:0] FPGA ( / ) FPGA Stratix IV GX FPGA 8 8B/10B 8 FPGA rx_dataoutfull[7:0] 8 rx_dataout rx_dataoutfull[8]rx_ctrldetect rx_dataoutfull[9] rx_dataoutfull[7:0] GIGE PCI Express EDB = K30.7 rx_errdetect rx_dataoutfull[10] rx_syncstatus rx_dataoutfull[11] rx_dataoutfull[7:0] rx_disperr rx_dataoutfull[12] rx_patterndetect rx_dataoutfull[13] PIPE/PCIe FIFO rx_rmfifodatadeleted rx_dataoutfull[14] PIPE/PCIe FIFO rx_rmfifodatainserted rx_dataoutfull[14:13] PIPE/PCI-E 2'b00 OK 2'b01 1 SKP 2'b10 0xFE 1 SKP 2b11 rx_pipestatus rx_dataoutfull[15] 8B/10B rx_runningdisp 8 SONET/SDH 10 FPGA rx_dataoutfull[7:0] 8 rx_dataout rx_dataoutfull[8] rx_a1a2sizeout rx_dataoutfull[10] rx_syncstatus rx_dataoutfull[11] rx_dataoutfull[12] rx_patterndetect rx_dataoutfull[9:0] 10 rx_dataout rx_dataoutfull[10] rx_syncstatus rx_dataoutfull[11] 8B/10B rx_disperr rx_dataoutfull[12] rx_patterndetect rx_dataoutfull[13] PIPE/PCIe FIFO rx_rmfifodatadeleted rx_dataoutfull[14] PIPE/PCIe FIFO rx_rmfifodatainserted rx_dataoutfull[15] 8B/10B rx_runningdisp

5 92 5 Stratix IV 5 30. rx_dataoutfull[63:0] FPGA ( / ) FPGA Stratix IV GX FPGA 2 8 rx_dataout rx_dataoutfull[7:0] - rx_dataout LS rx_dataoutfull[23:16] - rx_dataout MS 16 8B/10B PCS-PMA 16/20 16 FPGA 2 rx_dataoutfull[8] - rx_ctrldetect LSB rx_dataoutfull[24] - rx_ctrldetect MSB 2 rx_dataoutfull[9] - rx_errdetect LSB rx_dataoutfull[25] - rx_errdetect MSB 2 rx_dataoutfull[10] - rx_syncstatus LSB rx_dataoutfull[26] - rx_syncstatus MSB 2 rx_dataoutfull[11] - rx_disperr LSB rx_dataoutfull[27] - rx_disperr MSB 2 rx_dataoutfull[12] - rx_patterndetect LSB rx_dataoutfull[28] - rx_patterndetect MSB rx_dataoutfull[13] rx_dataoutfull[45] PIPE/PCIe FIFO rx_rmfifodatadeleted rx_dataoutfull[14] rx_dataoutfull[46] PIPE/PCIe FIFO rx_rmfifodatainserted 2 2 PIPE rx_dataoutfull[14:13] - rx_pipestatus LSB rx_dataoutfull[30:29] - rx_pipestatus MSB PIPE/PCI-E 2'b00 OK 2'b01 1 SKP 2'b10 8 hfe 1 SKP 2'b11 rx_dataoutfull[15] rx_dataoutfull[47] 8B/10B rx_runningdisp Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 93 5 30. rx_dataoutfull[63:0] FPGA ( / ) FPGA Stratix IV GX FPGA 2 8 rx_dataoutfull[7:0] - rx_dataout LS rx_dataoutfull[39:32] - rx_dataout MS 16 8B/10B PCS-PMA 8/10 16 FPGA 2 rx_dataoutfull[8] - rx_ctrldetect LSB rx_dataoutfull[40] - rx_ctrldetect MSB 2 rx_dataoutfull[9] - rx_errdetect LSB rx_dataoutfull[41] - rx_errdetect MSB 2 rx_dataoutfull[10] - rx_syncstatus LSB rx_dataoutfull[42] - rx_syncstatus MSB 2 rx_dataoutfull[11] - rx_disperr LSB rx_dataoutfull[43] - rx_disperr MSB 2 rx_dataoutfull[12] - rx_patterndetect LSB rx_dataoutfull[44] - rx_patterndetect MSB rx_dataoutfull[13] rx_dataoutfull[45] PIPE/PCIe FIFO rx_rmfifodatadeleted rx_dataoutfull[14] rx_dataoutfull[46] PIPE/PCIe FIFO rx_rmfifodatainserted 2 2 PIPE rx_dataoutfull[14:13] - rx_pipestatus LSB rx_dataoutfull[46:45] - rx_pipestatus MSB PIPE/PCI-E 2'b00 OK 2'b01 1 SKP 2'b10 8 hfe 1 SKP 2'b11 rx_pipestatus rx_dataoutfull[15] rx_dataoutfull[47] 8B/10B rx_runningdisp 16 SONET/SDH 2 8 rx_dataoutfull[7:0] - rx_dataout LS rx_dataoutfull[39:32] - rx_dataout MS 2 rx_dataoutfull[8] - rx_a1a2sizeout LSB rx_dataoutfull[40] - rx_a1a2sizeout MSB 2 rx_dataoutfull[10] - rx_syncstatus LSB rx_dataoutfull[42] - rx_syncstatus MSB 2 rx_dataoutfull[12] - rx_patterndetect LSB rx_dataoutfull[44] - rx_patterndetect MSB

5 94 5 Stratix IV 5 30. rx_dataoutfull[63:0] FPGA ( / ) FPGA Stratix IV GX FPGA PCS-PMA 20 20 FPGA PCS-PMA 10 20 FPGA 2 10 rx_dataout rx_dataoutfull[9:0] - rx_dataout LS rx_dataoutfull[25:16] - rx_dataout MS 2 rx_dataoutfull[10] - rx_syncstatus LSB rx_dataoutfull[26] - rx_syncstatus MSB rx_dataoutfull[11] rx_dataoutfull[27] 8B/10B rx_disperr 2 rx_dataoutfull[12] - rx_patterndetect LSB rx_dataoutfull[28] - rx_patterndetect MSB rx_dataoutfull[13] rx_dataoutfull[29] PIPE/PCIe FIFO rx_rmfifodatadeleted rx_dataoutfull[14] rx_dataoutfull[30] PIPE/PCIe FIFO rx_rmfifodatainserted rx_dataoutfull[15] rx_dataoutfull[31] 8B/10B rx_runningdisp 2 10 rx_dataoutfull[9:0] - rx_dataout LS rx_dataoutfull[41:32] - rx_dataout MS 2 rx_dataoutfull[10] - rx_syncstatus LSB rx_dataoutfull[42] - rx_syncstatus MSB rx_dataoutfull[11] rx_dataoutfull[43] 8B/10B rx_disperr 2 rx_dataoutfull[12] - rx_patterndetect LSB rx_dataoutfull[44] - rx_patterndetect MSB rx_dataoutfull[13] rx_dataoutfull[45] PIPE/PCIe FIFO rx_rmfifodatadeleted rx_dataoutfull[14] rx_dataoutfull[46] PIPE/PCIe FIFO rx_rmfifodatainserted rx_dataoutfull[15] rx_dataoutfull[47] 8B/10B rx_runningdisp Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 95 5 30. rx_dataoutfull[63:0] FPGA ( / ) FPGA Stratix IV GX FPGA 4 8 rx_dataout rx_dataoutfull[7:0] - rx_dataout LS rx_dataoutfull[23:16] rx_dataoutfull[39:32] rx_dataoutfull[41:32] - rx_dataout MS 32 8B/10B 32 4 rx_dataout rx_dataoutfull[8] - rx_ctrldetect LSB rx_dataoutfull[24] rx_dataoutfull[40] rx_dataoutfull[56] - rx_ctrldetect MSB 4 rx_dataoutfull[9] - rx_errdetect LSB rx_dataoutfull[25] rx_dataoutfull[41] rx_dataoutfull[57] - rx_errdetect MSB 4 rx_dataoutfull[10] - rx_syncstatus LSB rx_dataoutfull[26] rx_dataoutfull[42] rx_dataoutfull[58] - rx_syncstatus MSB 4 rx_dataoutfull[11] - rx_disperr LSB rx_dataoutfull[27] rx_dataoutfull[43] rx_dataoutfull[59] - rx_disperr MSB 4 rx_dataoutfull[12] - rx_patterndetect LSB rx_dataoutfull[28] rx_dataoutfull[44] rx_dataoutfull[60] - rx_patterndetect MSB rx_dataoutfull[13] rx_dataoutfull[29] rx_dataoutfull[45] rx_dataoutfull[61] PIPE/PCIe FIFO rx_rmfifodatadeleted rx_dataoutfull[14] rx_dataoutfull[30] rx_dataoutfull[46] rx_dataoutfull[62] PIPE/PCIe FIFO rx_rmfifodatainserted

5 96 5 Stratix IV 5 30. rx_dataoutfull[63:0] FPGA ( / ) FPGA Stratix IV GX FPGA rx_dataoutfull[15] rx_dataoutfull[31] rx_dataoutfull[47] rx_dataoutfull[63] 8B/10B rx_runningdisp 16 SONET/SDH 32 40 4 rx_dataout rx_dataoutfull[7:0] - rx_dataout LS rx_dataoutfull[23:16] rx_dataoutfull[39:32] rx_dataoutfull[41:32] - rx_dataout MS rx_dataoutfull[8] rx_dataoutfull[24] rx_dataoutfull[40] rx_dataoutfull[56] 4 rx_a1a2sizeout 4 rx_dataoutfull[10] - rx_syncstatus LSB rx_dataoutfull[26] rx_dataoutfull[42] rx_dataoutfull[58] - rx_syncstatus MSB 4 rx_dataoutfull[12] - rx_patterndetect LSB rx_dataoutfull[28] rx_dataoutfull[44] rx_dataoutfull[60] - rx_patterndetect MSB 4 10 rx_dataout rx_dataoutfull[9:0] - rx_dataout LS rx_dataoutfull[25:16] rx_dataoutfull[41:32] rx_dataoutfull[57:48] - rx_dataout MS 4 rx_dataoutfull[10] - rx_syncstatus LSB rx_dataoutfull[26] rx_dataoutfull[42] rx_dataoutfull[58] - rx_syncstatus MSB 4 rx_dataoutfull[12] - rx_patterndetect LSB rx_dataoutfull[28] rx_dataoutfull[44] rx_dataoutfull[60] - rx_patterndetect MSB Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 97 Channel and CMU PLL Reconfiguration ALTGX_RECONFIG MegaWizard 1. Reconfiguration settings What is the number of channels controlled by the reconfig controller? 5 34 ALTGX_RECONFIG 2. 5 47 Reconfiguration settings Channel and TX PLL select/reconfig Channel and TX PLL select/reconfig 3. channel_reconfig_done channel_reconfig_done.mif 4. reconfig_address_out[5:0].mif reconfig_address_en Channel and TX PLL Reconfiguration 5. reset_reconfig_address reconfig_address_out[5:0] 0 6. reconfig_address_en ALTGX_RECONFIG reconfig_address_out[5:0].mif 16 7. logical_tx_pll_sel[1:0] logical_tx_pll_sel_en 2 5 105 logical_tx_pll_sel [1:0] logical_tx_pll_sel_en 8. rx_tx_duplex_sel[1:0] Receiver only Transceiver only Receiver and Transmitter 5 10.mif rx_tx_duplex_sel[1:0].mif ALTGX_RECONFIG MegaWizard Plug-In Manager Channel and CMU PLL Reconfiguration 1. reconfig_mode_sel[2:0] 3'b101.mif 16 2. rx_tx_duplex_sel[1:0]

5 98 5 Stratix IV 3. logical_channel_address 4. busy Low write_all 1 reconfig_clk 5. 5 47 Channel and CMU PLL Reconfiguration.mif 5 47. Channel and CMU PLL Reconfiguration.mif reconfig_mode_sel[1:0] 3 b101 logical_channel_address[1:0] (1) 2 b01 rx_tx_duplex_sel[1:0] (2) 2 b00 reconfig_clk write_all busy reconfig_address_out[5:0] Addr0 Addr1 Addr37 Addr0 reconfig_address_en reconfig_data[15:0] (3) 1 st 16-bits Don t care 2 nd 16-bits 55 th 16-bits Don t care channel_reconfig_done 5 47 : (1) ALTGX_RECONFIG 2 logical_channel_address 2 2 logical_channel_address 2'b01 (2) rx_tx_duplex_sel[1:0] Receiver and Transmitter 2'b00 3'b (3) Receiver and Transmitter Basic.mif 54 Channel Reconfiguration with TX PLL Select Channel Reconfiguration with TX PLL Select 2 CMU PLL PLL 2 CMU PLL CMU PLL Channel Reconfiguration with TX PLL select CMU PLL Reconfiguration CMU PLL Reconfiguration 2 PLL Channel Reconfiguration with TX PLL Select 2 PLL Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 99 Channel Reconfiguration with TX PLL Select CMU PLL 5 48 Channel Reconfiguration with TX PLL select 5 48. Channel Reconfiguration with TX PLL Select CMU Channels refclk0 clock mux CMU0 PLL full duplex transceiver channel TX CHANNEL refclk1 Logical TX PLL select LOCAL DIVIDER digital+analog logic clock mux CMU1 PLL RX CHANNEL clock mux RX PLL digital+analog logic Blocks that can be reconfigured in Channel Reconfiguration with TX PLL Select mode Channel Reconfiguration with TX PLL Select ALTGX MegaWizard Plug-In Manager CMU PLL PLL ALTGX MegaWizard Plug-In Manager.mif 2 CMU PLL 5 75Channel and CMU PLL ReconfigurationALTGX MegaWizard Plug-In Manager 7 PLL PLL CMU PLL 2 CMU PLL

5 100 5 Stratix IV 5 49 CMU0 PLL CMU0 PLL 5 49. CMU0 PLL Main PLL logical_tx_pll value = 1 (provided by the user in the ALTGX MegaWizard Plug-In Manager) CMU Channels refclk0 refclk1 156.25 MHz 125 MHz clock mux 6.25 Gbps CMU0 PLL 1 0 Logical TX PLL select Full Duplex Transceiver Channel TX CHANNEL LOCAL DIVIDER 6.25 Gbps digital+analog logic clock mux 2.5 Gbps CMU1 PLL RX CHANNEL clock mux 6.25 Gbps RX PLL 6.25 Gbps digital+analog logic Active Connections Unused Connections Alternate PLL logical_tx_pll value = 0 (automatically set by the ALTGX MegaWizard Plug-In Manager) ALTGX MegaWizard Plug-In Manager ID CMU0 PLL ID logical tx pll CMU0 PLL ID CMU0 PLL ALTGX MegaWizard Plug-In Manager General PLL PLL PLL logical tx pll 1 PLL 0 PLL logical tx pll.mif 1 1 CMU PLL.mif CMU PLL Reconfig Clks What is the main PLL logical reference index? PLL logical tx pll Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 101 CMU PLL Reconfiguration : Channel Reconfiguration with CMU PLL select 1 1 CMU PLL CMU PLL Reconfiguration reconfig_mode_sel[2:0] 3'b100 2 CMU PLL 5 104 CMU PLL Reconfiguration Channel Reconfiguration with CMU PLL select reconfig_mode_sel[2:0] 3'b110 2 CMU PLL 5 102 Channel Reconfiguration with TX PLL Select 1 PLL ALTGX MegaWizard Plug-In Manager General CMU PLL PLL Reconfig Alt PLL CMU PLL Channel Reconfiguration with TX PLL Select ALTGX_RECONFIG MegaWizard Plug-In Manager ALTGX MegaWizard Plug-In Manager TX PLL 5 97 Channel and CMU PLL Reconfiguration ALTGX_RECONFIG MegaWizard 6 Channel and TX PLL Reconfiguration 1. logical_tx_pll_sel[1:0] logical_tx_pll_sel_en 2 5 105 logical_tx_pll_sel [1:0] logical_tx_pll_sel_en Error checks/data rate switch 2. rx_tx_duplex_sel[1:0] Receiver only Transmitter only Receiver and Transmitter.mif rx_tx_duplex_sel[1:0].mif ALTGX_RECONFIG MegaWizard Plug-In Manager 5 10

5 102 5 Stratix IV Channel Reconfiguration with TX PLL Select reconfig_mode_sel[2:0] 3'b001 write_all 16 reconfig_data[15:0] 16 ALTGX Quartus II.mif rx_tx_duplex_sel[1:0] logical_channel_address busy Lowwrite_all 1 reconfig_clk 5 47.mif.mif Channel Reconfiguration with TX PLL Select reconfig_mode_sel[2:0] Channel Reconfiguration with TX PLL Select reconfig_mode_sel[2:0] 3'b001 CMU PLL Reconfiguration - CMU PLL CMU PLL CMU PLL.mif 1 CMU PLL ReconfigurationBasic (PMA Direct) 1 CMU PLL Reconfiguration Basic (PMA Direct) 1 Basic (PMA Direct) N CEI 1 logical_channel_address CMU PLL Reconfiguration TX PLL CMU PLL Reconfiguration CMU PLL ALTGX_RECONFIG CMU PLL CMU PLL pll_locked Low ALTGX pll_locked CMU PLL CMU PLL Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 103 CMU PLL Reconfiguration CMU0 PLL CMU1 PLL 2 CMU PLL CMU PLL 5 50 CMU PLL 5 50. CMU PLL CMU Channels refclk0 clock mux CMU0 PLL full duplex transceiver channel TX CHANNEL refclk1 Logical TX PLL select LOCAL DIVIDER digital+analog logic clock mux CMU1 PLL RX CHANNEL clock mux RX PLL digital+analog logic Blocks that can be reconfigured in CMU PLL Reconfiguration mode CMU PLL Reconfiguration ALTGX MegaWizard Plug-In Manager CMU PLL.mif ALTGX MegaWizard Plug-In Manager.mif CMU PLL 1. Reconfig Channel and Transmitter PLL reconfiguration 2. General CMU PLL 3. Reconfig Clks What is the main PLL logical reference index? 5 75 CMU PLL

5 104 5 Stratix IV 1 CMU0 PLL CMU1 PLL logical tx pll.mif 1 1 CMU PLL.mif CMU PLL CMU PLL Reconfiguration ALTGX_RECONFIG MegaWizard Plug-In Manager CMU PLL Reconfiguration 5 97 Channel and CMU PLL Reconfiguration ALTGX_RECONFIG MegaWizard 6 Channel and TX PLL Reconfiguration Error checks/data rate switch 1. logical_tx_pll_sel[1:0] logical_tx_pll_sel_en 2 5 105 logical_tx_pll_sel [1:0] logical_tx_pll_sel_en 2. rx_tx_duplex_sel[1:0] Receiver only Transmitter only Receiver and Transmitter.mif rx_tx_duplex_sel[1:0].mif ALTGX_RECONFIG MegaWizard Plug-In Manager 5 10 CMU PLL Reconfiguration 1. reconfig_mode_sel[2:0] 3'b100 2. logical_channel_address CMU PLL 3. busy Low 4. write_all 1 reconfig_clk.mif 16.mif reconfig_address_out_en busy 16 busy reconfig_address_out[5:0] CMU PLL channel_reconfig_done CMU PLL Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 105 5 51 CMU PLL Reconfiguration.mif 5 51. CMU PLL Reconfiguration.mif reconfig_mode_sel[2:0] 3 b100 reconfig_clk write_all busy reconfig_address_out[5:0] Addr0 Addr1 Addr37 Addr0 reconfig_address_en reconfig_data[15:0] (1) 1 st 16-bits Don t care 2 nd 16-bits 27 th 16-bits Don t care channel_reconfig_done 5 51 : (1) Basic (PMA Direct).mif 27 logical_tx_pll_sel [1:0] logical_tx_pll_sel_en logical_tx_pll_sel[1:0] logical_tx_pll_sel_en Channel and CMU PLL Reconfiguration Channel Reconfiguration with TX PLL select CMU PLL Reconfiguration ALTGX_RECONFIG logical_tx_pll_sel[1:0] logical_tx_pll_sel_en Channel and TX PLL select/reconfig logical_tx_pll_sel[1:0] logical_tx_pll_sel_en.mif CMU PLL logical tx pll logical_tx_pll_sel[1:0] logical_tx_pll_sel_en logical_tx_pll_sel_en 1'b1 logical_tx_pll_sel[1:0] CMU PLL

5 106 5 Stratix IV logical_tx_pll_sel [1:0] logical_tx_pll_sel[1:0] logical_tx_pll_sel_en logical_tx_pll_sel[1:0] CMU PLL 0 1 0 1 ALTGX MegaWizard Plug-In Manager What is the main transmitter PLL logical reference index? What is the alternate transmitter PLL logical reference index? logical_tx_pll_sel_en 1'b1.mif logical tx pll logical_tx_pll_ sel[1:0] logical_tx_pll_sel [1:0] logical_tx_pll_sel_en Channel and TX PLL select/reconfig ALTGX_RECONFIG MegaWizard Plug-In Manager logical_ tx_pll_sel[1:0] logical_tx_pll_sel_en 1 logical_tx_pll_sel[1:0] logical tx pll.mif logical_tx_pll_sel[1:0] logical_tx_pll_sel_en.mif logical tx pll logical_tx_pll_ sel_en 1'b0 logical_tx_pll_sel[1:0] logical_tx_pll_sel_ en 1'b1 5 52 logical_tx_pll_sel_en 1'b1 logical_tx_pll_sel[1:0] Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 107 5 52. logical_tx_pll_sel [1:0] logical_tx_pll_sel_en logical tx pll (logical reference index value stored in the.mif) 0 ALTGX_RECONFIG instance selected logical reference index value logical_tx_pll_sel[1:0] (logical reference index specified in the ALTGX_RECONFIG MegaWizard Plug-In Manager) 1 logical_tx_pll_sel_en 1 channel_reconfig_done logical_tx_pll_sel[1:0] logical_tx_pll_sel_en 5 31.mif logical tx pll logical_tx_pll_sel[1:0] 5 31. logical_tx_pll_sel [1:0] logical_tx_pll_sel_en logical_tx_pll_sel[1:0] logical_tx_pll_sel_en ALTGX_RECONFIG 1 logical_tx_pll_sel[1:0] 0.mif logical tx pll logical_tx_pll_sel[1:0].mif logical tx pll ALTGX MegaWizard Plug-In Manager PLL 1 logical_tx_pll_sel[1:0] RX

5 108 5 Stratix IV 5 53 logical tx pll 1 CMU PLL channel_reconfig_done logical_tx_pll_sel[1:0] logical_tx_pll_sel_en 5 53. 1 PLL Dynamic reconfiguration controller does not register the logical_tx_pll_sel value for this write because the logical_tx_pll_sel_en is low logical_tx_pll_sel_en logical_tx_pll_sel[1:0] write_all channel_reconfig_done reconfig_mode_sel[2:0] 100 2 1 CMU PLL.mif CMU PLL ALTGX General PLL 2Gbps 3.125 Gbps PLL CMU0 PLL 1.mif.mif logical tx pll 1.mif CMU1 PLL CMU PLL 3.125 Gbps.mif 1 CMU0 PLL.mif logical tx pll 1 CMU1 PLL logical_tx_pll_sel[1:0] logical_tx_pll_sel_en logical_tx_pll_sel[1:0] = 2'b00 CMU1 PLL logical_tx_pll_sel_en = 1'b1.mif CMU1 PLL CMU0 PLL 1 CMU1 PLL 0 1 CMU PLL.mif CMU PLL Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 109 Channel and CMU PLL Reconfiguration CMU PLL Reconfiguration CMU0 PLLALTGX.mif CMU0 PLL 0 CMU1 PLL.mif CMU0 PLL.mif CMU1 PLL logical_tx_pll_sel[1:0] 2'b01 logical_tx_pll_sel_en 1'b1.mif.mif logical tx pll CMU1 PLL Channel Reconfiguration with TX PLL Select TX PLL.mif CMU1 PLL.mif CMU1 PLL 0 CMU1 PLL 0 logical tx pll = 0.mif Channel Reconfiguration with TX PLL Select.mif CMU1 PLL CMU0 PLL.mif logical_tx_pll_sel[1:0] 2'b01 logical_tx_pll_sel_en 1'b1.mif.mif logical tx pll CMU0 PLL CMU0 PLL 3 1 CMU PLL.mif CMU PLL 1 CMU PLL.mif CMU PLL

5 110 5 Stratix IV Channel and CMU PLL Reconfiguration CMU PLL Reconfiguration CMU0 PLLALTGX.mif CMU0 PLL 1 CMU0 PLL.mif CMU0 PLL.mif CMU0 PLL CMU0 PLL.mif logical tx pll logical_tx_pll_sel[1:0].mif logical_tx_pll_sel_en 1'b0 logical_channel_address CMU0 PLL CMU0 PLL.mif logical tx pll logical_tx_pll_sel[1:0] logical_channel_address CMU0 PLL.mif logical tx pll CMU0 PLL CMU0 PLL.mif Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 111 Channel Reconfiguration with TX PLL Select TX PLL.mif CMU0 PLL 0 CMU0 PLL 0 logical tx pll = 0.mif Channel Reconfiguration with TX PLL Select.mif CMU1 PLL CMU0 PLL.mif CMU0 PLL.mif logical tx pll logical_tx_pll_sel[1:0].mif logical_ tx_pll_sel_en 1'b0 logical_channel_address CMU0 PLL CMU0 PLL.mif logical tx pll logical_tx_pll_sel[1:0] logical_ channel_address CMU0 PLL.mif logical tx pll CMU0 PLL CMU0 PLL ALTGX MegaWizard Plug-In Manager Reconfig Clks Reconfig Clks 10 1 10 1 2 3 4 5 6 7 8 9 10.mif.mif 2 ALTGX 5 32.mif

5 112 5 Stratix IV 5 32. ( / ) ALTGX ALTGX ALTGX 1 ALTGX 2 General What is the number of channels? Reconfig Enable Channel and Transmitter PLL Reconfiguration Reconfig Use alternate Transmitter PLL 1 ALTGX 1 General PLL 3.125 Gbps PLL PLL 156.25 MH ALTGX 1 PLL 2Gbps PLL Use alternate Transmitter PLL TX PLL Select PLL 2Gbps PLL 0 PLL 125 MH 1 ALTGX 2 General PLL 1Gbps PLL PLL 125 MH ALTGX 2 PLL 1.250 Gbps PLL Use alternate Transmitter PLL TX PLL Select PLL 1.250 Gbps PLL 1 PLL 156.25 MH Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 113 5 32. ( / ) Reconfig Clks What is the main transmitter PLL logical reference index? Reconfig Clks What is the selected input clock source for the Transmitter PLL and Receiver PLL? Reconfig Clks What is the selected input clock source for the alternate transmitter PLL? ALTGX ALTGX ALTGX 1 ALTGX 2 ALTGX MegaWizard Plug-In Manager PLL PLL PLL 1 ALTGX 1 PLL 156.25 MH 156.25 MH 2 156.25 MH 125 MHz 1 2 2 PLL 156.25 MH ID 2 PLL 125 MHz ID 1.mif Quartus II ALTGX 1.mif 5 68.mif Quartus II.mif ALTGX_instance1.mif ALTGX MegaWizard Plug-In Manager PLL PLL PLL 0 ALTGX 2 PLL 125 MH 125 MH 2 156.25 MH 125 MHz 1 2 1 PLL 125 MH ID 2 PLL 156.25 MHz ID 1 Quartus II ALTGX 2.mif 5 68.mif Quartus II.mif ALTGX_instance2.mif 2.mifs.mifs 5 54 2 PLL

5 114 5 Stratix IV 5 54. Based on what you have set up as the input clock source for CMU0 PLL, this clock mux selects the corresponding input clock source for CMU0 PLL. Refclk0 (Identification number = 2) 156.25 MHz 125MHz Refclk1 (Identification number = 1) clock mux CMU Channels 3.125 Gbps CMU0 PLL 1 Gbps Logical TX PLL select full duplex transceiver channel 1 TX CHANNEL 1 LOCAL DIVIDER 3.125 Gbps digital+analog logic clock mux CMU1 PLL RX CHANNEL 1 clock mux 3.125 Gbps 3.125 Gbps RX PLL digital+analog logic Based on what you have set up as the input clock source for CMU1 PLL, this clock mux selects the corresponding input clock source for CMU1 PLL. full duplex transceiver channel 2 TX CHANNEL 2 Logical TX PLL select LOCAL DIVIDER 1 Gbps digital+analog logic RX CHANNEL 2 clock mux 1 Gbps 1 Gbps RX PLL digital+analog logic Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 115 : ALTGX_RECONFIG : ALTGX_RECONFIG ALTGX 5 33 5 33. 1 2 3 4 5 6 ALTGX PMA 5 52 1 1 ALTGX PMA 5 52 1 ALTGX HDL ALTGX PMA 5 54 2.mif 4 2 1 CMU PLL CMU PLL.mif GIGE SONET/SDH OC48 1: ALTGX 5 ALTGX 1 3 ALTGX 2 2 ALTGX 1 ALTGX1 ALTGX2 1 ALTGX ALTGX 1 1 V OD PMA tx_vodctrl ALTGX 2 2 PMA rx_eqctrl

5 116 5 Stratix IV : ALTGX_RECONFIG 5 55 ALTGX 1 ALTGX 2 ALTGX_RECONFIG 5 55. 1 PMA Set the What is the number of channels controlled by the reconfig controller? option = 12 Set the What is the starting channel number? option = 0 reconfig_clk read ALTGX Instance 1 (Number of Channels is 5) reconfig_fromgxb1[33:0] write_all reconfig_fromgxb[3:0] tx_vodctrl [2:0] rx_eqctrl [3:0] reconfig_fromgxb[50:0] (1) ALTGX_RECONFIG Instance data_valid busy Set the What is the starting channel number? option = 8 rx_tx_duplex_sel[1:0] ALTGX Instance 2 (Number of Channels is 3) reconfig_fromgxb2[16:0] logical_channel_address[3:0] 5 55 : (1) reconfig_fromgxb[50:0] = {reconfig_fromgxb2[16:0], reconfig_fromgxb1[33:0]}. 5 34 1 ALTGX ALTGX_RECONFIG 5 34. 1 ALTGX ALTGX_RECONFIG ( / ) ALTGX ALTGX_RECONFIG ALTGX ALTGX 1 ALTGX 2 General What is the number of channels? Reconfig What is the starting channel number? 5 22 5 0 1 5 0 1 2 3 4 3 8 1 3 8 9 10 ALTGX_RECONFIG Reconfiguration settings What is the number of channels controlled by the reconfig controller? 5 34 ALTGX_RECONFIG Analog controls Use the 'logical_ channel_address' port for Analog controls reconfiguration ALTGX_RECONFIG 1 10 4 12 ALTGX_RECONFIG MegaWizard Plug-In Manager logical_channel _address[3:0] Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 117 : ALTGX_RECONFIG 5 34. 1 ALTGX ALTGX_RECONFIG ( / ) ALTGX ALTGX_RECONFIG ALTGX ALTGX 1 ALTGX 2 Reconfig Analog controls (VOD, Pre-emphasis, and Manual Equalization) reconfig_fromgxb1 reconfig_fromgxb2 reconfig_fromgxb1 34 2 * 17 ALTGX_RECONFIG rx_tx_duplex_sel Error checks/data rate switch RX only TX only Duplex Analog controls reconfig_fromgxb2 reconfig_fromgxb 17 1 * 17 ALTGX ALTGX_RECONFIG ALTGX_RECONFIG 1 ALTGX_RECONFIG MegaWizard Plug-In Manager rx_tx_duplex_se l[1:0] tx_vodctrl rx_eqctrl tx_vodctrl 3 rx_eqctrl 4 reconfig_fromgxb 51 3*17 12 3 1. ALTGX 1 reconfig_fromgxb1[33:0] ALTGX_RECONFIG reconfig_fromgxb [33:0] 2. ALTGX 2 reconfig_fromgxb2[16:0] ALTGX_RECONFIG reconfig_fromgxb[50:34] 3. ALTGX_RECONFIG reconfig_togxb[3:0] ALTGX 1 ALTGX 2 reconfig_togxb[3:0] 5 39 reconfig_fromgxb reconfig_togxb 1 PMA tx_vodctrl rx_eqctrl 1 PMA 5 52 1 5 56

5 118 5 Stratix IV : ALTGX_RECONFIG 2: 2 ALTGX 2 ALTGX_RECONFIG 2 5 ALTGX 1 3 ALTGX 2 2 ALTGX 5 56 ALTGX 1 ALTGX_RECONFIG 1 ALTGX 2 ALTGX_RECONFIG 2 5 56. 2 PMA Set the What is the number of channels controlled by the reconfig controller? option = 8 Set the What is the starting channels number? option = 0 reconfig_clk read write_all tx_vodctrl [2:0] reconfig_togxb [3:0] ALTGX Instance 1 (Number of Channels is 5) logical_channel_address [2:0] ALTGX_RECONFIG Instance 1 data_valid reconfig_fromgxb [33:0] reconfig_fromgxb [33:0] busy rx_tx_duplex_sel[1:0] Set the What is the number of channels controlled by the reconfig controller? option = 4 Set the What is the starting channels number? option = 0 reconfig_clk read write_all logical_channel_address 1:0] rx_eqctrl [3:0] ALTGX_RECONFIG Instance 2 reconfig_togxb [3:0] data_valid ALTGX Instance 2 (Number of Channels is 3) reconfig_fromgxb [16:0] reconfig_fromgxb [16:0] busy rx_tx_duplex_sel[1:0] ALTGX 1 2 V OD PMA ALTGX 2 3 PMA Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 119 : ALTGX_RECONFIG 5 35 2 ALTGX ALTGX_RECONFIG 5 35. 2 ALTGX ALTGX_RECONFIG ALTGX ALTGX_RECONFIG ALTGX ALTGX 1 ALTGX 2 General What is the number of channels? Reconfig What is the starting channel number? 5 22 Reconfig Analog controls (VOD, Pre-emphasis, and Manual Equalization) reconfig_fromgxb 5 0 1 5 0 1 2 3 4 reconfig_fromgxb 34 2*17 3 0 1 3 0 1 2 reconfig_fromgxb 17 1*17 ALTGX_RECONFIG Reconfiguration settings What is the number of channels controlled by the reconfig controller? 5 34 ALTGX_RECONFIG Analog controls Use 'logical_ channel_address' port for Analog controls reconfiguration rx_tx_duplex_sel Error checks/data rate switch RX only TX only Duplex Analog controls reconfig_fromgxb ALTGX_RECONFIG 1 4 4 8 ALTGX_RECONFIG MegaWizard Plug-In Manager logical_channel _address[3:0] ALTGX_RECONFIG MegaWizard Plug-In Manager rx_tx_duplex_se l[1:0] tx_vodctrl tx_vodctrl 3 reconfig_fromgxb 34 2*17 8 3

5 120 5 Stratix IV : ALTGX_RECONFIG ALTGX ALTGX_RECONFIG 1. ALTG reconfig_fromgxb ALTGX_RECONFIG 5 56 2. ALTGX_RECONFIG reconfig_togxb ALTGX 1 ALTGX 1 tx_vodctrl PMA ALTGX_RECONFIG 1 1 PMA 5 52 1 5 56 1 ALTGX 2 rx_eqctrl PMA ALTGX_RECONFIG 2 1 PMA 5 52 1 5 56 3: ALTGX 1 ALTGX_RECONFIG 5 5 1 5 1 ALTGX 5 instance1 1 ALTGX 1. ALTGX MegaWizard Plug-In Manager General What is the number of channels? 1 2. ALTGX MegaWizard Plug-In Manager Reconfig Analog controls (VOD, Pre-emphasis, and Manual Equalization) 3. reconfig_fromgxb 17 1 1 reconfig_togxb 4 4. ALTGX MegaWizard Plug-In Manager Reconfig What is the starting channel number? 0 5 22 5. Finish ALTGX 5 1 5 4 instance2 instance3 instance4 instance5 instance6 What is the starting channel number? 4 8 12 16 5 22 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 121 : ALTGX_RECONFIG ALTGX_RECONFIG 1. ALTGX_RECONFIG_MegaWizard Plug-In Manager 2. ALTGX MegaWizard Plug-In Manager Reconfiguration settings What is the number of channels controlled by the reconfig controller? 20 MegaWizard Plug-In Manager 5 reconfig_fromgxb[84:0] 3. ALTGX MegaWizard Plug-In Manager 1 4. V OD DC / V OD tx_vodctrl 60 3 tx_vodctrl [2:0] tx_vodctrl [11:3] 1 3 tx_vodctrl [14:12] 2 ALTGX ALTGX_RECONFIG 1. ALTGX reconfig_fromgxb ALTGX_RECONFIG ALTGX What is the starting channel number? 0 ALTGX reconfig_fromgxb ALTGX_RECONFIG reconfig_fromgxb LSB 2. ALTGX_RECONFIG reconfig_togxb ALTGX 2 1 tx_vodctrl 1. tx_vodctrl V OD 2 tx_vodctrl [2:0] 3'b010 2. 5 54 2 1 2 PMA tx_vodctrl [59:3] V OD 4: TX.mif 4 2 1 2 ALTGX 1 8B/10B Basic 4.25 Gbps 2 4.25 Gbps 2.125 Gbps 1062.5 Mbps ALTGX_RECONFIG 1 ALTGX 1

5 122 5 Stratix IV : ALTGX_RECONFIG 1. Receiver and Transmitter What is the number of channels? 2 Basic 2. ALTGX ALTGX_RECONFIG MegaWizard Plug-In Manager 5 36 5 36. 4 TX ( / ) ALTGX ALTGX_RECONFIG ALTGX What is the deserializer block width? What is the channel width? What is the input clock frequency? ALTGX 1 Basic Receiver and Transmitter ALTGX_RECONFIG Double-width Reconfiguration settings What is the number of channels controlled by the 4.25 Gbps Single-width reconfig controller? 3.750 Gbps 5 34 ALTGX_RECONFIG 16 32 Quartus II FPGA 25 MH 32 FPGA - 1062.5 Mbps FPGA 26.5 MH 1062.5/40 = 26.5625 106.25 MHz Reconfiguration Settings Data Rate Division in TX rate_switch_out Error checks/data rate switch ALTGX_RECONFIG 1 1 4 4 rate_switch_ctrl [1:0] 5 63 5 25 rate_switch_ ctrl [1:0] rate_switch_out [1:0] rate_switch_ ctrl [1:0] 5 34 ALTGX_RECONFIG rate_switch_ctrl [1:0].mif Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 123 : ALTGX_RECONFIG 5 36. 4 TX ( / ) ALTGX ALTGX_RECONFIG ALTGX Reconfig What is the starting channel number? 5 34 ALTGX_RECONFIG 0 1 2 0 1 reconfig_fromgxb1 reconfig_fromgxb1 17 1*17 reconfig_togxb [3:0] Reconfig Channel and Transmitter PLL Reconfiguration ALTGX 1 Basic Receiver and Transmitter reconfig_fromgxb1 [16:0] ALTGX_RECONFIG reconfig_ fromgxb [16:0] reconfig_togxb[3:0] ALTGX 1 ALTGX_RECONFIG 1 ALTGX_RECONFIG ALTGX_RECONFIG logical_channel_address [1:0] logical_channel_ address [1:0] reconfig_fromgxb reconfig_fromgxb 17 1*17 4 1 reconfig_togxb [3:0] Error checks/data rate switch Use the rx_tx_duplex_sel port to enable RX only, TX only, or duplex configuration ALTGX_RECONFIG 1 reconfig_fromgxb [16:0] ALTGX reconfig_ fromgxb1 [16:0] reconfig_togxb[3:0] ALTGX 1 ALTGX_RECONFIG 1 Data Rate Division in TX 1 1 106.25 MH 1 ALTGX_RECONFIG FPGA 5 132 ALTGX_RECONFIG MegaWizard Plug-In Manager 5: Transmitter Only ALTGX CMU PLL Reconfiguration 4 Transmitter onlyaltgx 4 Basic 2.5 Gbps 4 CMU0 PLL

5 124 5 Stratix IV : ALTGX_RECONFIG CMU0 PLL 100 MH 4 2 Gbps 5 57 5 57. CMU PLL CMU Channels refclk0 refclk1 100 MHz 125 MHz clock mux 2 Gbps CMU0 PLL TX only CHANNEL 1 Logical TX PLL select Local Divider 6.25 Gbps digital+analog logic clock mux 2.5 Gbps CMU1 PLL TX only CHANNEL 2 Logical TX PLL select Local Divider 6.25 Gbps digital+analog logic TX only CHANNEL 3 Logical TX PLL select Local Divider 6.25 Gbps digital+analog logic TX only CHANNEL 4 Logical TX PLL select Local Divider 6.25 Gbps digital+analog logic Blocks reconfigured using CMU PLL Reconfiguration mode CMU0 PLL 2 Gbps CMU0 PLL 4.mif 5 37.mif 5 37. CMU PLL ( / ) ALTGX ALTGX_RECONFIG ALTGX What is the effective data rate? 4 TX Only ALTGX_RECONFIG 2000 Gbps Channel and TX PLL select/reconfig ALTGX_RECONFIG Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 125 : ALTGX_RECONFIG 5 37. CMU PLL ( / ) ALTGX ALTGX_RECONFIG ALTGX Enable Channel and Transmitter PLL Reconfiguration Enable Channel and Transmitter PLL Reconfiguration What is the main transmitter PLL reference index? How many input clocks? What is the selected input clock source for the Transmitter PLL and Receiver PLL? What is clock 0 input frequency? 4 TX Only 1 2 1 125 MHz ALTGX_RECONFIG Use reconfig_address_en ALTGX_RECONFIG.mif 5 104 CMU PLL Reconfiguration 6: GIGE SONET/SDH OC48 FPGA - ALTGX MegaWizard Plug-In Manager GIGE SONET/SDH OC48 2 5 37 5 38. GIGE SONET/SDH OC48 GIGE SONET/SDH OC48 1 FPGA - 8 16 2 8B/10B 3 4 5 tx_dataout tx_clkout rx_clkout 6 1.25 Gbps 2.488 Gbps 7 62.5 MHz 125 MHz 8 PCS-PMA 10 8B/10B 77.76 MHz 155.52 MHz 311.04 MHz 622.08 MHz 8

5 126 5 Stratix IV : ALTGX_RECONFIG ALTGX MegaWizard Plug-In Manager 2 FPGA 5 58 5 58. GIGE SONET/SDH OC48 User Logic in the FPGA fabric Transceiver Instances User logic for GIGE and SONET/SDH datapath Reset Control Logic ALTGX Instance Memory 1 containing the GIGE.mif Memory 2 containing the SONET/ SDH.mif User control logic to control the ALTGX_RECONFIG instance Dynamic Reconfiguration Controller (ALTGX_RECONFIG) 4 I ALTGX GIGE SONET/SDH OC48.mif ALTGX_RECONFIG II ALTGX_RECONFIG III GIGE SONET/SDH 5 37 2 IV I.mif ALTGX GIGE SONET/SDH OC48.mif 1. GIGE ALTGX MegaWizard Plug-In Manager GIGE ALTGX GIGE_GXB 5 39 GIGE_GBX 2. GIGE GXB ALTGX_RECONFIG Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 127 : ALTGX_RECONFIG 3. GIGE_GXB.mif Quartus II GIGE.mif Quartus II GIGE.mif GIGE_GXB.mif GIGE 4. SONET/SDH OC48 ALTGX SONET_GXB 5. SONET_GXB.mif Quartus II Quartus II SONET/SDH OC48.mif SONET_GXB.mif SONET/SDH 6. 2.mif ALTGX_RECONFIG.mif 5 39 GIGE 1 ALTGX 5 39. 1: GIGE ALTGX ( / ) ALTGX MegaWizard Plug-In Manager General Which protocol will you be using? PLL/Ports Optional Ports Reconfig Analog controls (VOD, Pre-emphasis, and Manual Equalization) Enable Channel and Transmitter PLL Reconfiguration Channel Interface GIGE rx_digitalreset tx_digitalreset rx_analogreset rx_pll_locked rx_freqlocked ALTGX Stratix IV Volume 2 Stratix IV PMA Analog PMA controls PMA 5 50 PMA GIGE SONET/SDH OC48 tx_datainfull [43:0] rx_dataoutfull[63:0] FPGA - GIGE SONET/SDH 5 125 5 38 8 tx_datainfull[43:0] rx_datainfull[63:0] 5 88 5 29 5 91 5 30

5 128 5 Stratix IV : ALTGX_RECONFIG 5 39. 1: GIGE ALTGX ( / ) ALTGX MegaWizard Plug-In Manager Use alternate Transmitter PLL What is the protocol to be reconfigured to? What is the subprotocol to be reconfigured to? What is the input clock frequency? What is the alternate Transmitter PLL bandwidth mode? What is the alternate transmitter PLL logical reference index? Reconfig 2 How should the receivers be clocked? How should the transmitters be clocked? Check a control box to use the corresponding control port: SONET/SDH OC48 2 PLL 2 PLL GIGE SONET/SDH OC48 5 125 5 38 6 7 SONET/SDH sub protocol OC48 input clock frequency alternate transmitter PLL bandwidth mode SONET/SDH OC48 5 125 5 38 7 1 0 Quartus II SONET/SDH OC48 PLL MUX GIGE SONET/SDH OC48 SONET/SDH OC48 1 GIGE 0 2 Use the respective channel core clocks rx_clkout 2 5 125 5 38 5 FPGA ALTGX SONET/SDH rx_clkout GIGE tx_clkout 1 1 Reconfig Channel interface SONET/SDH OC48 rx_byteorderalignstatus rx_a1a2sizeout rx_byteorderalignstatus SONET/SDH OC48 FPGA GIGE ALTGX Stratix IV Volume 2 Stratix IV MegaWizard Plug-In Manager Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 129 : ALTGX_RECONFIG 2 GIGE ALTGX_RECONFIG 1. What is number of channels controlled by the reconfig controller? 1 2. Analog controls PMA 3. Channel reconfiguration with TX PLL select/reconfig 4. screen 1 Analog controls 1 Stratix IV Volume 3 ALTGX_RECONFIG 5. ALTGX_RECONFIG MegaWizard Plug-In Manager 3 GIGE.mif ALTGX GIGE pll_inclk rx_cruclk SONET/SDH OC48 pll_inclk_altrx_cruclk_ alt 1. GIGE ALTGX MegaWizard Plug-In Manager Quartus II GIGE pll_inclk rx_cruclk 2. ALTGX cal_blk_clk 1 cal_blk_clk Stratix IV Volume 2 Stratix IV GX 3. tx_dataout rx_datain Quartus II.mif ALTGX 4. pll_inclk,rx_cruclk,pll_inclk_alt, rx_cruclk_alt ALTGX tx_dataout rx_datain Quartus II.mif.mif Quartus II reconfig_mif.mif.mif SONET/SDH.mif.mif

5 130 5 Stratix IV : ALTGX_RECONFIG 4 SONET/SDH OC48 ALTGX 1. SONET/SDH OC48.mif GIGE ALTGX SONET RTL 2. ALTGX Which protocol you will be using? SONET/SDH sub protocol OC48 GIGE 3. Reconfig Channel Interface alternate reference clock protocol GIGE General GIGE 4. logical reference clock index GIGE 5. 5 SONET/SDH OC48.mif 1. RTL pll_inclk rx_cruclk SONET/SDH OC48 pll_ inclk_alt rx_cruclk_alt GIGE Quartus II.mif /reconfig_mif 6.mif 2.mif ALTGX_RECONFIG 1..mif 2 Stratix IV GX RAM/ROM 2.mifs II GIGE SONET/SDH PMA Channel and CMU PLL ALTGX_RECONFIG III GIGE SONET/SDH OC48 ALTGX MegaWizard Plug-In Manager tx_datainfull[43:0] rx_dataoutfull[63:0] rx_byteorderalignstatus rx_a1a2size FPGA GIGE SONET/SDH OC48 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 131 : ALTGX_RECONFIG 5 40 GIGE SONET/SDH OC48 tx_datainfull[43:0] rx_dataoutfull[63:0] 5 40. FPGA - GIGE SONET/ SDH OC48 GIGE tx_datainfull[7:0] 8 tx_datainfull[8] tx_ctrlenable K/D rx_dataoutfull[7:0] 8 rx_dataoutfull[8] rx_ctrldetect K/D rx_dataoutfull[9] rx_errdetect rx_dataoutfull[10] rx_syncstatus rx_dataoutfull[11] rx_disperr rx_dataoutfull[12] rx_patterndetect SONET/SDH OC48 tx_datainfull[7:0] LSB tx_datainfull[29:22] MSB rx_dataoutfull[7:0] LSB rx_dataoutfull[29:22] MSB rx_dataoutfull[10], rx_syncstatus[1:0] rx_dataoutfull[42] rx_dataoutfull[12], rx_dataoutfull[44] rx_patterndetect[1:0] SONET/SDH OC48 GIGE FPGA tx_clkout GEGE ALTGX tx_clkout SONET/SDH OC48 rx_clkout FPGA 2 GIGE SONET/SDH OC48 IV - FPGA f Stratix IV Volume 2 1 PMA VOD DC FPGA

5 132 5 Stratix IV ALTGX_RECONFIG MegaWizard Plug-In Manager.ram 16 Intel.hex.mif.hex Quartus II.mif.hex.hex ALTGX_RECONFIG MegaWizard Plug-In Manager ALTGX_RECONFIG MegaWizard Plug-In Manager Error checks/data rate switch Enable illegal mode checking Enable self recovery error error Enable illegal mode checking 2 reconfig_clk busy error 2 reconfig_clk PMA ALTGX_RECONFIG rx_eqctrl_out rx_eqdcgain_out tx_vodctrl_out tx_preemp_0t_out tx_preemp_1t_out tx_preemp_2t_out read PMA ALTGX_RECONFIG rx_eqctrl rx_eqdcgain tx_vodctrl tx_preemp_0t tx_preemp_1t tx_preemp_2t write_all Enable self recovery error High TX Data Rate Switch using Local Divider-read operation - 2 PMA controls reconfiguration mode TX Data Rate switch using Local Divider TX Data Rate Switch using Local Divider-write operation with unsupported value : rate_switch_ctrl[1:0] 11 reconfig_mode_sel[2:0]4 Reconfiguration settings write_all TX Data Rate Switch using Local Divider-write operation without input port : rate_switch_ctrl[1:0] reconfig_mode_sel[2:0] 4 Reconfiguration settings write_all TX Data Rate Switch using Local Divider-read operation without output port : rate_switch_out[1:0] reconfig_mode_sel[2:0] 4 Reconfiguration settings read Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 133 Channel and/or TX PLL reconfiguration-read operation : reconfig_mode_sel[2:0] 1 4 5 6 read tx_dataout rx_datain Quartus II Quartus II ALTGX MegaWizard Plug-In Manager Reconfig ALTGX MegaWizard Plug-In Manager Reconfig Analog controls (VOD, Pre-emphasis, and Manual Equalization) ALTGX_RECONFIG ALTGX_RECONFIG 1 2 f ALTGX Stratix IV Volume 2 Transmitter Only Receiver Only Receiver only Transmitter only Receiver only ALTGX_ RECONFIG Receiver only Transmitter only ALTGX_RECONFIG Transmitter only Transmitter only Receiver only ALTGX MegaWizard Plug-In Manager Reconfig

5 134 5 Stratix IV 1 Transmitter only Receiver only Channel and CMU PLL Reconfiguration Quartus II Channel and CMU PLL reconfiguration : GXB TX PLL 5 59 Channel and CMU PLL Reconfiguration tx_dataout Quartus II Stratix IV GX 1 TX PLL reconfig 5 59. Channel and CMU PLL Reconfiguration Channel and CMU PLL Reconfiguration 2 tx_dataout_ch0 tx_dataout_ch1 5 41 5 42 5 41. tx_dataout_ch0 Assignment Setting To: tx_dataout_ch0 Assignment Name: GXB TX PLL Reconfiguration group setting Value: 0 5 42. tx_dataout_ch1 Assignment Setting To: tx_dataout_ch1 Assignment Name: GXB TX PLL Reconfiguration group setting Value: 0 Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 135 FPGA- 2 PLL PLL 1 Receiver and Transmitter Transmitter Only ALTGX PLL ALTGX1: Receiver and Transmitter 1 PLL tx pll 0 6.25 Gbps PLL 2.500 Gbps ALTGX2: Receiver and Transmitter 1 1 PLL tx pll 0 6.25 Gbps ALTGX 2 1 PLL ALTGX 1 ALTGX 2 2 PLL 2.500 Gbps ALTGX 2 1 PLL 1 PLL ALTGX Receiver and Transmitter Transmitter Only ALTGX 2 tx pll ALTGX1: Receiver and Transmitter 1 3.125 Gbps ALTGX2: Receiver and Transmitter 1 2.500 Gbps ALTGX 1 What is the main transmitter PLL logical reference index? Reconfig Clks 0 ALTGX 2 1 Quartus II 2 PLL 2 ALTGX tx pll FPGA- FPGA- busy PMA 1 2 PMA busy reconfig_clk 5 51 PMA

5 136 5 Stratix IV FPGA- 1 PMA 1 logical_channel_address PMA 260reconfig_clk busy tx_preemp_1t (pre-emphasis control first post-tap) tx_vodctrl (voltage output differential) rx_eqctrl (equalizer control) rx_eqdcgain (equalizer DC gain) PMA 520reconfig_clk busy tx_preemp_0t (pre-emphasis control pre-tap) tx_preemp_2t (pre-emphasis control second post-tap) PMA 130reconfig_clk busy busy Low data_valid tx_preemp_1t_out (pre-emphasis control first post-tap) tx_vodctrl_out (voltage output differential) rx_eqctrl_out (equalizer control) rx_eqdcgain_out (equalizer DC gain) PMA 260reconfig_clk busy busy Low data_valid tx_preemp_0t_out (pre-emphasis control pre-tap) tx_preemp_2t_out (pre-emphasis control second post-tap) 2 PMA 2 logical_channel_address PMA 260reconfig_clk busy tx_preemp_1t (pre-emphasis control first post-tap) tx_vodctrl (voltage output differential) rx_eqctrl (equalizer control) rx_eqdcgain (equalizer DC gain) PMA 520reconfig_clk busy tx_preemp_0t (pre-emphasis control pre-tap) tx_preemp_2t (pre-emphasis control second post-tap) Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation

5 Stratix IV 5 137 FPGA- PMA 130reconfig_clk busy busy Low data_valid tx_preemp_1t_out (pre-emphasis control first post-tap) tx_vodctrl_out (voltage output differential) rx_eqctrl_out (equalizer control) rx_eqdcgain_out (equalizer DC gain) PMA 260reconfig_clk busy busy Low data_valid tx_preemp_0t_out (pre-emphasis control pre-tap) tx_preemp_2t_out (pre-emphasis control second post-tap) busy reconfig_clk Low 70reconfig_clk 1 7872 reconfig_clk 7924 reconfig_clk 50 + 2 + 7872 busy Low 1 PMA ALTGX ALTGX_RECONFIG Channel and TX PLL Select/Reconfig 5 43 CMU PLL reconfig_clk 5 43. CMU PLL CMU PLL CMU PLL CMU PLL reconfig_clk 1690 5181 6861 970 2650 7850

5 138 5 Stratix IV ALTGX_RECONFIG ALTGX_RECONFIG MegaWizxard Plug-In Manager LE PMA ALTGX_RECONFIG MegaWizard Plug-In Manager 1 LE tx_vodctrl 43 130 5 60 ALTGX_RECONFIG MegaWizard Plug-In Manager 5 60. ALTGX_RECONFIG MegaWizard Plug-In Manager ALTGX_RECONFIG ALTGX_instance/ALTGX 16reconfig_clk gxb_powerdown Stratix IV Device Handbook Volume 2 2009 3 Altera Corporation