1. (FFT) LTE 1) FFT, DSP. FFT Airoldi, R 9 NoC(Network on Chip) 64 FFT 2) Long Chen IBM Cyclops-64 FFT 3) FFT FFT Franchetti, F DFT FFT 4)5) FFT FFT F
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1 FFT (FFT) LTE FFT FFT false sharing OSCAR FFT 8 SH4A RP2 256 FFT FFT Automatic Parallelization of Small Point FFT on Multicore Processor Yuuki Furuyama 1 Hiroki Mikami 1 Keiji Kimura 1 Hironori Kasahara 1 Abstract: Fast Fourier Transorm (FFT) is one of the most frequently used algorihtms in many applications including digital signal processing and image processing to compute Descrite Fourier Transform (DFT). Although small size FFT programs must be used in baseband signal processing such as LTE and so on, it s difficult to use special hardwares like DSPs for computing such a small problem because of their relatively large data transfer and control overhead. This paper proposes an automatic parallelization method to generate parallelized programs with low overhead for small size FFTs suited for shared memory multicore processor by applying cache optimization to avoide false sharing between cores. The proposed method has been implemented in OSCAR automatic parallelizing compiler, parallelized small point FFT programs from 32 points to 256 points and evaluated them on RP2 multicore processor having 8 SH-4A cores. It achieved 1.97 times speedup on 2 SH-4A cores and 3.9 times speedup on 4 SH-4A cores in a 256 points FFT program. In addition to the FFT programs, the proposed approach is applied to Fast Hadamard Transform (FHT) which has similar computation to the FFT. The results are 1.91 times speedup on 2 SH-4A cores and 3.32 times speedup on 4 SH-4A cores. It shows effectiveness of the proposed method and easiness of applying the method to many kinds of programs. 1 Waseda University c 2012 Information Processing Society of Japan 1
2 1. (FFT) LTE 1) FFT, DSP. FFT Airoldi, R 9 NoC(Network on Chip) 64 FFT 2) Long Chen IBM Cyclops-64 FFT 3) FFT FFT Franchetti, F DFT FFT 4)5) FFT FFT FFT FFT false sharing FFT 2 FFT 3 FFT 4 3 OSCAR (FFT), O(N) (DFT) O(NlogN). N a k(0 k N 1) c k(0 k N 1) DFT (1). c k = N 1 a j exp( 2πijk/N) (1) (1) 2 k (2), (3) N = N/2 e j = a 2j o j = a 2j+1 ω jk = exp( 2πijk/N ) c k = c k+n = N/2 1 N/2 1 N/2 1 e j ω jk + exp( 2πik/N) N/2 1 e j ω jk exp( 2πik/N) o j ω jk (2) o j ω jk (3) (2) (3) (1) N DFT 2/N DFT 2/N DFT exp( 2πik/N) DFT DFT 1 Cooley-Tukey FFT 6) 8 FFT 1 1 Cooley-Tukey FFT FFT in-place FFT 7) FFT 2 2 FFT 4 4 FFT 4 FFT 2 FFT FFT 8) c 2012 Information Processing Society of Japan 2
3 a 0 ステージ1 ステージ2 ステージ3 c 0 DOALL a 1 c 4 3. FFT a 2 a 3 a 4 a 5 c 2 c 6 c 1 c 5 FFT false sharing a 6 a FFT FFT N r-fft k(k = 1, 2,... log 2 N) s k s k = N/r k 128 FFT 2 3 ステージ1 入 力 配 列 ステージ2 入 力 配 列 ステージ3 入 力 配 列 /01/14 Waseda University Confidential 1 2 /* 1 */ c 3 c 7 バタフライ イタレーション 1 バタフライ イタレーション 2 バタフライ 演 算 128 4FFT for (i = 0; i < 1; i++) for (j = 0; j < 32; j++) butterfly(a[j+0],a[j+32],a[j+64],a[j+96]); 3.1 FFT 2.2 FFT DOALL DOALL FFT FFT FFT 1 FFT FFT 4 /* 2 */ for (i = 0; i < 4; i++) for (j = 0; j < 8; j++) butterfly(a[i*8+j+0],a[i*8+j+8],a[i*8+j+16],a[i*8+j+24]); /* 3 */ for (i = 0; i < 16; i++) for (j = 0; j < 2; j++) butterfly(a[i*2+j+0],a[i*2+j+2],a[i*2+j+4],a[i*2+j+6]); FFT 割 当 PE PE0 PE1 PE2 ステージ1 PE3 入 力 配 列 ステージ2 入 力 配 列 ステージ3 入 力 配 列 FFT - 2 FFT /12/3 Waseda University Confidential 1 n FFT N p 1 (4) n = (p 1)N p 2 (4) c 2012 Information Processing Society of Japan 3
![7 バタフライ イタレーション 1 バタフライ イタレーション 2 バタフライ 演 算 128 4FFT for (i = 0; i < 1; i++) for (j = 0; j < 32; j++) butterfly(a[j+0],a[j+32],a[j+64],a[j+96]); 3.1 FFT 2.](/docs-images/43/23145251/images/page_3.jpg "2 FFT DOALL DOALL - 128 FFT 1 32 32 8 128 FFT FFT 1 FFT 2 1-2 4-128 FFT 4 /* 2 */ for (i = 0; i < 4; i++) for (j = 0; j < 8; j++) butterfly(a[i*8+j+0],a[i*8+j+8],a[i*8+j+16],a[i*8+j+24]); /* 3 */ for")
4 3.2 in-place FFT false sharing Cooley-Tukey in-place FFT false sharing invalidate FFT false sharing N r FFT k(k = 1, 2,... log 2 N) N/r k FFT b p c false sharing 1 (5) 2 (6) N r k b = c j (j : Z) (5) p N b = c j (j : Z) (6) rk FFT 1 (5) (6) 2Byte 32/64/128/256 FFT FFT false sharing 1 32Byte 1 FFT false sharing 2PE 4PE 32 1 (false sharing ) 2 (false sharing ) FFT 4 false sharing 256 FFT false sharing 3.3 false sharing 3.2 false sharing false sharing false sharing false sharing FFT 4PE 5 1 false sharing 1 2 ステージ1の 入 力 配 列 ステージ1の 出 力 配 列 PE0 PE1 PE2 PE ステージ2の 入 力 配 列 ステージ2の 出 力 配 列 PE0 PE1 PE2 PE false sharing FFT N r FFT k(k = 1, 2,... log 2 N) N/r k i p k false sharing k (7) (7) k k i + i (i mod N r k p ) i + N r k (i mod N r k p ) + i + 2N r k (i mod N... (r 1)N r k (i mod r k p ) + N r k p 2N r k p N (r 1)N r k ) + p r k p (7) (7) false sharing c 2012 Information Processing Society of Japan 4
5 k k OSCAR FFT FFT OSCAR OSCAR 9) 4 2 FFT 6 void fft(int16* fftin_i, Int16* fftin_q) { /* 4 FFT */ for(i=0;i<num_rx4;i++){ for(;j<num_rot;j++){ for(k=0;k<num_btf;k++){ butterfly(fftin_i[a], fftin_i[b], fftin_i[c], fftin_i[d]); num_rot<<=2; num_btf>>=2; /* 2 FFT */ for(i=0;i<num_rx2;i++){ for(;j<num_btf;j++){ butterfly(fftin_i[a], fftin_i[b]); FFT 4.1 FFT 6 FFT false sharing 1 FFT FFT FFT 4.2 false sharing false sharing (5) (6) false sharing false sharing FFT FFT 4.3 false sharing false sharing false sharing false sharing k k + 1 (7) OSCAR 7 7 NEWA00001 NEWA00002 /* 4FFT 1 */ for (j = 0; j < 32; j++) { /* */ x0re=fftin_i[a]+b2re; x0im=fftin_q[a]+b2im; butterfly(x0re, x0im,...); /* */ NEWA00001[k_NO76 % 8 + k_no76 / 8 * 32]=(Int16)(b0re>>1); NEWA00002[k_NO76 % 8 + k_no76 / 8 * 32]=(Int16)(b0im>>1); /* 4FFT 2 */ for (j = 0; j < 4; j++) { for (k = 0; k < 8; k++) {... 7 /* */ x0re=newa00001[8 * j_no77 + k_no78]+b2re; x0im=newa00002[8 * j_no77 + k_no78]+b2im; butterfly(x0re, x0im,...); /* */ ps2_fftin_i[index_a]=(int16)(b0re>>1); ps2_fftin_q[index_a]=(int16)(b0im>>1); OSCAR FFT 5. FFT OSCAR RP2 c 2012 Information Processing Society of Japan 5
![fftin_i[c], fftin_i[d]); num_rot<<=2; num_btf>>=2; /* 2 FFT */ for(i=0;i<num_rx2;i++){ for(;j<num_btf;j++){ butterfly(fftin_i[a], fftin_i[b]); 6 4 2 FFT 4.1 FFT 6 FFT false sharing 1 FFT FFT FFT 4.](/docs-images/43/23145251/images/page_5.jpg "2 false sharing false sharing (5) (6) false sharing false sharing FFT FFT 4.")
6 5.1 RP2 RP2 SH-4A RP2 8 32Byte 16KB 16KB RP MHz 600MHz 8 RP2 void fht(int16* CQI_MtrFHT, Int32 u4_num_stg) { /* 4 FHT */ for (i = 0; i < num_rx4; i++) { for (j = 0; j < num_rot; j++) { for (k = 0; k < num_btf; k++) { index_a = a+k+(num_btf+(btf_stp2>>1))*j; index_b = b+k+(num_btf+(btf_stp2>>1))*j; index_c = c+k+(num_btf+(btf_stp2>>1))*j; index_d = d+k+(num_btf+(btf_stp2>>1))*j; x0 = CQI_MtrFHT[index_a] + CQI_MtrFHT[index_c]; x2 = CQI_MtrFHT[index_a] - CQI_MtrFHT[index_c]; x1 = CQI_MtrFHT[index_b] + CQI_MtrFHT[index_d]; x3 = CQI_MtrFHT[index_b] - CQI_MtrFHT[index_d]; CQI_MtrFHT[index_a] = (Int16)(x0 + x1); CQI_MtrFHT[index_b] = (Int16)(x0 - x1); CQI_MtrFHT[index_c] = (Int16)(x2 + x3); CQI_MtrFHT[index_d] = (Int16)(x2 - x3); /* 2 FHT */ for (i = 0; i < num_rx2; i++) { for (j = 0; j < num_btf; j++) { x0 = CQI_MtrFHT[a + 2 * j] + CQI_MtrFHT[b + 2 * j]; x1 = CQI_MtrFHT[a + 2 * j] - CQI_MtrFHT[b + 2 * j]; CQI_MtrFHT[a + 2 * j] = (Int16)x0; CQI_MtrFHT[b + 2 * j] = (Int16)x1; 9 false sharing 5.2 FFT ( ) 4 2 FFT FFT 2 FFT (FHT) 速 度 向 上 率 PE 2PE 4PE ポイント 64ポイント 128ポイント 256ポイント RP FFT RP FFT FFT FFT FFT load ( ) 14 1 load 4 2(re/im) + 2 load 2(re/im) 3(other 3 cores) = 14 c 2012 Information Processing Society of Japan 6
![d+k+(num_btf+(btf_stp2>>1))*j; x0 = CQI_MtrFHT[index_a] + CQI_MtrFHT[index_c]; x2 = CQI_MtrFHT[index_a] - CQI_MtrFHT[index_c]; x1 = CQI_MtrFHT[index_b] + CQI_MtrFHT[index_d]; x3 = CQI_MtrFHT[index_b]](/docs-images/43/23145251/images/page_6.jpg "- CQI_MtrFHT[index_d]; CQI_MtrFHT[index_a] = (Int16)(x0 + x1); CQI_MtrFHT[index_b] = (Int16)(x0 - x1); CQI_MtrFHT[index_c] = (Int16)(x2 + x3); CQI_MtrFHT[index_d] = (Int16)(x2 - x3); /* 2 FHT */ for")
7 2 128 RP2 ( s) $ (load) $ (store) 1PE PE PE (FHT) RP FHT FHT FHT false sharing OSCAR false sharing OSCAR FFT (FHT) FFT FHT PE 1 false sharing 32 (2PE) 64 (2PE/4PE) 128 (4PE) FFT 64 (2PE/4PE) 128 (4PE) FHT ( 1 ) 性 能 向 上 率 PE 4PE 速 度 向 上 率 PE 2PE 4PE ポイント 128ポイント 256ポイント RP ポイント 64ポイント 128ポイント 64ポイント 128ポイント FFT FHT 12 false sharing % % 4 49% % % 4 100% % false sharing RP2 ( s) $ (load) $ (store) 1PE PE PE SMP FFT - FFT false sharing SMP OSCAR c 2012 Information Processing Society of Japan 7
8 FFT (FHT) RP2 256 FFT FHT FFT. 1) Dung-Rung Hsieh., De-Jhen Huang., Jen-Yuan Hsu., Chieh-Yu Kao., Ming-Che Lin., Chun-Nan Liu. and Pangan Ting.: Baseband design and software-defined-radio implementation for LTE femtocell, Control Conference (ASCC), th Asian, pp. 1 6 (2013). 2) R. Airoldi., F. Garzia. and J. Nurmi.: Implementation of a 64-point FFT on a Multi-Processor Systemon-Chip, Research in Microelectronics and Electronics, PRIME Ph.D., pp (2009). 3) Long Chen., Ziang Hu., Junmin Lin. and G.R. Gao.: Optimizing the Fast Fourier Transform on a Multi-core Architecture, Parallel and Distributed Processing Symposium, IPDPS IEEE International, pp. 1 8 (2007). 4) F. Franchetti., Y. Voronenko. and M. Puschel.: FFT Program Generation for Shared Memory: SMP and Multicore, SC 2006 Conference, Proceedings of the ACM/IEEE, pp (2006). 5) Lingchuan Meng., Yevgen Voronenko., Jeremy R. Johnson., Marc Moreno Maza., Franz Franchetti. and Yuzhen Xie.: Spiral-generated Modular FFT Algorithms, Proceedings of the 4th International Workshop on Parallel and Symbolic Computation, PASCO 10, New York, NY, USA, ACM, pp (2010). 6) ( ): --, (2010). 7) K.L. Heo., J.H. Baek., M.H. Sunwoo., B.G. Jo. and B.S. Son.: New in-place strategy for a mixed-radix FFT processor, SOC Conference, Proceedings. IEEE International [Systems-on-Chip], pp (2003). 8) Eun Ji Kim. and Myung Hoon Sunwoo.: High speed eightparallel mixed-radix FFT Processor for OFDM systems, Circuits and Systems (ISCAS), 2011 IEEE International Symposium on, pp (2011). 9) KEIJI KIMURA., TAKESHI KODAKA., MOTOKI OBATA. and HIRONORI KASAHARA.: Multigrain Parallel Processing on OSCAR Chip Multiprocessor, IPSJ SIG Notes, Vol. 2002, No. 112, pp (2002). c 2012 Information Processing Society of Japan 8
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