LTC PCI Express用デュアルスロット･ホットスワップ･コントローラ

Transcription

1 PCI Express 2PCI Express Ω AUX 1μs Force On Test N MOSFET 38 QFN 36 SSOP PCI Express PC LTC4242 PCI Express LTC 4242 PCI Express 2 N LTC4242 CC EN PCI Express FAULT AUXFAULT PGOOD AUXPGOOD LT LTC LTM Hot Swap PCI Express 1

2 CC INn INn AUXINn ONn, AUXONn, FONn ENn FAULTn, PGOODn, AUXFAULTn, AUXPGOODn SENSEn GATEn OUTn (Note 3) GATEn 5 2 GATEn AUX OUTn, 3 SENSEn GATEn OUTn (Note 3)... 3 GATEn 5 to 3 GATEn LTC4242C LTC4242I SSOP QFN SSOP T JMAX = 125 C, θ JA = 95 C/W T JMAX = 125 C, θ JA = 34 C/W EXPOSED PAD (PIN 39) IS GND, PCB ELECTRICAL CONNECTION OPTIONAL ORDER PART NUMBER ORDER PART NUMBER UHF PART MARKING* LTC4242CG LTC4242IG Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: LTC4242CUHF LTC4242IUHF * 2

3 TA 25ºC CC = AUXINn = 3INn = INn = 12 (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Supplies IN Operating oltage CC 12 INn 3 INn AUXINn I DD Input Supply Current AUXONn = 2, ONn = 2 CC 12 INn 3 INn UL Supply Undervoltage Lockout CC Rising 12 INn Rising 3 INn Rising AUXINn Rising Δ LKO(HYST) Supply Undervoltage Lockout Hysteresis CC 12 INn 3 INn AUXINn Current Limit Δ SENSE(CB) Δ SENSE(ACL) Circuit Breaker Trip Sense oltage 12 INn 12 SENSEn 3 INn 3 SENSEn Active Current Limit Sense oltage 12 INn 12 SENSEn 3 INn 3 SENSEn m m I CBAUX Circuit Breaking Current for AUX Supply ma t CB Circuit Breaker Response Time μs Switch Resistance R AUX Internal Switch Resistance (Note 4) R AUX = ( AUXINn AUXOUTn )/I I = 375mA Ω External Gate Drive I GATE(UP) External N-Channel Gate Pull-Up Current Gate Drive On 12GATEn = 1 3GATEn = 1 I GATE(DN) External N-Channel Gate Pull-Down Current Gate Drive Off 12GATEn = 17, 12OUTn = 12 3GATEn = 8.3, 3OUTn = 3.3 I GATE(FPD) Δ GATE External N-Channel Gate Fast Pull-Down Current External N-Channel Gate Drive 12 GATEn 12 OUTn 3 GATEn 3 OUTn Fast Turn Off 12GATEn = 17, 12OUTn = 12 3GATEn = 8.3, 3OUTn = 3.3 I GATE = 1μA (Note 3) Input Pins PG(TH) Power Good Threshold oltage 12 OUTn Falling 3 OUTn Falling AUXOUTn Falling (Note 5) PG(HYST) Power Good Hysteresis 12 OUTn 3 OUTn AUXOUTn (Note 5) ma ma ma m m m m m m μa μa ma ma ma ma m m m 3

4 TA 25ºC CC = AUXINn = 3INn = INn = 12 (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ON(TH) ONn, AUXONn Pin Threshold oltage Rising Edge Δ ON(TH) ONn, AUXONn Pin Hysteresis m ON(RTH) ONn, AUXONn Pin Reset Threshold oltage Falling Edge I ON(IN) ONn, AUXONn Pin Input Current ONn = AUXONn = 1.2 ±1 μa EN(TH) ENn Pin Threshold oltage ENn Rising Δ EN(HYST) ENn Pin Hysteresis m I EN(UP) ENn Pull-Up Current ENn = μa FON FONn Pin Logic Threshold I SENSE SENSE Pin Input Current 12 SENSEn 3 SENSEn 12SENSEn = 12 3SENSEn = μa μa I OUT OUT Pin Input Current Gate Drive On 12 OUTn 3 OUTn 12OUTn = 12 3OUTn = μa μa R OUT(DIS) Output Pins OL I PU OUT Pin Discharge Resistance 12 OUTn 3 OUTn AUXOUTn Output Low oltage FAULTn, AUXFAULTn, PGOODn, AUXPGOODn (Note 5) Pull-Up Current FAULTn, AUXFAULTn, PGOODn, AUXPGOODn (Note 5) Gate Drive Off 12OUTn = 6 3OUTn = 2 AUXOUTn = 2 I PIN = 3mA PIN = Ω Ω Ω μa Slew Rate SR AUXOUT AUXOUTn Slew Rate /ms Delays t PLH(GATE) Input High (ONn) to GATEs High Prop Delay 7 14 μs t PLH(UL) Input Supply Low (12 INn, 3 INn ) to GATEs 18 Low Prop Delay 36 μs t PLH(PG) Out Low (12 OUTn, 3 OUTn ) to PGOOD High 20 Prop Delay 40 μs t PHL(SENSE) Sense oltage High to GATE Low ΔSENSE = 200m, C GATE = 10nF μs Note 1 Note 2 GND Note 3 GATE OUT 5 Note 4 QFN AUX FET Note 5 QFN 4

5 T A 25ºC CC = AUXINn = 3INn = INn = 12 (Note 2) I DD CC CC 12 INn 3 INn 12 INn U 3 INn AUX INn 12 OUTn 3 OUTn AUXOUT n OUT ONn AUXONn ENn L H ONn AUXONn ENn 5

6 T A 25ºC CC = AUXINn = 3INn = INn = 12 (Note 2) FONn L H CC FONn H L CC R ON R ON AUXINn I GATE 6

7 T A 25ºC CC = AUXINn = 3INn = INn = 12 (Note 2) I GATE I GATE 7

8 12 GATE1 /12 GATE2 12 N MOSFET 9μA 12 GATEn 1mA 12 GATEn 12 GATEn 12 OUTn GATEn 12 OUTn 250mA RC 12 SENSE1 /12 SENSE INn 12 SENSEn SENSEn 12 INn 12 IN1/ 12 IN INn OUT1 /12 OUT N MOSFET PGOOD1/ PGOOD2 L MOSFET 700Ω 12 OUTn 3 GATE1 /3 GATE2 3.3 N MOSFET 9μA 3 GATEn 1mA 3 GATEn 3 GATEn 3 OUTn GATEn 3 OUTn 250mA RC 3 SENSE1 /3 SENSE INn 3 SENSEn SENSEn 3 INn 3 IN1/ 3 IN INn OUT1 /3 OUT N MOSFET PGOOD1/PGOOD2 L MOSFET 375Ω 3 OUTn AUXFAULT1/AUXFAULT2 AUX AUXFAULTn 9μAH 150 AUX L FONn ENn H ON AUXON1/AUXON2 AUX FET 3.5μs 0.6 AUX AUXIN1/AUXIN2 AUX AUXINn 2.67 AUX AUXINn FET AUXOUT1/AUXOUT2 AUX AUXOUTn FET AUXPGOOD1/AUXPGOOD2 L FET 750Ω AUXOUTn 8

9 AUXPGOOD1/AUXPGOOD2 (QFN) AUX AUXOUTn ENn H AUXONn L CC AUXINn ULO 9μA H EN1/EN2/ ENn μA QFN PCB FAULT1/FAULT2 FAULTn 9μAH FAULTn L FON1/FON2H AUX ONn AUXONn CC ULO FONn GND ON1/ON MOSFET PGOOD1/PGOOD2 12 OUTn 3 OUTn ENn H ONn L CC ULO 9μA H CC CC

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11 LTC4242 PCI Express 2 2 9μA N MOSFET MOSFET 5.5 AUX FET 1.25/ms ECB ACL IN SENSE ACLECB 2 ACL MOSFET 20μs MOSFET FAULT L MOSFET AUX FET 550mA 20μs AUX FET 1.65A 150AUX FET AUXFAULT LFET OUTN OUT PG PGOOD/AUXPGOOD LTC4242 ULO ON EN ULO CC FON LTC4242 / CC ULO FON LTC PCI Express HPC LTC PCI Express PCB PCI Express 2 PRSNT1 PRSNT2 2 PRSNT2 HPC 1 HPC HPC LTC

12 1. PCI Express 12

13 2. 3. RC PRSNT2 LC D R D ENn L 1ms R D 47k C D t ms CD = DELAY1 ( ) μf = μf nF C D C t D DELAY 2 = s =28. ms 9 PCI Express N Q1 Q4 3.3 R1 R4 R G1 R G4 13

14 C G1 C G4 C G1 C G4 R5 R8Q1 Q4 N MOSFET 1. CC / / ULO 2. EN L ON LTC AUXON ON 2 ONON H ON L ON H 4 EN L 9μA GATE GATE9μA/ C G C L /C G 9μA C L 1.25/ms 3.3 AUX ULO ECB PGOOD AUXPGOOD QFN L ON/AUXON L / 2. EN H ON L 1mA PGOOD H AUXPGOOD H 5 EN H 14

15 C AUXFAULT L 120AUXON L H LTC4242 ECB ACL ECB 20μs 6 ECBFET ACL ECB 2 20μs LTC4242 MOSFET MOSFET MOSFET ns MOSFET 15

16 ULO 38μs CC 20μs /AUX PGOOD/AUXPGOOD H PGOOD/AUXPGOOD L R G /C G ACL ECB 2 ACL 550mA 3 ECB 20μs ACL MOSFET 18μs MOSFET 12 IN 3 IN AUXIN 18μs 3.3 CC AUX EN L ON H 5. ON L ULO AUXON L ULO CC ULO FON H 9 LTC4242 FAULT ON RC 10 LTC4242 ( ) RAUTO CAUTO OL toff RAUTO 9μA t OFF = 3.3ms 40μs 1.3%

17 CC LTC4242 CC 1μF CC 3 IN AUXIN RC CC ULO LTC IN / AUXIN AUXIN 3 IN AUXIN 3 IN 10 CC 7 R S C1 CC CC RC GATE N MOSFET GATE OUT 5.5 R G C G C G R G R G 10Ω 100Ω FON H EN L LTC4242 ON ECB FAULT/AUXFAULT L CC FON FON H FON H 17

18 Force ON FON EN H ACL 20μs AUX AUX I CBAUX AUXFAULT AUX FET FON EN L ON AUXON PCB LTC4242 PCB MOSFET PCB 12 MOSFET PCB 12 10A PCB 1 0.5mΩ/ PCB 1DC PCB 1 1 DC 1A PCB MOSFETGATE

19 10μF CC GND CC C1 PCI Express 1. PCI Express A 2000μF A 1000μF 3.3 AUX 375mA 150μF 1. R SENSE Δ SENSE(CB)(MIN) R SENSE PCI Express AUX A 1% 2. R SENSE (1%) I TRIP(MIN) I TRIP(MAX) 12 8mΩ 5.6A 6.9A mΩ 3.4A 4.3A 2. IGATE( UP ) t 1 CGATE = (2) OUT t 1 I GATE(UP)(MAX) = 13μA t 1 = 10ms a. 12 C GATE = 11nF b. 3.3 C GATE = 39nF nF 47nF 10% t t 1 t 1(MIN) t 1(MAX) I INRUSH 12 13ms 40ms 2.4A ms 34ms 0.4A 3.3 AUX SR 1.7/ms I INRUSH(MAX) = C LOAD SR MAX (3) 385mA I CBAUX(MIN) 30% C LOAD 170μF MOSFET GS = C Si7336ADP4mΩ A MOSFET 36mW Si7336ADP 50 C/W Si- 7336ADP 12% RON 4.5mΩ 52 C 3A PCB MOSFET 53m MOSFET MOSFET MOSFET 2 CL OUT PON = 2 t1 (4) 19

20 P ON t 1 MOSFET θ JA(MAX) 12 MOSFET 4. MOSFET P ON θ JA(MAX) ΔT 12 11W 0.75 C/W 8.3 C W 0.6 C/W 0.3 C 2 20μs MOSFET MOSFET LTC4242 MOSFET

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22 G 36 SSOP (5.3mm) (Reference LTC DWG # ) NOTE: ( ) 3. * 0.152mm(0.006") ** 0.254mm(0.010") 22

23 UHF 38 QFN (5mm 7mm) (Reference LTC DWG # ) 1 R NOTE 6 NOTE: 1. JEDEC M0-220 WHKD mm

24 AMC Advanced Mezzanine Card 2 LTC SOT-23 LTC4213 No R TM SENSE 3 LTC LTC4215 I 2 C ADC LTC LT LTC4221 LTC4241 PCI 3.3 No R SENSE PRINTED IN JAPAN LINEAR TECHNOLOGY CORPORATION 2006