DS30292A-J-page 2 Preliminary 2000 Microchip Technology Inc. PIC16F876/

PDIP H ) MCLR/VPP/THV RA0/AN0 RA1/AN1 RA2/AN2/VREF- RA3/AN3/VREF+ RA4/T0CKI RA5/AN4/SS RE0/RD/AN5 RE1/WR/AN6 RE2/CS/AN7 VDD VSS OSC1/CLKIN OSC2/CLKOUT RC0/T1OSO/T1CKI RC1/T1OSI/CCP2 RC2/CCP1 RC3/SCK/SCL RD0/PSP0 RD1/PSP1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PIC16F877/874 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 RB7/PGD RB6/PGC RB5 RB4 RB3/PGM RB2 RB1 RB0/INT VDD VSS RD7/PSP7 RD6/PSP6 RD5/PSP5 RD4/PSP4 RC7/RX/DT RC6/TX/CK RC5/SDO RC4/SDI/SDA RD3/PSP3 RD2/PSP2 H H In-Circuit Serial Programming - - - H H H 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 1

DS30292A-J-page 2 Preliminary 2000 Microchip Technology Inc. PIC16F876/873 10 11 2 3 4 5 6 1 8 7 9 12 13 14 15 16 17 18 19 20 23 24 25 26 27 28 22 21 MCLR/VPP/THV RA0/AN0 RA1/AN1 RA2/AN2/VREF- RA3/AN3/VREF+ RA4/T0CKI RA5/AN4/SS VSS OSC1/CLKIN OSC2/CLKOUT RC0/T1OSO/T1CKI RC1/T1OSI/CCP2 RC2/CCP1 RC3/SCK/SCL RB7/PGD RB6/PGC RB5 RB4 RB3/PGM RB2 RB1 RB0/INT VDD VSS RC7/RX/DT RC6/TX/CK RC5/SDO RC4/SDI/SDA 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 44 8 7 6 5 4 3 2 1 27 2829 30 31 32 33 34 35 36 37 38 39 40 41 42 43 9 PIC16F877 RA4/T0CKI RA5/AN4/SS RE0/RD/AN5 OSC1/CLKIN OSC2/CLKOUT RC0/T1OSO/T1CK1 NC RE1/WR/AN6 RE2/CS/AN7 VDD VSS RB3/PGM RB2 RB1 RB0/INT VDD VSS RD7/PSP7 RD6/PSP6 RD5/PSP5 RD4/PSP4 RC7/RX/DT RA3/AN3/VREF+ RA2/AN2/VREF- RA1/AN1 RA0/AN0 MCLR/VPP/THV NC RB7/PGD RB6/PGC RB5 RB4 NC NC RC6/TX/CK RC5/SDO RC4/SDI/SDA RD3/PSP3 RD2/PSP2 RD1/PSP1 RD0/PSP0 RC3/SCK/SCL RC2/CCP1 RC1/T1OSI/CCP2 10 11 2 3 4 5 6 1 18 19 20 21 22 12 13 14 15 38 8 7 44 43 42 41 40 39 16 17 29 30 31 32 33 23 24 25 26 27 28 36 34 35 9 PIC16F877 37 RA3/AN3/VREF+ RA2/AN2/VREF- RA1/AN1 RA0/AN0 MCLR/VPP/THV NC RB7/PGD RB6/PGC RB5 RB4 NC RC6/TX/CK RC5/SDO RC4/SDI/SDA RD3/PSP3 RD2/PSP2 RD1/PSP1 RD0/PSP0 RC3/SCK/SCL RC2/CCP1 RC1/T1OSI/CCP2 NC NC RC0/T1OSO/T1CKI OSC2/CLKOUT OSC1/CLKIN VSS VDD RE2/AN7/CS RE1/AN6/WR RE0/AN5/RD RA5/AN4 RA4/T0CKI RC7/RX/DT RD4/PSP4 RD5/PSP5 RD6/PSP6 RD7/PSP7 VSS VDD RB0/INT RB1 RB2 RB3/PGM PLCC QFP DIP, SOIC PIC16F874 PIC16F874

PICmicro (DS33023) PIC16F873 PIC16F874 PIC16F876 PIC16F877 DC - 20 MHz DC - 20 MHz DC - 20 MHz DC - 20 MHz POR, BOR (PWRT, OST) POR, BOR (PWRT, OST) POR, BOR (PWRT, OST) POR, BOR (PWRT, OST) 4K 4K 8K 8K 192 192 368 368 128 128 256 256 13 14 13 14 Ports A,B,C Ports A,B,C,D,E Ports A,B,C Ports A,B,C,D,E 3 3 3 3 2 2 2 2 MSSP, USART MSSP, USART MSSP, USART MSSP, USART PSP PSP 5 8 5 8 35 35 35 35 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 3

... 191 www.microchip.com, www.microchip.co.jp DS30000A DS30000 A (www.microchip.com, www.microchip.co.jp) ( (U.S. FAX: (602) 786-7277) E tech@microchip.co.jp DS30292A-J-page 4 Preliminary 2000 Microchip Technology Inc.

EEPROM PIC16F873 4K 192 128 PIC16F876 8K 368 256 Program Bus OSC1/CLKIN OSC2/CLKOUT FLASH Program Memory 14 Instruction reg Instruction Decode & Control Timing Generation 8 13 Program Counter 8 Level Stack (13-bit) Direct Addr 7 Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer Brown-out Reset In-Circuit Debugger Low-Voltage Programming Data Bus 8 RAM File Registers RAM Addr (1) 9 8 3 Addr MUX ALU W reg Indirect 8 Addr FSR reg STATUS reg MUX PORTA PORTB PORTC RA0/AN0 RA1/AN1 RA2/AN2 RA3/AN3/VREF RA4/T0CKI RA5/AN4/SS RB0/INT RB1 RB2 RB3/PGM RB4 RB5 RB6/PGC RB7/PGD RC0/T1OSO/T1CKI RC1/T1OSI/CCP2 RC2/CCP1 RC3/SCK/SCL RC4/SDI/SDA RC5/SDO RC6/TX/CK RC7/RX/DT MCLR VDD, VSS Timer0 Timer1 Timer2 10-bit A/D Data EEPROM CCP1,2 Synchronous Serial Port USART 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 5

EEPROM PIC16F874 4K 192 128 PIC16F877 8K 368 256 Program Bus OSC1/CLKIN OSC2/CLKOUT FLASH Program Memory 14 Instruction reg Instruction Decode & Control Timing Generation 8 13 Program Counter 8 Level Stack (13-bit) Direct Addr 7 Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer Brown-out Reset In-Circuit Debugger Low-Voltage Programming Data Bus RAM File Registers RAM Addr (1) 9 8 3 Addr MUX ALU W reg 8 Indirect 8 Addr FSR reg STATUS reg MUX Parallel Slave Port PORTA PORTB PORTC PORTD PORTE RA0/AN0 RA1/AN1 RA2/AN2 RA3/AN3/VREF RA4/T0CKI RA5/AN4/SS RB0/INT RB1 RB2 RB3/PGM RB4 RB5 RB6/PGC RB7/PGD RC0/T1OSO/T1CKI RC1/T1OSI/CCP2 RC2/CCP1 RC3/SCK/SCL RC4/SDI/SDA RC5/SDO RC6/TX/CK RC7/RX/DT RD7/PSP7:RD0/PSP0 RE0/AN5/RD MCLR VDD, VSS RE1/AN6/WR RE2/AN7/CS Timer0 Timer1 Timer2 10-bit A/D Data EEPROM CCP1,2 Synchronous Serial Port USART DS30292A-J-page 6 Preliminary 2000 Microchip Technology Inc.

DIP Pin# SOIC Pin# I/O/P Type Buffer Type OSC1/CLKIN 9 9 I ST/CMOS (3) OSC2/CLKOUT 10 10 O MCLR/VPP/THV 1 1 I/P ST RA0/AN0 2 2 I/O TTL RA1/AN1 3 3 I/O TTL RA2/AN2/VREF- 4 4 I/O TTL RA3/AN3/VREF+ 5 5 I/O TTL RA4/T0CKI 6 6 I/O ST RA5/SS/AN4 7 7 I/O TTL RB0/INT 21 21 I/O TTL/ST (1) RB1 22 22 I/O TTL RB2 23 23 I/O TTL RB3/PGM 24 24 I/O TTL RB4 25 25 I/O TTL RB5 26 26 I/O TTL RB6/PGC 27 27 I/O TTL/ST (2) RB7/PGD 28 28 I/O TTL/ST (2) RC0/T1OSO/T1CKI 11 11 I/O ST RC1/T1OSI/CCP2 12 12 I/O ST RC2/CCP1 13 13 I/O ST RC3/SCK/SCL 14 14 I/O ST RC4/SDI/SDA 15 15 I/O ST RC5/SDO 16 16 I/O ST RC6/TX/CK 17 17 I/O ST RC7/RX/DT 18 18 I/O ST VSS 8, 19 8, 19 P VDD 20 20 P 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 7

DIP Pin# PLCC Pin# QFP Pin# I/O/P Type Buffer Type OSC1/CLKIN 13 14 30 I ST/CMOS (4) OSC2/CLKOUT 14 15 31 O MCLR/VPP/THV 1 2 18 I/P ST RA0/AN0 2 3 19 I/O TTL RA1/AN1 3 4 20 I/O TTL RA2/AN2/VREF- 4 5 21 I/O TTL RA3/AN3/VREF+ 5 6 22 I/O TTL RA4/T0CKI 6 7 23 I/O ST RA5/SS/AN4 7 8 24 I/O TTL RB0/INT 33 36 8 I/O TTL/ST (1) RB1 34 37 9 I/O TTL RB2 35 38 10 I/O TTL RB3/PGM 36 39 11 I/O TTL RB4 37 41 14 I/O TTL RB5 38 42 15 I/O TTL RB6/PGC 39 43 16 I/O TTL/ST (2) RB7/PGD 40 44 17 I/O TTL/ST (2) DS30292A-J-page 8 Preliminary 2000 Microchip Technology Inc.

RD7/PSP7 30 33 5 I/O ST/TTL (3) PIC16F87X DIP Pin# PLCC Pin# QFP Pin# I/O/P Type Buffer Type RC0/T1OSO/T1CKI 15 16 32 I/O ST RC1/T1OSI/CCP2 16 18 35 I/O ST RC2/CCP1 17 19 36 I/O ST RC3/SCK/SCL 18 20 37 I/O ST RC4/SDI/SDA 23 25 42 I/O ST RC5/SDO 24 26 43 I/O ST RC6/TX/CK 25 27 44 I/O ST RC7/RX/DT 26 29 1 I/O ST RD0/PSP0 19 21 38 I/O ST/TTL (3) RD1/PSP1 20 22 39 I/O ST/TTL (3) RD2/PSP2 21 23 40 I/O ST/TTL (3) RD3/PSP3 22 24 41 I/O ST/TTL (3) RD4/PSP4 27 30 2 I/O ST/TTL (3) RD5/PSP5 28 31 3 I/O ST/TTL (3) RD6/PSP6 29 32 4 I/O ST/TTL (3) RE0/RD/AN5 8 9 25 I/O ST/TTL (3) RE1/WR/AN6 9 10 26 I/O ST/TTL (3) RE2/CS/AN7 10 11 27 I/O ST/TTL (3) VSS 12,31 13,34 6,29 P VDD 11,32 12,35 7,28 P NC 1,17,28, 40 12,13, 33,34 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 9

NOTES: DS30292A-J-page 10 Preliminary 2000 Microchip Technology Inc.

CALL, RETURN RETFIE, RETLW PC<12:0> Stack Level 1 Stack Level 2 13 Stack Level 8 Reset Vector 0000h CALL, RETURN RETFIE, RETLW PC<12:0> 13 On-chip Program Memory Interrupt Vector Page 0 Page 1 0004h 0005h 07FFh 0800h 0FFFh 1000h Stack Level 1 Stack Level 2 1FFFh Stack Level 8 Reset Vector 0000h On-chip Program Memory Interrupt Vector Page 0 Page 1 Page 2 Page 3 0004h 0005h 07FFh 0800h 0FFFh 1000h 17FFh 1800h 1FFFh 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 11

RP1 RP0 (STATUS<6:5>) = 00 Bank0 = 01 Bank1 = 10 Bank2 = 11 Bank3 DS30292A-J-page 12 Preliminary 2000 Microchip Technology Inc.

File Address Indirect addr. (*) TMR0 PCL STATUS FSR PORTA PORTB PORTC PORTD (1) (1) PORTE PCLATH INTCON PIR1 PIR2 TMR1L TMR1H T1CON TMR2 T2CON SSPBUF SSPCON CCPR1L CCPR1H CCP1CON RCSTA TXREG RCREG CCPR2L CCPR2H CCP2CON ADRESH ADCON0 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh 20h Indirect addr. (*) 80h Indirect addr. (*) OPTION_REG PCL STATUS FSR TRISA TRISB TRISC (1) TRISD 81h 82h 83h 84h 85h 86h 87h 88h TMR0 PCL STATUS FSR PORTB (1) TRISE 89h PCLATH INTCON PIE1 PIE2 8Ah 8Bh 8Ch 8Dh PCLATH INTCON EEDATA EEADR PCON 8Eh 8Fh EEDATH EEADRH 90h SSPCON2 91h PR2 SSPADD SSPSTAT 92h 93h 94h 95h 96h 97h TXSTA 98h SPBRG 99h 9Ah 9Bh 9Ch 9Dh ADRESL 9Eh ADCON1 9Fh A0h 100h 101h 102h 103h 104h 105h 106h 107h 108h 109h 10Ah 10Bh 10Ch 10Dh 10Eh 10Fh 110h 111h 112h 113h 114h 115h 116h 117h 118h 119h 11Ah 11Bh 11Ch 11Dh 11Eh 11Fh 120h Indirect addr. (*) OPTION_REG PCL STATUS FSR TRISB PCLATH INTCON EECON1 EECON2 Reserved (2) Reserved (2) 16 16 180h 181h 182h 183h 184h 185h 186h 187h 188h 189h 18Ah 18Bh 18Ch 18Dh 18Eh 18Fh 190h 191h 192h 193h 194h 195h 196h 197h 198h 199h 19Ah 19Bh 19Ch 19Dh 19Eh 19Fh 1A0h 96 70h-7Fh 7Fh Bank 0 Bank 1 80 EFh 80 80 F0h FFh 16Fh 170h 70h-7Fh 70h - 7Fh 17Fh Bank 2 Bank 3 1EFh 1F0h 1FFh * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 13

File Address Indirect addr. (*) TMR0 PCL STATUS FSR PORTA PORTB PORTC PORTD (1) (1) PORTE PCLATH INTCON PIR1 PIR2 TMR1L TMR1H T1CON TMR2 T2CON SSPBUF SSPCON CCPR1L CCPR1H CCP1CON RCSTA TXREG RCREG CCPR2L CCPR2H CCP2CON ADRESH ADCON0 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh 20h Indirect addr. (*) 80h Indirect addr. (*) OPTION_REG PCL STATUS FSR TRISA TRISB TRISC (1) TRISD 81h 82h 83h 84h 85h 86h 87h 88h TMR0 PCL STATUS FSR PORTB (1) TRISE 89h PCLATH INTCON PIE1 PIE2 8Ah 8Bh 8Ch 8Dh PCLATH INTCON EEDATA EEADR PCON 8Eh 8Fh EEDATH EEADRH 90h SSPCON2 91h PR2 SSPADD SSPSTAT 92h 93h 94h 95h 96h 97h TXSTA 98h SPBRG 99h 9Ah 9Bh 9Ch 9Dh ADRESL 9Eh ADCON1 9Fh A0h 100h 101h 102h 103h 104h 105h 106h 107h 108h 109h 10Ah 10Bh 10Ch 10Dh 10Eh 10Fh 110h 120h Indirect addr. (*) OPTION_REG PCL STATUS FSR TRISB PCLATH INTCON EECON1 EECON2 Reserved (2) Reserved (2) 180h 181h 182h 183h 184h 185h 186h 187h 188h 189h 18Ah 18Bh 18Ch 18Dh 18Eh 18Fh 190h 1A0h General Purpose Register General Purpose Register 96 Bytes 96 Bytes accesses 20h-7Fh 16Fh 170h accesses A0h - FFh 1EFh 1F0h 7Fh Bank 0 Bank 1 FFh 17Fh Bank 2 Bank 3 1FFh * DS30292A-J-page 14 Preliminary 2000 Microchip Technology Inc.

2000 Microchip Technology Inc. Preliminary DS30292A-J-page 15

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bank 0 Value on: POR, BOR Value on all other resets (2) 00h (4) INDF 0000 0000 0000 0000 01h TMR0 xxxx xxxx uuuu uuuu 02h (4) PCL 0000 0000 0000 0000 03h (4) STATUS IRP RP1 RP0 TO PD Z DC C 0001 1xxx 000q quuu 04h (4) FSR xxxx xxxx uuuu uuuu 05h PORTA --0x 0000 --0u 0000 06h PORTB xxxx xxxx uuuu uuuu 07h PORTC xxxx xxxx uuuu uuuu 08h (5) PORTD xxxx xxxx uuuu uuuu 09h (5) PORTE RE2 RE1 RE0 ---- -xxx ---- -uuu 0Ah (1,4) PCLATH ---0 0000 ---0 0000 0Bh (4) INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF (3) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 0Dh PIR2 (6) EEIF BCLIF CCP2IF -r-0 0--0 -r-0 0--0 0Eh TMR1L xxxx xxxx uuuu uuuu 0Fh TMR1H xxxx xxxx uuuu uuuu 10h T1CON T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu 11h TMR2 0000 0000 0000 0000 12h T2CON TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0-000 0000-000 0000 13h SSPBUF xxxx xxxx uuuu uuuu 14h SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000 15h CCPR1L xxxx xxxx uuuu uuuu 16h CCPR1H xxxx xxxx uuuu uuuu 17h CCP1CON CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 18h RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x 19h TXREG 0000 0000 0000 0000 1Ah RCREG 0000 0000 0000 0000 1Bh CCPR2L xxxx xxxx uuuu uuuu 1Ch CCPR2H xxxx xxxx uuuu uuuu 1Dh CCP2CON CCP2X CCP2Y CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000 1Eh ADRESH xxxx xxxx uuuu uuuu 1Fh ADCON0 ADCS1 ADCS0 CHS2 CHS1 CHS0 GO/ DONE ADON 0000 00-0 0000 00-0 x u q DS30292A-J-page 16 Preliminary 2000 Microchip Technology Inc.

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bank 1 Value on: POR, BOR Value on all other resets (2) 80h (4) INDF 0000 0000 0000 0000 81h OPTION_RE G RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 82h (4) PCL 0000 0000 0000 0000 83h (4) STATUS IRP RP1 RP0 TO PD Z DC C 0001 1xxx 000q quuu 84h (4) FSR xxxx xxxx uuuu uuuu 85h TRISA --11 1111 --11 1111 86h TRISB 1111 1111 1111 1111 87h TRISC 1111 1111 1111 1111 88h (5) TRISD 1111 1111 1111 1111 89h (5) TRISE IBF OBF IBOV PSPMODE 0000-111 0000-111 8Ah (1,4) PCLATH ---0 0000 ---0 0000 8Bh (4) INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 8Ch PIE1 PSPIE (3) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 8Dh PIE2 (6) EEIE BCLIE CCP2IE -r-0 0--0 -r-0 0--0 8Eh PCON POR BOR ---- --qq ---- --uu 8Fh 90h 91h SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 0000 0000 0000 0000 92h PR2 1111 1111 1111 1111 93h SSPADD 0000 0000 0000 0000 94h SSPSTAT SMP CKE D/A P S R/W UA BF 0000 0000 0000 0000 95h 96h 97h 98h TXSTA CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0000-010 0000-010 99h SPBRG 0000 0000 0000 0000 9Ah 9Bh 9Ch 9Dh 9Eh ADRESL xxxx xxxx uuuu uuuu 9Fh ADCON1 ADFM PCFG3 PCFG2 PCFG1 PCFG0 --0-0000 --0-0000 x u q 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 17

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bank 2 Value on: POR, BOR Value on all other resets (2) 100h (4) INDF 0000 0000 0000 0000 101h TMR0 xxxx xxxx uuuu uuuu 102h (4) PCL 0000 0000 0000 0000 103h (4) STATUS IRP RP1 RP0 TO PD Z DC C 0001 1xxx 000q quuu 104h (4) FSR xxxx xxxx uuuu uuuu 105h 106h PORTB xxxx xxxx uuuu uuuu 107h 108h 109h 10Ah (1,4) PCLATH ---0 0000 ---0 0000 10Bh (4) INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 10Ch EEDATA xxxx xxxx uuuu uuuu 10Dh EEADR xxxx xxxx uuuu uuuu 10Eh EEDATH xxxx xxxx uuuu uuuu 10Fh EEADRH xxxx xxxx uuuu uuuu Bank 3 180h (4) INDF 0000 0000 0000 0000 181h OPTION_RE G RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 182h (4) PCL 0000 0000 0000 0000 183h (4) STATUS IRP RP1 RP0 TO PD Z DC C 0001 1xxx 000q quuu 184h (4) FSR xxxx xxxx uuuu uuuu 185h 186h TRISB 1111 1111 1111 1111 187h 188h 189h 18Ah (1,4) PCLATH ---0 0000 ---0 0000 18Bh (4) INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 18Ch EECON1 EEPGD WRERR WREN WR RD x--- x000 x--- u000 18Dh EECON2 ---- ---- ---- ---- 18Eh 0000 0000 0000 0000 18Fh 0000 0000 0000 0000 x u q DS30292A-J-page 18 Preliminary 2000 Microchip Technology Inc.

CLRF STATUS 000u u1uu u BCF BSF SWAPF MOVWF SUBLW SUBWF R/W-0 R/W-0 R/W-0 R-1 R-1 R/W-x R/W-x R/W-x IRP RP1 RP0 TO PD Z DC C R = bit7 bit0 W = U = - n = bit 7: IRP: 1 = Bank 2, 3 (100h - 1FFh) 0 = Bank 0, 1 (00h - FFh) bit 6-5: RP1:RP0: 11 = Bank 3 (180h - 1FFh) 10 = Bank 2 (100h - 17Fh) 01 = Bank 1 (80h - FFh) 00 = Bank 0 (00h - 7Fh) bit 4: TO: 1 = CLRWDT SLEEP 0 = bit 3: PD: 1 = CLRWDT 0 = SLEEP bit 2: Z: 1 = 0 = bit 1: DC: ADDWF ADDLW SUBLW SUBWF 1 = 0 = bit 0: C: ADDWF ADDLW SUBLW SUBWF 1 = 0 = : RRF, RLF 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 19

R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 R= bit7 bit0 W= U= - n= bit 7: RBPU: 1 = 0 = bit 6: INTEDG: 1 = 0 = bit 5: T0CS: 1 = 0 = bit 4: T0SE: 1 = 0 = bit 3: PSA: 1 = 0 = bit 2-0: PS2:PS0: 000 001 010 011 100 101 110 111 1 : 2 1 : 4 1 : 8 1 : 16 1 : 32 1 : 64 1 : 128 1 : 256 1 : 1 1 : 2 1 : 4 1 : 8 1 : 16 1 : 32 1 : 64 1 : 128 DS30292A-J-page 20 Preliminary 2000 Microchip Technology Inc.

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-x GIE PEIE T0IE INTE RBIE T0IF INTF RBIF R= bit7 bit0 W= U= - n= bit 7: GIE: 1 = 0 = bit 6: PEIE: 1 = 0 = bit 5: T0IE: 1 = 0 = bit 4: INTE: 1 = 0 = bit 3: RBIE: 1 = 0 = bit 2: T0IF: 1 = 0 = bit 1: INTF: 1 = 0 = bit 0: RBIF: 1 = 0 = 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 21

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE R= bit7 bit0 W= U= - n= bit 7: PSPIE (1) : 1 = 0 = bit 6: ADIE: 1 = 0 = bit 5: RCIE: 1 = 0 = bit 4: TXIE: 1 = 0 = bit 3: SSPIE: 1 = 0 = bit 2: CCP1IE: 1 = 0 = bit 1: TMR2IE: 1 = 0 = bit 0: TMR1IE: 1 = 0 = DS30292A-J-page 22 Preliminary 2000 Microchip Technology Inc.

PIC16F87X R/W-0 R/W-0 R-0 R-0 R/W-0 R/W-0 R/W-0 R/W-0 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF R= bit7 bit0 W= - n= bit 7: PSPIF (1) : 1 = 0 = bit 6: ADIF: 1 = 0 = bit 5: RCIF: 1 = 0 = bit 4: TXIF: 1 = 0 = bit 7: SSPIF: 1 = SPI I 2 C I 2 C. 0 = bit 2: CCP1IF: 1 = 0 = 1 = 0 = bit 1: TMR2IF: 1 = 0 = bit 0: TMR1IF: 1 = 0 = 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 23

U-0 R/W-0 U-0 R/W-0 R/W-0 U-0 U-0 R/W-0 (1) EEIE BCLIE CCP2IE R= bit7 bit0 W= U= - n= bit 7: : bit 6: : bit 5: : bit 4: EEIE: 1 = 0 = bit 3: BCLIE: 1 = 0 = bit 2-1: : bit 0: CCP2IE: 1 = 0 = DS30292A-J-page 24 Preliminary 2000 Microchip Technology Inc.

. U-0 R/W-0 U-0 R/W-0 R/W-0 U-0 U-0 R/W-0 (1) EEIF BCLIF CCP2IF R= bit7 bit0 W= U= - n= bit 7: : bit 6: : bit 5: : bit 4: EEIF: 1 = 0 = bit 3: BCLIF: 1 = 0 = bit 2-1: : bit 0: CCP2IF: 1 = 0 = 1 = 0 = 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 25

U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-1 POR BOR R= bit7 bit0 W= U= - n= bit 7-2: : bit 1: POR: 1 = 0 = bit 0: BOR: 1 = 0 = DS30292A-J-page 26 Preliminary 2000 Microchip Technology Inc.

CALL RETURN RETLW RETFIE CALL GOTO CALL GOTO CALL GOTO CALL 2.5 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 27

movlw 0x20 ;initialize pointer movwf FSR ; to RAM NEXT clrf INDF ;clear INDF register incf FSR ;inc pointer btfss FSR,4 ;all done? goto NEXT ;NO, clear next CONTINUE : ;YES, continue RP1: RP0 6 from opcode 0 IRP 7 FSR 0 bank select location select bank select location select 00 01 10 11 00h 80h 100h 180h (1) 7Fh FFh 17Fh 1FFh Bank 0 Bank 1 Bank 2 Bank 3 DS30292A-J-page 28 Preliminary 2000 Microchip Technology Inc.

BCF STATUS, RP0 ; CLRF PORTA ; ; ; BSF STATUS, RP0 ; MOVLW 0xCF ; ; ; MOVWF TRISA ; <3:0> ; <5:4> ; <7:6> ; WR WR TRIS RD PORT D D CK CK TRIS To A/D Converter WR PORT WR TRIS RD PORT Q Q Q Q RD TRIS Q D EN VDD P N VSS I/O pin (1) TTL D CK Data Latch D CK Q Q Q Q TRIS Latch RD TRIS Q N Vss D EN EN I/O pin(1) TMR0 clock input 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 29

Name Bit# Buffer RA0/AN0 bit0 TTL RA1/AN1 bit1 TTL RA2/AN2 bit2 TTL RA3/AN3/VREF bit3 TTL RA4/T0CKI bit4 ST RA5/SS/AN4 bit5 TTL Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other resets 05h PORTA RA5 RA4 RA3 RA2 RA1 RA0 --0x 0000 --0u 0000 85h TRISA PORTA Data Direction Register --11 1111 --11 1111 9Fh ADCON1 ADFM PCFG3 PCFG2 PCFG1 PCFG0 --0-0000 --0-0000 x u - DS30292A-J-page 30 Preliminary 2000 Microchip Technology Inc.

BCF STATUS, RP0 ; CLRF PORTB ; ; ; BSF STATUS, RP0 ; MOVLW 0xCF ; ; ; MOVWF TRISB ; <3:0> ; <5:4> <7:6> ; RBPU(2) WR Port WR TRIS Data Latch D Q CK TRIS Latch D Q CK TTL VDD P I/O pin(1) RBPU(2) WR Port WR TRIS Set RBIF Data Latch D Q CK TRIS Latch D Q CK RD TRIS RD Port Latch Q D EN VDD P TTL I/O pin(1) ST Q1 RD TRIS RD Port Q D EN RB7:RB4 RB7:RB6 Q D EN RD Port Q3 RB0/INT RD Port 1:. 2: 1:. 2: 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 31

Name Bit# Buffer RB0/INT bit0 TTL/ST (1) RB1 bit1 TTL RB2 bit2 TTL RB3/PGM bit3 TTL RB4 bit4 TTL RB5 bit5 TTL RB6/PGC bit6 TTL/ST (2) RB7/PGD bit7 TTL/ST (2) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 06h, 106h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 xxxx xxxx uuuu uuuu 86h, 186h TRISB PORTB Data Direction Register 1111 1111 1111 1111 81h, 181h OPTION_ REG RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 x u DS30292A-J-page 32 Preliminary 2000 Microchip Technology Inc.

BCF STATUS, RP0 ; CLRF PORTC ; ; ; BSF STATUS, RP0 ; MOVLW 0xCF ; ; ; MOVWF TRISC ; <3:0> ; <5:4> ; <7:6> PORT/PERIPHERAL Select(2) Peripheral Data Out Data bus WR PORT WR TRIS Peripheral OE(3) RD PORT Peripheral input D CK Q Q Data Latch D Q CK Q TRIS Latch RD TRIS 0 1 Q D EN VDD P N VSS I/O pin(1) PORT/PERIPHERAL Select(2) Peripheral Data Out Data bus WR PORT WR TRIS D CK Q Q Data Latch D Q CK Q TRIS Latch 0 1 VDD P N VSS I/O pin(1) Peripheral OE(3) SSPl input RD PORT RD TRIS Q D EN 0 1 Schmitt Trigger with SMBus levels CKE SSPSTAT<6> 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 33

Name Bit# Buffer Type RC0/T1OSO/T1CKI bit0 ST RC1/T1OSI/CCP2 bit1 ST RC2/CCP1 bit2 ST RC3/SCK/SCL bit3 ST RC4/SDI/SDA bit4 ST RC5/SDO bit5 ST RC6/TX/CK bit6 ST RC7/RX/DT bit7 ST Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 07h PORTC RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0 xxxx xxxx uuuu uuuu 87h TRISC PORTC Data Direction Register 1111 1111 1111 1111 x u DS30292A-J-page 34 Preliminary 2000 Microchip Technology Inc.

WR PORT WR TRIS D CK Q Data Latch D CK Q TRIS Latch I/O pin (1) RD TRIS Q D RD PORT EN EN : Name Bit# Buffer Type RD0/PSP0 bit0 ST/TTL (1) RD1/PSP1 bit1 ST/TTL (1) RD2/PSP2 bit2 ST/TTL (1) RD3/PSP3 bit3 ST/TTL (1) RD4/PSP4 bit4 ST/TTL (1) RD5/PSP5 bit5 ST/TTL (1) RD6/PSP6 bit6 ST/TTL (1) RD7/PSP7 bit7 ST/TTL (1) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 08h PORTD RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 xxxx xxxx uuuu uuuu 88h TRISD PORTD Data Direction Register 1111 1111 1111 1111 89h TRISE IBF OBF IBOV PSPMODE PORTE Data Direction Bits 0000-111 0000-111 x u - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 35

WR PORT WR TRIS RD PORT D CK Q Data Latch D CK Q TRIS Latch RD TRIS Q D EN EN I/O pin (1) : R-0 R-0 R/W-0 R/W-0 U-0 R/W-1 R/W-1 R/W-1 IBF OBF IBOV PSPMODE bit2 bit1 bit0 R= t bit7 bit0 W= U= - n= bit 7 : bit 6: bit 5: bit 4: bit 3: bit 2: bit 1: bit 0: IBF: 1 = 0 = OBF: 1 = 0 = IBOV: 1 = 0 = PSPMODE: 1 = 0 = : Bit2: 1 = 0 = Bit1: 1 = 0 = Bit0: 1 = 0 = DS30292A-J-page 36 Preliminary 2000 Microchip Technology Inc.

Name Bit# Buffer Type RE0/RD/AN5 bit0 ST/TTL (1) : RD 1 = 0 = RE1/WR/AN6 bit1 ST/TTL (1) : WR 1 = 0 = RE2/CS/AN7 bit2 ST/TTL (1) : CS 1 = 0 = Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 09h PORTE RE2 RE1 RE0 ---- -xxx ---- -uuu 89h TRISE IBF OBF IBOV PSPMODE PORTE Data Direction Bits 0000-111 0000-111 9Fh ADCON1 ADFM PCFG3 PCFG2 PCFG1 PCFG0 --0-0000 --0-0000 x u - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 37

w WR PORT RD PORT D Q CK One bit of PORTD Set interrupt flag PSPIF (PIR1<7>) Q D EN EN TTL Read TTL Chip Select TTL Write TTL RDx pin RD CS WR : Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 CS WR RD PORTD<7:0> IBF OBF PSPIF DS30292A-J-page 38 Preliminary 2000 Microchip Technology Inc.

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 CS WR RD PORTD<7:0> IBF OBF PSPIF Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 08h PORTD : xxxx xxxx uuuu uuuu 09h PORTE RE2 RE1 RE0 ---- -xxx ---- -uuu 89h TRISE IBF OBF IBOV PSPMODE PORTE Data Direction Bits 0000-111 0000-111 0Ch PIR1 PSPIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 8Ch PIE1 PSPIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 9Fh ADCON1 ADFM PCFG3 PCFG2 PCFG1 PCFG0 --0-0000 --0-0000 x u - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 39

NOTES: DS30292A-J-page 40 Preliminary 2000 Microchip Technology Inc.

EECON1 EECON2 EEDATA EEDATH EEADR EEADRH 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 41

R/W-x U-0 U-0 U-0 R/W-x R/W-0 R/S-0 R/S-0 EEPGD WRERR WREN WR RD R= bit7 bit0 W= S= U= - n= bit 7: EEPGD: 1 = 0 = bit 6:4: : bit 3: bit 2: bit 1: bit 0: WRERR: 1 = 0 = WREN: 1 = 0 = WR: 1 = 0 = RD: 1 = 0 = DS30292A-J-page 42 Preliminary 2000 Microchip Technology Inc.

BSF STATUS, RP1 ; BCF STATUS, RP0 ; Bank 2 MOVLW DATA_EE_ADDR ; MOVWF EEADR ; Data Memory Address to read BSF STATUS, RP0 ; Bank 3 BCF EECON1, EEPGD ; Point to DATA memory BSF EECON1, RD ; EEPROM Read BCF STATUS, RP0 ; Bank 2 MOVF EEDATA, W ; W = EEDATA BSF STATUS, RP1 ; BCF STATUS, RP0 ; Bank 2 MOVLW DATA_EE_ADDR ; MOVWF EEADR ; Data Memory Address to write MOVLW DATA_EE_DATA ; MOVWF EEDATA ; Data Memory Value to write BSF STATUS, RP0 ; Bank 3 BCF EECON1, EEPGD ; Point to DATA memory BSF EECON1, WREN ; Enable writes BCF INTCON, GIE ; Disable Interrupts MOVLW 55h ; Required MOVWF EECON2 ; Write 55h Sequence MOVLW AAh ; MOVWF EECON2 ; Write AAh BSF EECON1, WR ; Set WR bit to begin write BSF INTCON, GIE ; Enable Interrupts SLEEP ; Wait for interrupt to signal write complete BCF EECON1, WREN ; Disable writes 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 43

BSF EECON1,RD BSF EECON1,RD BSF STATUS, RP1 ; BCF STATUS, RP0 ; Bank 2 MOVLW ADDRH ; MOVWF EEADRH ; MSByte of Program Address to read MOVLW ADDRL ; MOVWF EEADR ; LSByte of Program Address to read BSF STATUS, RP0 ; Bank 3 BSF EECON1, EEPGD ; Point to PROGRAM memory BSF EECON1, RD ; EEPROM Read NOP NOP ; Any instructions here are ignored as program ; memory is read in third cycle after BSF EECON1,RD BCF STATUS, RP0 ; Bank 2 MOVF EEDATA, W ; W = LSByte of Program EEDATA MOVF EEDATH, W ; W = MSByte of Program EEDATA DS30292A-J-page 44 Preliminary 2000 Microchip Technology Inc.

BSF EECON1,WR BSF EECON1,WR BSF STATUS, RP1 ; BCF STATUS, RP0 ; Bank 2 MOVLW ADDRH ; MOVWF EEADRH ; MSByte of Program Address to read MOVLW ADDRL ; MOVWF EEADR ; LSByte of Program Address to read MOVLW DATAH ; MOVWF EEDATH ; MS Program Memory Value to write MOVLW DATAL ; MOVWF EEDATA ; LS Program Memory Value to write BSF STATUS, RP0 ; Bank 3 BSF EECON1, EEPGD ; Point to PROGRAM memory BSF EECON1, WREN ; Enable writes BCF INTCON, GIE ; Disable Interrupts MOVLW 55h ; Required MOVWF EECON2 ; Write 55h Sequence MOVLW AAh ; MOVWF EECON2 ; Write AAh BSF EECON1, WR ; Set WR bit to begin write ; ; NOP ; Instructions here are ignored by the microcontroller ; NOP ; Microcontroller will halt operation and wait for ; a write complete. After the write ; the microcontroller continues with 3rd instruction BSF INTCON, GIE ; Enable Interrupts BCF EECON1, WREN ; Disable writes 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 45

CP1 CP0 WRT ICSP ICSP 0 0 x Yes No No No 0 1 0 Yes No Yes No 0 1 0 Yes No No No 0 1 1 Yes Yes Yes No 0 1 1 Yes No No No 1 0 0 Yes No Yes No 1 0 0 Yes No No No 1 0 1 Yes Yes Yes No 1 0 1 Yes No No No 1 1 0 Yes No Yes Yes 1 1 1 Yes Yes Yes Yes DS30292A-J-page 46 Preliminary 2000 Microchip Technology Inc.

- CLRF TMR0 MOVWF TMR0 BSF TMR0 x CLRWDT RA4/T0CKI pin T0SE Fosc/4 0 1 T0CS 3 PS2, PS1, PS0 PSout 1 0 PSA PSout (2 ) Data bus 8 TMR0 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 47

CLKOUT (=Fosc/4) RA4/T0CKI pin 0 M U X 1 1 0 M U X SYNC 2 Cycles 8 TMR0 reg T0SE T0CS PSA Set flag bit T0IF on Overflow 0 1 M U X 8 8 PSA 8 - to - 1MUX PS2:PS0 WDT Enable bit 0 1 M U X PSA WDT Time-out T0CS, T0SE, PSA, PS2:PS0 (OPTION_REG<5:0>) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 01h,101h TMR0 Timer0 module s register xxxx xxxx uuuu uuuu 0Bh,8Bh, 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 81h,181h OPTION_REG RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 85h TRISA PORTA --11 1111 --11 1111 x u - DS30292A-J-page 48 Preliminary 2000 Microchip Technology Inc.

- U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON R= bit7 bit0 W= U= - n= bit 7-6: : bit 5-4: T1CKPS1:T1CKPS0: 11 = 1:8 10 = 1:4 01 = 1:2 00 = 1:1 bit 3: T1OSCEN: 1 = 0 = bit 2: T1SYNC: TMR1CS = 1 1 = 0 = bit 1: bit 0: TMR1CS = 0 TMR1CS: 1 = ( 0 = TMR1ON: 1 = 0 = 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 49

T1CKI (Default high) T1CKI (Default low) Set flag bit TMR1IF on Overflow TMR1 0 Synchronized clock input TMR1H TMR1L 1 RC0/T1OSO/T1CKI RC1/T1OSI T1OSC T1OSCEN Enable Oscillator(1) Fosc/4 Internal Clock TMR1ON on/off 1 0 T1SYNC Prescaler 1, 2, 4, 8 2 T1CKPS1:T1CKPS0 Synchronize det SLEEP input TMR1CS DS30292A-J-page 50 Preliminary 2000 Microchip Technology Inc.

Osc Type Freq C1 C2 LP 32 khz 33 pf 33 pf 100 khz 15 pf 15 pf 200 khz 15 pf 15 pf Crystals Tested: 32.768 khz Epson C-001R32.768K-A ± 20 PPM 100 khz Epson C-2 100.00 KC-P ± 20 PPM 200 khz STD XTL 200.000 khz ± 20 PPM Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0Bh,8Bh, 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF(1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 8Ch PIE1 PSPIE(1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 0Eh TMR1L xxxx xxxx uuuu uuuu 0Fh TMR1H xxxx xxxx uuuu uuuu 10h T1CON T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu x u - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 51

NOTES: DS30292A-J-page 52 Preliminary 2000 Microchip Technology Inc.

7.0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 bit7 TOUTPS 3 TOUTPS 2 TOUTPS 1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 bit0 R= W= U= 0 - n= bit 7: bit 6-3: TOUTPS3:TOUTPS0: 0000 = 1:1 0001 = 1:2 1111 = 1:16 bit 2: TMR2ON: 1 = 0 = bit 1-0: T2CKPS1:T2CKPS0: 00 = 01 = 1x = 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 53

Sets flag bit TMR2IF 1:1 to 1:16 4 TMR2 (1) Reset EQ TMR2 reg Comparator PR2 reg 1:1, 1:4, 1:16 2 Fosc/4 Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0Bh,8Bh, 10Bh, 18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 11h TMR2 Timer2 module s register 0000 0000 0000 0000 12h T2CON TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0-000 0000-000 0000 92h PR2 Timer2 Period Register 1111 1111 1111 1111 x u - DS30292A-J-page 54 Preliminary 2000 Microchip Technology Inc.

PIC16F87X U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 CCPxX CCPxY CCPxM3 CCPxM2 CCPxM1 CCPxM0 R = bit7 bit0 W = U = - n = bit 7-6: : bit 5-4: CCPxX:CCPxY: : : PWM : bit 3-0: CCPxM3:CCPxM0: 0000 = 0100 = 0101 = 0110 = 0111 = 1000 = 1001 = 1010 = 1011 = 11xx = 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 55

. ;Turn CCP module off CLRF CCP1CON MOVLW NEW_CAPT_PS ;Load the W reg with ; the new prescaler ; mode value and CCP ON MOVWF CCP1CON ; value ;Load CCP1CON with this RC2/CCP1 Pin CCP1IF (PIR1<2>) ³ 1, 4, 16 and edge detect Q s CCP1CON<3:0> CCPR1H TMR1H CCPR1L TMR1L DS30292A-J-page 56 Preliminary 2000 Microchip Technology Inc.

Q A/D CCP2 RC2/CCP1 Pin TRISC<2> S R Output Logic CCP1CON<3:0> (PIR1<2>) match CCPR1H CCPR1L Comparator TMR1H TMR1L Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0Bh,8Bh, 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 87h TRISC PORTC Data Direction Register 1111 1111 1111 1111 0Eh TMR1L xxxx xxxx uuuu uuuu 0Fh TMR1H xxxx xxxx uuuu uuuu 10h T1CON T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu 15h CCPR1L (LSB) xxxx xxxx uuuu uuuu 16h CCPR1H (MSB) xxxx xxxx uuuu uuuu 17h CCP1CON CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 x u- 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 57

PWM = [(PR2) + 1] 4 TOSC (TMR2 ) [ ] Duty cycle registers CCP1CON<5:4> CCPR1L CCPR1H (Slave) Comparator TMR2 Comparator PR2 (Note 1) Clear Timer, CCP1 pin and latch D.C. R S Q TRISC<2> RC2/CCP1 1: Period Duty Cycle TMR2 = PR2 = Fosc log ( Fpwm ) log (2) bits TMR2 = PR2 TMR2 = Duty Cycle DS30292A-J-page 58 Preliminary 2000 Microchip Technology Inc.

1. 2. 3. 4. 5. PWM 1.22 khz 4.88 khz 19.53 khz 78.12 khz 156.3 khz 208.3 khz (1, 4, 16) 16 4 1 1 1 1 PR2 0xFF 0xFF 0xFF 0x3F 0x1F 0x17 10 10 10 8 7 5.5 Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POR BOR 0Bh,8Bh, 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 87h TRISC 1111 1111 1111 1111 11h TMR2 0000 0000 0000 0000 92h PR2 1111 1111 1111 1111 12h T2CON TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0-000 0000-000 0000 15h CCPR1L (LSB) xxxx xxxx uuuu uuuu 16h CCPR1H (MSB) xxxx xxxx uuuu uuuu 17h CCP1CON CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 x u - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 59

NOTES: DS30292A-J-page 60 Preliminary 2000 Microchip Technology Inc.

+0 Peripheral Interface Inter-Integrated Circuit 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 61

R/W-0 R/W-0 R-0 R-0 R-0 R-0 R-0 R-0 SMP CKE D/A P S R/W UA BF R = bit7 bit0 W = U = - n = bit 7: bit 6: bit 5: bit 4: bit 3: bit 2: bit 1: bit 0: SMP: 1 = 0 = : 1= 0= CKE: SPI Mode: CKP = 0 1 = 0 = CKP = 1 1 = 0 = : 1 = 0 = D/A: 1 = 0 = P: 1 = 0 = S: 1 = 0 = R/W: I 2 C : 1 = 0 = : 1 = 0 = UA: 1 = 0 = BF: 1 = 0 = 1 = 0 = DS30292A-J-page 62 2000 Microchip Technology Inc.

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 R = bit7 bit0 W = - n = bit 7: WCOL: : 1 = 0 = : 1 = 0 = bit 6: SSPOV: 1 = 0 = 1 = 0 = bit 5: SSPEN: 1 = 0 = 1 = 0 = bit 4: CKP: 1 = 0 = 1 = 0 = bit 3-0: SSPM3:SSPM0: 0000 = FOSC/4 0001 = FOSC/16 0010 = FOSC/64 0011 = TMR2 /2 0100 = 0101 = 0110 = 0111 = 1000 = FOSC / (4 * (SSPADD+1) ) 1011 = 1110 = 1111 = 1001, 1010, 1100, 1101 = 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 63

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN R = bit7 bit0 W = U = - n = bit 7: GCEN: 1 = 0 = bit 6: bit 5: bit 4: bit 3: bit 2: bit 1: ACKSTAT: : 1 = 0 = ACKDT: : 1 = 0 = ACKEN: : 1 = 0 = RCEN: 1 = 0 = PEN: 1 = 0 = RSEN: 1 = 0 = bit 0: SEN: 1 = 0 = DS30292A-J-page 64 2000 Microchip Technology Inc.

SDI SDO bit0 SSPBUF reg SSPSR reg SS SCK SS 2 SSPM3:SSPM0 SMP:CKE 4 2 TMR2 2 4, 16, 64 TOSC 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 65

BSF STATUS, RP0 ;Specify Bank 1 LOOP BTFSS SSPSTAT, BF ;Has data been ;received ;(transmit ;complete)? GOTO LOOP ;No BCF STATUS, RP0 ;Specify Bank 0 MOVF SSPBUF, W ;W reg = contents ;of SSPBUF MOVW RXDATA ;Save in user RAM F MOVF TXDATA, W ;W reg = contents ; of TXDATA MOVW SSPBUF ;New data to xmit F SPI Master SSPM3:SSPM0 = 00xxb SPI Slave SSPM3:SSPM0 = 010xb SDO SDI (SSPBUF) (SSPBUF) (SSPSR) SDI SDO (SSPSR) MSb LSb MSb LSb SCK SCK 1 2 DS30292A-J-page 66 2000 Microchip Technology Inc.

FOSC/4 ( TCY) FOSC/16 ( 4 TCY) FOSC/64 ( 16 TCY) 2 /2 SSPBUF SCK (CKP = 0 CKE = 0) SCK (CKP = 1 CKE = 0) SCK (CKP = 0 CKE = 1) 4 SCK (CKP = 1 CKE = 1) SDO bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 (CKE = 0) SDO bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 (CKE = 1) SDI (SMP = 0) bit7 bit0 (SMP = 0) SDI (SMP = 1) bit7 bit0 (SMP = 1) SSPIF SSPSR to SSPBUF Next Q4 cycle after Q2 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 67

0100 SS SCK (CKP = 0 CKE = 0) SCK (CKP = 1 CKE = 0) SSPBUF SDO bit7 bit6 bit7 bit0 SDI (SMP = 0) (SMP = 0) bit7 bit7 bit0 SSPIF SSPSR to SSPBUF Next Q4 cycle after Q2 DS30292A-J-page 68 2000 Microchip Technology Inc.

SS optional SCK (CKP = 0 CKE = 0) SCK (CKP = 1 CKE = 0) SSPBUF SDO bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 SDI (SMP = 0) (SMP = 0) SSPIF SSPSR to SSPBUF bit7 bit0 Next Q4 cycle after Q2 SS not optional SCK (CKP = 0 CKE = 1) SCK (CKP = 1 CKE = 1) SSPBUF SDO bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 SDI (SMP = 0) (SMP = 0) bit7 bit0 SSPIF SSPSR to SSPBUF Next Q4 cycle after Q2 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 69

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POR, BOR MCLR, WDT 0Bh, 8Bh, 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 13h SSPBUF / xxxx xxxx uuuu uuuu 14h SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000 94h SSPSTAT SMP CKE D/A P S R/W UA BF 0000 0000 0000 0000 x u - DS30292A-J-page 70 2000 Microchip Technology Inc.

SCL SDA MSb SSPBUF reg SSPSR reg Match SSPADD reg LSb Addr Match S, P (SSPSTAT reg) SSPADD<6:0> 7 Baud Rate Generator SCL SDA MSb SSPBUF reg SSPSR reg Match SSPADD reg LSb / Addr Match Set/Clear S bit and Clear/Set P bit (SSPSTAT reg) and Set SSPIF 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 71

a) b) a) b) c) d) - 1111 0 A9 A8 0 1. 2. 3. 4. 5. 6. 7. 8. 9. DS30292A-J-page 72 2000 Microchip Technology Inc.

SSPIF BF SSPOV SSPSR SSPBUF ACK 0 0 Yes Yes Yes 1 0 No No Yes 1 1 No No Yes 0 1 Yes No Yes SDA A7 A6 A5 A4 A3 A2 A1 R/W=0 ACK ACK D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 Not ACK D0 SCL S 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 P SSPIF BF (SSPSTAT<0>) SSPOV (SSPCON<6>) SSPBUF ACK 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 73

SDA R/W = 1 ACK A7 A6 A5 A4 A3 A2 A1 R/W = 0 Not ACK D7 D6 D5 D4 D3 D2 D1 D0 SCL SSPIF S 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 Data in sampled P BF (SSPSTAT<0>) SSPBUF SSP CKP (SSPCON<4>) SSPBUF (SSPBUF DS30292A-J-page 74 2000 Microchip Technology Inc.

Clock is held low until update of SSPADD has tacken place Receive First Byte of Address R/W = 0 Receive Second Byte of Address Receive First Byte of Address R/W=1 SDA 1 1 1 1 0 A9 A8 ACK A7 A6 A5 A4 A3 A2 A1 A0 ACK 1 1 1 1 0 A9 A8 SCL S 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 Sr SSPIF (PIR1<3>) Cleared in software Cleared in software BF (SSPSTAT<0>) SSPBUF is written with contents of SSPSR Dummy read of SSPBUF to clear BF flag Dummy read of SSPBUF to clear BF flag UA (SSPSTAT<1>) UA is set indicating that the SSPADD needs to be updated Cleared by hardware when SSPADD is updated. Cleared by hardware when SSPADD is updated. UA is set indicating that SSPADD needs to be updated ACK Master sends NACK Transmit is complete Transmitting Data Byte ACK D7 D6 D5 D4 D3 D2 D1 D0 1 2 3 4 5 6 7 8 9 P CKP has to be set for clock to be released Cleared in software Bus Master terminates transfer Write of SSPBUF initiates transmit 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 75

Clock is held low until update of SSPADD has tacken place Receive First Byte of Address Receive Second Byte of Address R/W = 0 Receive Data Byte R/W = 1 SDA 1 1 1 1 0 A9 A8 ACK ACK A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 ACK SCL S 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 SSPIF (PIR1<3>) Cleared in software Cleared in software BF (SSPSTAT<0>) SSPBUF is written with contents of SSPSR Dummy read of SSPBUF to clear BF flag Dummy read of SSPBUF to clear BF flag UA (SSPSTAT<1>) UA is set indicating that the SSPADD needs to be updated Cleared by hardware when SSPADD is updated with low byte of address. Cleared by hardware when SSPADD is updated with high byte of address. UA is set indicating that SSPADD needs to be updated Bus Master terminates transfer P Read of SSPBUF clears BF flag DS30292A-J-page 76 2000 Microchip Technology Inc.

Address is compared to General Call Address after ACK, set interrupt flag SDA R/W = 0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK SCL SSPIF S 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 BF (SSPSTAT<0>) SSPOV (SSPCON<6>) SSPBUF '0' GCEN (SSPCON2<7>) '1' 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 77

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POR, BOR MCLR, WDT 0Bh, 8Bh, 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 0Dh PIR2 (2) EEIF BCLIF CCP2IF -r-0 0--0 -r-0 0--0 8Dh PIE2 (2) EEIE BCLIE CCP2IE -r-0 0--0 -r-0 0--0 13h SSPBUF xxxx xxxx uuuu uuuu 14h SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000 91h SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 0000 0000 0000 0000 94h SSPSTAT SMP CKE D/A P S R/W UA BF 0000 0000 0000 0000 x u - DS30292A-J-page 78 2000 Microchip Technology Inc.

SSPM3:SSPM0, SSPADD<6:0> SSPBUF SDA SCL SDA in Receive Enable MSb SSPSR LSb,, clock cntl clock arbitrate/wcol detect (hold off clock source) SCL in Bus Collision, Write collision detect Clock Arbitration State counter for end of XMIT/RCV S, P, WCOL (SSPSTAT) / SSPIF, BCLIF ACKSTAT, PEN (SSPCON2) 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 79

- - - - - - a) b) c) d) e) f) g) h) DS30292A-J-page 80 2000 Microchip Technology Inc.

i) j) k) l) SSPM3:SSPM0 SSPADD<6:0> SSPM3:SSPM0 SCL CLKOUT BRG Down Counter Fosc/4 SDA DX DX-1 SCL SCL de-asserted but slave holds SCL low (clock arbitration) SCL allowed to transition high BRG value BRG reload BRG ( Q2 Q4 ) 03h 02h 01h 00h (hold off) 03h 02h SCL, BRG 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 81

SEN SDA = 1, SCL = 1 (SSPSTAT<3>) SSPIF T BRG T BRG SSPBUF SDA 1st Bit T BRG 2nd Bit SCL S T BRG DS30292A-J-page 82 2000 Microchip Technology Inc.

SSPEN = 1, SSPCON<3:0> = 1000 Idle Mode SEN (SSPCON2<0> = 1) Bus collision detected, No Set BCLIF, SDA = 1? Release SCL, SCL = 1? Clear SEN Yes Load BRG with SSPADD<6:0> No Yes SCL= 0? No SDA = 0? No BRG Rollover? Yes Yes Reset BRG Force SDA = 0, Load BRG with SSPADD<6:0>, Set S bit. No SCL = 0? No BRG rollover? Yes Yes Reset BRG Force SCL = 0, Start Condition Done, Clear SEN and set SSPIF 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 83

Set S (SSPSTAT<3>) SSPCON2 SDA = 1,, SDA = 1, SCL = 1 SCL ) SSPIF T BRG T BRG T BRG SDA End of Xmit 1st Bit SSPBUF T BRG SCL T BRG Sr = DS30292A-J-page 84 2000 Microchip Technology Inc.

Start B SSPEN = 1, SSPCON<3:0> = 1000 RSEN = 1 Force SCL = 0 SCL = 0? No Yes, BRG SSPADD<6:0> BRG rollover? No Yes SCL SCL = 1? No ( ) Yes Bus Collision, Set BCLIF, Release SDA, Clear RSEN No SDA = 1? Yes BRG SSPADD<6:0> C A 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 85

B C A Yes No No No SCL = 1? SDA = 0? BRG rollover? Yes Yes BRG Force SDA = 0, BRG SSPADD<6:0> No SCL = '0'? No BRG rollover? Yes Yes Reset BRG Force SCL = 0, RSEN SSPIF DS30292A-J-page 86 2000 Microchip Technology Inc.

2000 Microchip Technology Inc. Preliminary DS30292A-J-page 87

SSPBUF Num_Clocks = 0, BF = 1 Force SCL = 0 Num_Clocks = 8? Yes Force BF i = 0 No BRG SSPADD<6:0> BRG SDA = Current Data bit BRG SSPADD<6:0> BRG BRG rollover? No BRG rollover? No Yes Yes Stop BRG, Force SCL = 1 Force SCL = 1, Stop BRG SCL = 1? No ( ) ( ) SCL = 1? No Yes Yes Read SDA and place into ACKSTAT bit (SSPCON2<6>) SDA = Data bit? Yes No Bus collision detected Set BCLIF, hold prescale off, Clear XMIT enable BRG SSPADD<6:0> BRG SSPADD<6:0> SCL Yes Rollover? No BRG rollover? No SCL = 0? No SDA = Data bit? No Yes Yes Num_Clocks = Num_Clocks + 1 Yes BRG Force SCL = 0, SSPIF DS30292A-J-page 88 2000 Microchip Technology Inc.

PIC16F87X SDA Write SSPCON2<0> SEN = 1 START condition begins SEN = 0 Transmit Address to Slave R/W = 0 From slave clear ACKSTAT bit SSPCON2<6> Transmitting Data or Second Half of 10-bit Address A7 A6 A5 A4 A3 A2 A1 ACK = 0 D7 D6 D5 D4 D3 D2 D1 D0 ACK ACKSTAT in SSPCON2 = 1 SSPBUF written with 7 bit address and R/W start transmit SCL SSPIF S 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 cleared in software SCL held low while CPU responds to SSPIF cleared in software service routine From SSP interrupt P Cleared in software BF (SSPSTAT<0>) SSPBUF written SSPBUF is written in software SEN After start condition SEN cleared by hardware. PEN R/W 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 89

DS30292A-J-page 90 2000 Microchip Technology Inc.

RCEN = 1 Num_Clocks = 0, SDA Force SCL=0, BRG SSPADD<6:0> BRG rollover? No Yes SCL ( ) SCL = 1? No Yes Sample SDA, SSPSR BRG SSPADD<6:0> BRG rollover? No SCL = 0? No Yes Yes Num_Clocks = Num_Clocks + 1 No Num_Clocks = 8? Yes Force SCL = 0, SSPIF BF SSPSR SSPBUF RCEN 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 91

SDA Write to SSPCON2<0> (SEN = 1) Begin Start Condition SEN = 0 Write to SSPBUF occurs here Start XMIT Transmit Address to Slave A7 A6 A5 A4 A3 A2 A1 ACK from Slave R/W = 1 Master configured as a receiver by programming SSPCON2<3>, (RCEN = 1) ACK D7 Receiving Data from Slave D6 D5 D4 D3 D2 RCEN cleared automatically D1 D0 Write to SSPCON2<4> to start acknowledge sequence SDA = ACKDT (SSPCON2<5>) = 0 ACK from Master SDA = ACKDT = 0 ACK RCEN = 1 start next receive D7 Receiving Data from Slave D6 D5 D4 D3 D2 Set ACKEN start acknowledge sequence SDA = ACKDT = 1 RCEN cleared automatically D1 D0 ACK PEN bit = 1 written here ACK is not sent SCL SSPIF S 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 Set SSPIF interrupt at end of receive Data shifted in on falling edge of CLK 5 Set SSPIF interrupt at end of acknowledge sequence 6 7 8 9 Set SSPIF at end of receive P SDA = 0, SCL = 1 while CPU responds to SSPIF Cleared in software Cleared in software Cleared in software Cleared in software Cleared in software BF (SSPSTAT<0>) Last bit is shifted into SSPSR and contents are unloaded into SSPBUF SSPOV SSPOV is set because SSPBUF is still full ACKEN Bus Master terminates transfer Set SSPIF interrupt at end of acknowledge sequence Set P bit (SSPSTAT<4>) and SSPIF DS30292A-J-page 92 2000 Microchip Technology Inc.

SSPCON2 ACKEN = 1, ACKDT = 0 ACKEN SDA D0 Tbrg ACK Tbrg SCL 8 9 SSPIF SSPIF SSPIF Note: Tbrg= 1 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 93

ACKEN Force SCL = 0 BRG rollover? Yes No SCL = 0? No Yes ACKDT (SSPCON2<5>) SDA BRG SSPADD<6:0> Yes Force SCL = 0, SCL = 0? BRG ACKEN, SSPIF No No ACKDT = 1? No BRG rollover? Yes Force SCL = 1 Yes Yes SDA = 1? No No ( ) SCL = 1? Yes Bus collision detected, BCLIF SCL ACKEN BRG SSPADD <6:0> DS30292A-J-page 94 2000 Microchip Technology Inc.

SSPCON2 PEN SCL = 1 for T BRG, followed by SDA = 1 for T BRG after SDA sampled high. P bit (SSPSTAT<4>) is set PEN (SSPCON2<2>) SCL T BRG SDA ACK T BRG T BRG P T BRG SCL brought high after T BRG SDA asserted low before rising edge of clock to setup stop condition. : T BRG = 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 95

SSPEN = 1, SSPCON<3:0> = 1000 PEN = 1 BRG Force SDA = 0 SCL BRG rollover? No SDA = 0? No Yes SDA, BRG Yes BRG BRG rollover? No BRG rollover? No Yes Yes De-assert SCL, SCL = 1 P bit Set? Yes No Bus Collision detected, BCLIF PEN ( ) SCL = 1? No SDA going from 0 to 1 while SCL = 1 Set SSPIF, Stop Condition done PEN cleared. Yes DS30292A-J-page 96 2000 Microchip Technology Inc.

BRG SCL SCL = 1 BRG SSPADD<6:0> BRG SCL, SCL SCL = 1 BRG SCL SCL (T osc 4) SCL SDA T BRG T BRG T BRG 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 97

SCL = 0 SDA SDA SDA SCL SDA SCL BCLIF DS30292A-J-page 98 2000 Microchip Technology Inc.

a) b) If: then: SDA SEN. BCLIF SDA = 0, SCL = 1 S SSPIF SDA SCL SEN BCLIF S SEN, SDA = 1 SCL=1 START SDA BCLIF SDA = 0, SCL = 1 S SSPIF SEN SSP SSPIF BCLIF SSPIF SSPIF BCLIF 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 99

SDA = 0, SCL = 1 SDA T BRG T BRG SCL SEN BCLIF S SSPIF SEN, SDA = 1 SCL = 1 BRG SCL = 0, BCLIF '0' '0' SDA = 0 SCL = 0 Bus, BCLIF '0' '0' SDA = 0, SCL = 1 Set S SSPIF SDA Less than T BRG SDA BRG SDA TBRG SCL SEN BCLIF '0' S SCL pulled low after BRG Timeout SEN, SDA = 1, SCL = 1 S SSPIF SDA = 0, SCL = 1 SSPIF DS30292A-J-page 100 2000 Microchip Technology Inc.

a) b) SDA SCL Sample SDA when SCL goes high. If SDA = 0, set BCLIF and release SDA and SCL RSEN BCLIF S SSPIF '0' '0' Cleared in software '0' '0' TBRG TBRG SDA SCL BCLIF RSEN SCL goes low before SDA, Set BCLIF. Release SDA and SCL Interrupt cleared in software S SSPIF '0' '0' '0' '0' 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 101

a) b) SDA TBRG TBRG TBRG SDA sampled low after TBRG, Set BCLIF SCL SDA asserted low PEN BCLIF P SSPIF '0' '0' '0' '0' TBRG TBRG TBRG SDA SCL Assert SDA SCL goes low before SDA goes high Set BCLIF PEN BCLIF P SSPIF '0' '0' DS30292A-J-page 102 2000 Microchip Technology Inc.

R p R s VOL max = 0.4V R p VDD = 5V+10% 3 ma VOL max = 0.4V R p min = (5.5-0.4)/0.003 = 1.7 kω R p VDD VDD R s R p VDD + 10% R p R p DEVICE R s R s SDA SCL : VDD C b =10-400 pf 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 103

NOTES: DS30292A-J-page 104 2000 Microchip Technology Inc.

R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R-1 R/W-0 CSRC TX9 TXEN SYNC BRGH TRMT TX9D R = bit7 bit0 W = U = - n = bit 7: CSRC: Don t care 1 = 0 = bit 6: TX9: 1 = 0 = bit 5: TXEN: 1 = 0 = bit 4: SYNC: 1 = 0 = bit 3: : bit 2: BRGH: 1 = 0 = bit 1: TRMT: 1 = 0 = bit 0: TX9D: 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 105

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R-0 R-0 R-x SPEN RX9 SREN CREN ADDEN FERR OERR RX9D R = bit7 bit0 W = U = - n = bit 7: SPEN: 1 = 0 = bit 6: RX9: 1 = 0 = bit 5: SREN: Don t care 1 = 0 = bit 4: CREN: 1 = 0 = 1 = 0 = bit 3: ADDEN: 1 = 0 = bit 2: FERR: 1 = 0 = bit 1: OERR: 1 = 0 = bit 0: RX9D: DS30292A-J-page 106 Preliminary 2000 Microchip Technology Inc.

FOSC = 16 MHz = 9600 BRGH = 0 SYNC = 0 = Fosc / (64 (X + 1)) 9600 = 16000000 /(64 (X + 1)) X = 25.042 = 25 =16000000 / (64 (25 + 1)) = 9615 = ( - ) = (9615-9600) / 9600 = 0.16% FOSC/(16(X + 1)) SYNC 0 1 X = value in SPBRG (0 to 255) BRGH = 0 ( ) = FOSC/(64(X+1)) = FOSC/(4(X+1)) BRGH = 1 ( ) = FOSC/(16(X+1)) NA Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 98h TXSTA CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0000-010 0000-010 18h RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x 99h SPBRG 0000 0000 0000 0000 x - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 107

(K) FOSC = 20 MHz K % SPBRG (decimal) 16 MHz K % SPBRG (decimal) 10 MHz K % SPBRG (decimal) 7.15909 MHz K % SPBRG (decimal) 0.3 NA - - NA - - NA - - NA - - 1.2 NA - - NA - - NA - - NA - - 2.4 NA - - NA - - NA - - NA - - 9.6 NA - - NA - - 9.766 +1.73 255 9.622 +0.23 185 19.2 19.53 +1.73 255 19.23 +0.16 207 19.23 +0.16 129 19.24 +0.23 92 76.8 76.92 +0.16 64 76.92 +0.16 51 75.76-1.36 32 77.82 +1.32 22 96 96.15 +0.16 51 95.24-0.79 41 96.15 +0.16 25 94.20-1.88 18 300 294.1-1.96 16 307.69 +2.56 12 312.5 +4.17 7 298.3-0.57 5 500 500 0 9 500 0 7 500 0 4 NA - - HIGH 5000-0 4000-0 2500-0 1789.8-0 LOW 19.53-255 15.625-255 9.766-255 6.991-255 (K) FOSC = 5.0688 MHz K % SPBRG (decimal) 4 MHz K % SPBRG (decimal) 3.579545 MHz K % SPBRG value (decimal) 1 MHz KBAUD % SPBRG (decimal) 32.768 khz K % SPBRG (decimal) 0.3 NA - - NA - - NA - - NA - - 0.303 +1.14 26 1.2 NA - - NA - - NA - - 1.202 +0.16 207 1.170-2.48 6 2.4 NA - - NA - - NA - - 2.404 +0.16 103 NA - - 9.6 9.6 0 131 9.615 +0.16 103 9.622 +0.23 92 9.615 +0.16 25 NA - - 19.2 19.2 0 65 19.231 +0.16 51 19.04-0.83 46 19.24 +0.16 12 NA - - 76.8 79.2 +3.13 15 76.923 +0.16 12 74.57-2.90 11 83.34 +8.51 2 NA - - 96 97.48 +1.54 12 1000 +4.17 9 99.43 +3.57 8 NA - - NA - - 300 316.8 +5.60 3 NA - - 298.3-0.57 2 NA - - NA - - 500 NA - - NA - - NA - - NA - - NA - - HIGH 1267-0 100-0 894.9-0 250-0 8.192-0 LOW 4.950-255 3.906-255 3.496-255 0.9766-255 0.032-255 (K) FOSC = 20 MHz K % 16 MHz SPBRG (decimal) K % 10 MHz SPBRG (decimal) K % SPBRG 7.15909 MHz (decimal) K % SPBRG (decimal) 0.3 NA - - NA - - NA - - NA - - 1.2 1.221 +1.73 255 1.202 +0.16 207 1.202 +0.16 129 1.203 +0.23 92 2.4 2.404 +0.16 129 2.404 +0.16 103 2.404 +0.16 64 2.380-0.83 46 9.6 9.469-1.36 32 9.615 +0.16 25 9.766 +1.73 15 9.322-2.90 11 19.2 19.53 +1.73 15 19.23 +0.16 12 19.53 +1.73 7 18.64-2.90 5 76.8 78.13 +1.73 3 83.33 +8.51 2 78.13 +1.73 1 NA - - 96 104.2 +8.51 2 NA - - NA - - NA - - 300 312.5 +4.17 0 NA - - NA - - NA - - 500 NA - - NA - - NA - - NA - - HIGH 312.5-0 250-0 156.3-0 111.9-0 LOW 1.221-255 0.977-255 0.6104-255 0.437-255 (K) FOSC = 5.0688 MHz K % SPBRG (decimal) 4 MHz K % SPBRG (decimal) 3.579545 MHz K % SPBRG (decimal) 1 MHz K % SPBRG (decimal) 32.768 khz K % SPBRG (decimal) 0.3 0.31 +3.13 255 0.3005-0.17 207 0.301 +0.23 185 0.300 +0.16 51 0.256-14.67 1 1.2 1.2 0 65 1.202 +1.67 51 1.190-0.83 46 1.202 +0.16 12 NA - - 2.4 2.4 0 32 2.404 +1.67 25 2.432 +1.32 22 2.232-6.99 6 NA - - 9.6 9.9 +3.13 7 NA - - 9.322-2.90 5 NA - - NA - - 19.2 19.8 +3.13 3 NA - - 18.64-2.90 2 NA - - NA - - 76.8 79.2 +3.13 0 NA - - NA - - NA - - NA - - 96 NA - - NA - - NA - - NA - - NA - - 300 NA - - NA - - NA - - NA - - NA - - 500 NA - - NA - - NA - - NA - - NA - - HIGH 79.2-0 62.500-0 55.93-0 15.63-0 0.512-0 LOW 0.3094-255 3.906-255 0.2185-255 0.0610-255 0.0020-255 DS30292A-J-page 108 Preliminary 2000 Microchip Technology Inc.

(K) FOSC = 20 MHz K % 16 MHz SPBRG (decimal) K % 10 MHz SPBRG (decimal) K % SPBRG 7.16 MHz (decimal) K % SPBRG (decimal) 9.6 9.615 +0.16 129 9.615 +0.16 103 9.615 +0.16 64 9.520-0.83 46 19.2 19.230 +0.16 64 19.230 +0.16 51 18.939-1.36 32 19.454 +1.32 22 38.4 37.878-1.36 32 38.461 +0.16 25 39.062 +1.7 15 37.286-2.90 11 57.6 56.818-1.36 21 58.823 +2.12 16 56.818-1.36 10 55.930-2.90 7 115.2 113.636-1.36 10 111.111-3.55 8 125 +8.51 4 111.860-2.90 3 250 250 0 4 250 0 3 NA - - NA - - 625 625 0 1 NA - - 625 0 0 NA - - 1250 1250 0 0 NA - - NA - - NA - - (K) FOSC = 5.068 MHz SPBRG 4 MHz K % (decimal) K % 3.579 MHz SPBRG (decimal) K % 1 MHz SPBRG (decimal) K % 32.768 khz SPBRG (decimal) K % 9.6 9.6 0 32 NA - - 9.727 +1.32 22 8.928-6.99 6 NA - - 19.2 18.645-2.94 16 1.202 +0.17 207 18.643-2.90 11 20.833 +8.51 2 NA - - 38.4 39.6 +3.12 7 2.403 +0.13 103 37.286-2.90 5 31.25-18.61 1 NA - - 57.6 52.8-8.33 5 9.615 +0.16 25 55.930-2.90 3 62.5 +8.51 0 NA - - 115.2 105.6-8.33 2 19.231 +0.16 12 111.860-2.90 1 NA - - NA - - 250 NA - - NA - - 223.721-10.51 0 NA - - NA - - 625 NA - - NA - - NA - - NA - - NA - - 1250 NA - - NA - - NA - - NA - - NA - - SPBRG (decimal) 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 109

1. 2. 3. 4. 5. 6. 7. TXIE TXIF TXREG 8 MSb LSb (8) 0 TSR RC6/TX/CK TXEN TRMT SPEN SPBRG TX9D TX9 DS30292A-J-page 110 Preliminary 2000 Microchip Technology Inc.

TXREG BRG ( ) 1 RC6/TX/CK ( ) TXIF (Transmit buffer reg. empty flag) 0 1 7/8 WORD 1 TRMT bit (Transmit shift reg. empty flag) WORD 1 Transmit Shift Reg TXREG BRG ( ) RC6/TX/CK ( ) TXIF (interrupt reg. flag) 1 2 0 1 7/8 0 WORD 1 WORD 2 TRMT bit (Transmit shift reg. empty flag) WORD 1 WORD 2 Transmit Shift Reg. Transmit Shift Reg. Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 18h RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x 19h TXREG USART Transmit Register 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 98h TXSTA CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0000-010 0000-010 99h SPBRG Baud Rate Generator Register 0000 0000 0000 0000 x - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 111

. DS30292A-J-page 112 Preliminary 2000 Microchip Technology Inc.

x64 SPBRG CREN ³ 64 or ³ 16 OERR FERR MSb RSR LSb (8) 7 ² ² ² 1 0 RC7/RX/DT RX9 8 SPEN RX9 ADDEN RX9 ADDEN RSR<8> 8 RX9D RCREG FIFO 8 Interrupt RCIF RCIE 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 113

RC7/RX/DT (pin) 0 1 8 0 8 RSR 8 = 0, 8 = 1, 1 RCREG RCIF ri do RC7/RX/DT ( ) RSR 0 1 8 0 8 8 = 1, 1 RCREG 8 = 0, RCIF Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 18h RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x 1Ah RCREG USART 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 98h TXSTA CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0000-010 0000-010 99h SPBRG 0000 0000 0000 0000 x - DS30292A-J-page 114 Preliminary 2000 Microchip Technology Inc.

1. 2. 3. 4. 5. 6. 7. Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 18h RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x 19h TXREG USART 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 98h TXSTA CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0000-010 0000-010 99h SPBRG 0000 0000 0000 0000 x - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 115

Q1Q2 Q3Q4 Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2 Q3Q4 Q3Q4 Q1Q2 Q3Q4 Q1Q2 Q3Q4 Q1Q2 Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2Q3 Q4 RC7/RX/DT RC6/TX/CK TXREG reg TXIF ( TRMT TRMT 1 Bit 0 Bit 1 Bit 2 Bit 7 Bit 0 Bit 1 Bit 7 WORD 1 2 2 TXEN '1' '1' : ; SPBRG = '0' RC7/RX/DT 0 1 2 6 7 RC6/TX/CK TXREG reg TXIF TRMT TXEN DS30292A-J-page 116 Preliminary 2000 Microchip Technology Inc.

1. 2. 3. 4. 5. 6. 7. 8. 9. 10. Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 18h RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x 1Ah RCREG USART 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 98h TXSTA CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0000-010 0000-010 99h SPBRG 0000 0000 0000 0000 x - Q2 Q3 Q4Q1Q2Q3Q4Q1Q2Q3Q4 Q1Q2Q3Q4Q1Q2Q3Q4 Q1Q2Q3Q4Q1Q2Q3Q4 Q1Q2Q3Q4Q1Q2Q3Q4 Q1Q2Q3Q4 Q1 Q2 Q3 Q4 RC7/RX/DT bit0 bit1 bit2 bit3 bit4 bit5 bit6 bit7 RC6/TX/CK SREN SREN CREN '0' RCIF ( ) RXREG '0' : 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 117

a) b) c) d) e) 1. 2. 3. 4. 5. 6. 7. 1. 2. 3. 4. 5. 6. 7. 8. DS30292A-J-page 118 Preliminary 2000 Microchip Technology Inc.

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 18h RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x 19h TXREG USART 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 98h TXSTA CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0000-010 0000-010 99h SPBRG 0000 0000 0000 0000 x - Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 18h RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x 1Ah RCRE G USART 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 98h TXSTA CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0000-010 0000-010 99h SPBRG 0000 0000 0000 0000 x - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 119

NOTES: DS30292A-J-page 120 Preliminary 2000 Microchip Technology Inc.

R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 ADCS1 ADCS0 CHS2 CHS1 CHS0 GO/DONE ADON R = bit7 bit0 W = U = - n = bit 7-6: ADCS1:ADCS0: 00 = FOSC/2 01 = FOSC/8 10 = FOSC/32 11 = FRC bit 5-3: CHS2:CHS0: 000 = channel 0, (RA0/AN0) 001 = channel 1, (RA1/AN1) 010 = channel 2, (RA2/AN2) 011 = channel 3, (RA3/AN3) 100 = channel 4, (RA5/AN4) 101 = channel 5, (RE0/AN5) (1) 110 = channel 6, (RE1/AN6) (1) 111 = channel 7, (RE2/AN7) (1) bit 2: bit 1: bit 0: GO/DONE: If ADON = 1 1 = 0 = : ADON: ON 1 = 0 = 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 121

U-0 U-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 ADFM PCFG3 PCFG2 PCFG1 PCFG0 R = bit7 bit0 W = U = - n = bit 7: ADFM: 1 = 0 = bit 6-4: : bit 3-0: PCFG3:PCFG0: PCFG3: PCFG0 AN7 (1) RE2 AN6 (1) RE1 AN5 (1) RE0 AN4 RA5 AN3 RA3 AN2 RA2 AN1 RA1 A = D = AN0 RA0 VREF+ VREF- 0000 A A A A A A A A VDD VSS 8/0 0001 A A A A VREF+ A A A RA3 VSS 7/1 0010 D D D A A A A A VDD VSS 5/0 0011 D D D A VREF+ A A A RA3 VSS 4/1 0100 D D D D A D A A VDD VSS 3/0 0101 D D D D VREF+ D A A RA3 VSS 2/1 011x D D D D D D D D VDD VSS 0/0 1000 A A A A VREF+ VREF- A A RA3 RA2 6/2 1001 D D A A A A A A VDD VSS 6/0 1010 D D A A VREF+ A A A RA3 VSS 5/1 1011 D D A A VREF+ VREF- A A RA3 RA2 4/2 1100 D D D A VREF+ VREF- A A RA3 RA2 3/2 1101 D D D D VREF+ VREF- A A RA3 RA2 2/2 1110 D D D D D D D A VDD VSS 1/0 1111 D D D D VREF+ VREF- D A RA3 RA2 1/2 CHAN / REFS DS30292A-J-page 122 Preliminary 2000 Microchip Technology Inc.

1. 2. 4. 5. 6. 7. 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 123

CHS2:CHS0 111 RE2/AN7 (1) 110 RE1/AN6 (1) 101 RE0/AN5 (1) VAIN ( ) 100 011 RA5/AN4 RA3/AN3/VREF+ A/D 010 001 RA2/AN2/VREF- RA1/AN1 VREF+ ( ) PCFG3:PCFG0 VDD X000 or X010 or X100 X001 or X011 or X101 000 RA0/AN0 VREF- ( ) 00XX or 0X0X or 1000 or 1010 or 1100 1001 or 1011 or 1101 VSS PCFG3:PCFG0 DS30292A-J-page 124 Preliminary 2000 Microchip Technology Inc.

A/D A/D CHOLD = 120 pf Rs = 10 kω Conversion Error 1/2 LSb VDD = 5V Rss = 7 kω ( ) Temperature = 50 C (system max.) VHOLD = 0V @ time = 0 TACQ = Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient = TAMP + TC + TCOFF 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 125

VHOLD = (VREF - (VREF/2048)) (1 - e (-Tc/CHOLD(RIC + RSS + RS)) ) or Tc = -(120 pf)(1 kω + RSS + RS) ln(1/2047) TACQ = TAMP + TC + TCOFF TACQ = 2 µs + Tc + [(Temp - 25 C)(0.05 µs/ C)] TC = -CHOLD (RIC + RSS + RS) ln(1/2047) -120 pf (1 kω + 7 kω + 10 kω) ln(0.0004885) -120 pf (18 kω) ln(0.0004885) -2.16 µs (-7.6241) 16.47 µs TACQ = 2 µs + 16.47 µs + [(50 C - 25 C)(0.05 µs/ C)] 18.447 µs + 1.25 µs 19.72 µs Rs ANx VDD VT = 0.6V RIC 1k SS RSS VA CPIN 5 pf VT = 0.6V I leakage ± 500 na CHOLD = DAC capacitance = 120 pf VSS CPIN = VT = I LEAKAGE = RIC SS CHOLD = = = 6V 5V VDD 4V 3V 2V 5 6 7 8 9 10 11 ( kω ) DS30292A-J-page 126 Preliminary 2000 Microchip Technology Inc.

2TOSC 8TOSC 32TOSC (TAD) ADCS1:ADCS0 20 MHz 5 MHz 1.25 MHz 333.33 khz 2TOSC 00 100 ns (2) 400 ns (2) 1.6 µs 6 µs 8TOSC 01 400 ns (2) 1.6 µs 6.4 µs 24 µs (3) 32TOSC 10 1.6 µs 6.4 µs 25.6 µs (3) 96 µs (3) RC 11 2-6 µs (1, 4) 2-6 µs (1, 4) 2-6 µs (1, 4) 2-6 µs (1) µ 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 127

BSF STATUS, RP0 ; Bank 1 BCF STATUS, RP1 ; CLRF ADCON1 ; BSF PIE1, ADIE ; BCF STATUS, RP0 ; Bank 0 MOVLW B 11000001 ; MOVWF ADCON0 ; BCF PIR1, ADIF ; BSF INTCON, PEIE ; BSF INTCON, GIE ; ; ; ; ; BSF ADCON0, GO ; : ; : ; Tcy to TAD TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8 TAD9 b9 b8 b7 b6 b5 b4 b3 b2 TAD10 TAD11 b1 b0 Q4: ADRES GO ADIF DS30292A-J-page 128 Preliminary 2000 Microchip Technology Inc.

ADON = 0 Yes ADON = 0? No GO = 0? Yes No A/D = RC? Yes 1 A/D SLEEP? Yes GO = 0, ADIF = 1 No No SLEEP? Yes GO = 0, ADIF = 0 GO = 0, ADIF = 1? Yes 2TAD No No GO = 0, ADIF = 1 SLEEP Power-down A/D 2TAD Stay in Sleep Power-down A/D 2TAD 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 129

10 ADFM = 1 ADFM = 0 7 2 1 0 7 0 7 0 7 6 5 0 0000 00 0000 00 ADRESH ADRESL ADRESH ADRESL 10 10 DS30292A-J-page 130 Preliminary 2000 Microchip Technology Inc.

Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POR, BOR MCLR, WDT 0Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF (1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 8Ch PIE1 PSPIE (1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 1Eh ADRESH A/D xxxx xxxx uuuu uuuu 9Eh ADRESL A/D 1Fh ADCON0 ADCS1 ADCS0 CHS2 CHS1 CHS0 GO/DONE ADON 0000 00-0 0000 00-0 9Fh ADCON1 ADFM PCFG3 PCFG2 PCFG1 PCFG0 --0-0000 --0-0000 85h TRISA PORTA --11 1111 --11 1111 05h PORTA PORTA : PORTA --0x 0000 --0u 0000 89h (1) TRISE IBF OBF IBOV PSPMODE PORTE 0000-111 0000-111 09h (1) PORTE RE2 RE1 RE0 ---- -xxx ---- -uuu x u - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 131

NOTES: DS30292A-J-page 132 Preliminary 2000 Microchip Technology Inc.

- - - - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 133

CP1 CP0 BKBUG - WRT CPD LVP BODEN CP1 CP0 PWRTE WDTE F0SC1 F0SC0 : CONFIG bit13 bit0 2007h bit 13-12: bit 5-4: CP1:CP0: 11 = 10 = (PIC16F877, 876) 10 = (PIC16F874, 873) 01 = (PIC16F877, 876) 01 = (PIC16F874, 873) 00 = (PIC16F877, 876) 00 = (PIC16F874, 873) bit 11: DEBUG: 1 = 0 = bit 10: : bit 9: WRT: 1 = 0 = bit 8: CPD: 1 = 0 = bit 7: bit 6: bit 3: bit 2: bit 1-0: LVP: 1 = 0 = BODEN: 1 = 0 = PWRTE: 1 = 0 = WDTE: 1 = 0 = FOSC1:FOSC0: 11 = 10 = 01 = 00 = DS30292A-J-page 134 Preliminary 2000 Microchip Technology Inc.

: : Mode Freq OSC1 OSC2 XT 455 khz 2.0 MHz 4.0 MHz 68-100 pf 15-68 pf 15-68 pf 68-100 pf 15-68 pf 15-68 pf HS C1 (1) C2 (1) Clock from ext. system XTAL OSC2 RS (2) Open 8.0 MHz 16.0 MHz OSC1 RF (3) OSC1 OSC2 10-68 pf 10-22 pf SLEEP 10-68 pf 10-22 pf : 455 khz Panasonic EFO-A455K04B ± 0.3% 2.0 MHz Murata Erie CSA2.00MG ± 0.5% 4.0 MHz Murata Erie CSA4.00MG ± 0.5% 8.0 MHz Murata Erie CSA8.00MT ± 0.5% 16.0 MHz Murata Erie CSA16.00MX ± 0.5% To internal logic PIC16F87X PIC16F87X Osc Type Crystal Freq Cap. Range C1 Cap. Range C2 LP 32 khz 33 pf 33 pf 200 khz 15 pf 15 pf XT 200 khz 47-68 pf 47-68 pf 1 MHz 15 pf 15 pf 4 MHz 15 pf 15 pf HS 4 MHz 15 pf 15 pf 8 MHz 15-33 pf 15-33 pf 20 MHz 15-33 pf 15-33 pf 32 khz Epson C-001R32.768K-A ± 20 PPM 200 khz STD XTL 200.000KHz ± 20 PPM 1 MHz ECS ECS-10-13-1 ± 50 PPM 4 MHz ECS ECS-40-20-1 ± 50 PPM 8 MHz EPSON CA-301 8.000M-C ± 30 PPM 20 MHz EPSON CA-301 20.000M-C ± 30 PPM 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 135

VDD Rext Cext VSS : Fosc/4 OSC1 OSC2/CLKOUT 3 kω Rext 100 kω Cext > 20pF PIC16F87X DS30292A-J-page 136 Preliminary 2000 Microchip Technology Inc.

MCLR Vdd WDT Vdd rise SLEEP WDT BODEN S OST/PWRT OSC1 OST 10-bit Ripple counter R Q (1) On-chip RC OSC PWRT 10-bit Ripple counter PWRT OST 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 137

D VDD R C R1 MCLR PIC16F87X Ω Ω Ω DS30292A-J-page 138 Preliminary 2000 Microchip Technology Inc.

PWRTE = 0 PWRTE = 1 XT, HS, LP 72 ms + 1024TOSC 1024TOSC 72 ms + 1024TOSC 1024TOSC RC 72 ms 72 ms POR BOR TO PD 0 x 1 1 0 x 0 x 0 x x 0 1 0 1 1 1 1 0 1 1 1 0 0 1 1 u u 1 1 1 0 STATUS PCON 000h 0001 1xxx ---- --0x MCLR 000h 000u uuuu ---- --uu MCLR 000h 0001 0uuu ---- --uu WDT 000h 0000 1uuu ---- --uu WDT PC + 1 uuu0 0uuu ---- --uu 000h 0001 1uuu ---- --u0 PC + 1 (1) uuu1 0uuu ---- --uu u x - 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 139

MCLR WDT W 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu INDF 873 874 876 877 N/A N/A N/A TMR0 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu PCL 873 874 876 877 0000h 0000h PC + 1 (2) STATUS 873 874 876 877 0001 1xxx 000q quuu (3) uuuq quuu (3) FSR 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu PORTA 873 874 876 877 --0x 0000 --0u 0000 --uu uuuu PORTB 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu PORTC 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu PORTD 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu PORTE 873 874 876 877 ---- -xxx ---- -uuu ---- -uuu PCLATH 873 874 876 877 ---0 0000 ---0 0000 ---u uuuu INTCON 873 874 876 877 0000 000x 0000 000u uuuu uuuu (1) PIR1 873 874 876 877 r000 0000 r000 0000 ruuu uuuu (1) 873 874 876 877 0000 0000 0000 0000 uuuu uuuu (1) PIR2 873 874 876 877 -r-0 0--0 -r-0 0--0 -r-u u--u (1) TMR1L 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu TMR1H 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu T1CON 873 874 876 877 --00 0000 --uu uuuu --uu uuuu TMR2 873 874 876 877 0000 0000 0000 0000 uuuu uuuu T2CON 873 874 876 877-000 0000-000 0000 -uuu uuuu SSPBUF 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu SSPCON 873 874 876 877 0000 0000 0000 0000 uuuu uuuu CCPR1L 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu CCPR1H 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu CCP1CON 873 874 876 877 --00 0000 --00 0000 --uu uuuu RCSTA 873 874 876 877 0000 000x 0000 000x uuuu uuuu TXREG 873 874 876 877 0000 0000 0000 0000 uuuu uuuu RCREG 873 874 876 877 0000 0000 0000 0000 uuuu uuuu CCPR2L 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu CCPR2H 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu CCP2CON 873 874 876 877 0000 0000 0000 0000 uuuu uuuu ADRESH 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu ADCON0 873 874 876 877 0000 00-0 0000 00-0 uuuu uu-u OPTION_REG 873 874 876 877 1111 1111 1111 1111 uuuu uuuu u x - q DS30292A-J-page 140 Preliminary 2000 Microchip Technology Inc.

MCLR WDT TRISA 873 874 876 877 --11 1111 --11 1111 --uu uuuu TRISB 873 874 876 877 1111 1111 1111 1111 uuuu uuuu TRISC 873 874 876 877 1111 1111 1111 1111 uuuu uuuu TRISD 873 874 876 877 1111 1111 1111 1111 uuuu uuuu TRISE 873 874 876 877 0000-111 0000-111 uuuu -uuu PIE1 873 874 876 877 r000 0000 r000 0000 ruuu uuuu 873 874 876 877 0000 0000 0000 0000 uuuu uuuu PIE2 873 874 876 877 -r-0 0--0 -r-0 0--0 -r-u u--u PCON 873 874 876 877 ---- --qq ---- --uu ---- --uu PR2 873 874 876 877 1111 1111 1111 1111 1111 1111 SSPADD 873 874 876 877 0000 0000 0000 0000 uuuu uuuu SSPSTAT 873 874 876 877 --00 0000 --00 0000 --uu uuuu TXSTA 873 874 876 877 0000-010 0000-010 uuuu -uuu SPBRG 873 874 876 877 0000 0000 0000 0000 uuuu uuuu ADRESL 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu ADCON1 873 874 876 877 --0-0000 --0-0000 --U- Uuuu EEDATA 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu EEADR 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu EEDATH 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu EEADRH 873 874 876 877 xxxx xxxx uuuu uuuu uuuu uuuu EECON1 873 874 876 877 x--- x000 u--- u000 u--- uuuu EECON2 873 874 876 877 ---- ---- ---- ---- ---- ---- u x - q Vdd MCLR POR Tpwrt PWRT Tost OST RESET 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 141

Vdd MCLR POR Tpwrt PWRT Tost OST RESET Vdd MCLR POR Tpwrt PWRT Tost OST RESET Vdd MCLR 0V 1V 5V POR Tpwrt PWRT Tost OST RESET DS30292A-J-page 142 Preliminary 2000 Microchip Technology Inc.

return from interrupt RETFIE 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 143

EEIF EEIE PSPIF PSPIE CCP2IF CCP2IE BCLIF BCLIE ADIF ADIE RCIF RCIE TXIF TXIE SSPIF SSPIE CCP1IF CCP1IE TMR2IF TMR2IE TMR1IF TMR1IE T0IF T0IE INTF INTE RBIF RBIE PEIE GIE (SLEEP ) CPU T0IF INTF RBIF PSPIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF EEIF BCLIF CCP2IF PIC16F876/873 Yes Yes Yes - Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes PIC16F877/874 Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes DS30292A-J-page 144 Preliminary 2000 Microchip Technology Inc.

a) b) c) d) e) MOVWF W_TEMP ;TEMP W SWAPF STATUS,W ;W CLRF STATUS ;, 0 IRP,RP1,RP0 MOVWF STATUS_TEMP ; MOVF PCLATH, W ; 1, 2 / 3 MOVWF PCLATH_TEMP ;W PCLATH CLRF PCLATH ; MOVF FSR, W ;W FSR MOVWF FSR_TEMP ;W FSR_TEMP FSR : :(ISR) : CLRF STATUS ;, 0 IRP,RP1,RP0 MOVF FSR_TEMP, W ;FSR MOVWF FSR ; MOVF PCLATH_TEMP, W ;PCLATH MOVWF PCLATH ; SWAPF STATUS_TEMP,W ;STATUS_TEMP ;( ) MOVWF STATUS ;W STATUS SWAPF W_TEMP,F ;W_TEMP SWAPF W_TEMP,W ;W_TEMP W 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 145

. TMR0 (Figure 5-2) WDT 0 1 M U X 8 8 - to - 1 MUX PS2:PS0 WDT PSA To TMR0 (Figure 5-2) 0 1 MUX PSA WDT Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 2007h Config. bits (1) BODEN (1) CP1 CP0 PWRTE (1) WDTE FOSC1 FOSC0 81h,181h OPTION_REG RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 DS30292A-J-page 146 Preliminary 2000 Microchip Technology Inc.

1. 2. 3. 1. 2. 3. 4. 5. 7. 8. 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 147

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 OSC1 CLKOUT(4) Tost(2) INT INTF (INTCON<1>) GIE (INTCON<7>) Processor in SLEEP (Note 2) INSTRUCTION FLOW PC PC PC+1 PC+2 PC+2 PC + 2 0004h 0005h Inst(PC) = SLEEP Inst(PC + 1) Inst(PC + 2) Inst(0004h) Inst(0005h) Inst(PC - 1) SLEEP Inst(PC + 1) Dummy cycle Dummy cycle Inst(0004h) RB6, RB7 DS30292A-J-page 148 Preliminary 2000 Microchip Technology Inc.

2000 Microchip Technology Inc. Preliminary DS30292A-J-page 149

NOTES: DS30292A-J-page 150 Preliminary 2000 Microchip Technology Inc.

f W b k x d PC TO PD. 13 8 7 6 0 OPCODE d f (FILE #) d = 0 d = 1 f = 13 10 9 7 6 0 OPCODE b (BIT #) f (FILE #) b = f = 13 8 7 0 OPCODE k ( ) k = 13 11 10 0 OPCODE k ( ) k = 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 151

MSb LSb ADDWF ANDWF CLRF CLRW COMF DECF DECFSZ INCF INCFSZ IORWF MOVF MOVWF NOP RLF RRF SUBWF SWAPF XORWF f, d f, d f - f, d f, d f, d f, d f, d f, d f, d f - f, d f, d f, d f, d f, d Add W and f AND W with f Clear f Clear W Complement f Decrement f Decrement f, Skip if 0 Increment f Increment f, Skip if 0 Inclusive OR W with f Move f Move W to f No Operation Rotate Left f through Carry Rotate Right f through Carry Subtract W from f Swap nibbles in f Exclusive OR W with f BCF BSF BTFSC BTFSS f, b f, b f, b f, b Bit Clear f Bit Set f Bit Test f, Skip if Clear Bit Test f, Skip if Set ADDLW ANDLW CALL CLRWDT GOTO IORLW MOVLW RETFIE RETLW RETURN SLEEP SUBLW XORLW k k k - k k k - k - - k k Add literal and W AND literal with W Call subroutine Clear Watchdog Timer Go to address Inclusive OR literal with W Move literal to W Return from interrupt Return with literal in W Return from Subroutine Go into standby mode Subtract W from literal Exclusive OR literal with W 1 1 1 1 1 1 1(2) 1 1(2) 1 1 1 1 1 1 1 1 1 1 1 1 (2) 1 (2) 1 1 2 1 2 1 1 2 2 2 1 1 1 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 01 01 01 11 11 10 00 10 11 11 00 11 00 00 11 11 0111 0101 0001 0001 1001 0011 1011 1010 1111 0100 1000 0000 0000 1101 1100 0010 1110 0110 00bb 01bb 10bb 11bb 111x 1001 0kkk 0000 1kkk 1000 00xx 0000 01xx 0000 0000 110x 1010 dfff dfff lfff 0xxx dfff dfff dfff dfff dfff dfff dfff lfff 0xx0 dfff dfff dfff dfff dfff bfff bfff bfff bfff kkkk kkkk kkkk 0110 kkkk kkkk kkkk 0000 kkkk 0000 0110 kkkk kkkk ffff ffff ffff xxxx ffff ffff ffff ffff ffff ffff ffff ffff 0000 ffff ffff ffff ffff ffff ffff ffff ffff ffff kkkk kkkk kkkk 0100 kkkk kkkk kkkk 1001 kkkk 1000 0011 kkkk kkkk C,DC,Z Z Z Z Z Z Z Z Z C C C,DC,Z Z C,DC,Z Z TO,PD Z TO,PD C,DC,Z Z 1,2 1,2 2 1,2 1,2 1,2,3 1,2 1,2,3 1,2 1,2 MOVF PORTB 1 1,2 1,2 1,2 1,2 1,2 1,2 1,2 3 3 DS30292A-J-page 152 Preliminary 2000 Microchip Technology Inc.

14.1 PICmicrο MPLAB -ICE ICEPIC PRO MATE II PICSTART Plus SIMICE PICDEM-1 PICDEM-2 PICDEM-3 MPASM MPLAB SIM MPLAB-C17 (fuzzytech MP) KEELOQ 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 153

- - - - - DS30292A-J-page 154 Preliminary 2000 Microchip Technology Inc.

f 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 155

DS30292A-J-page 156 Preliminary 2000 Microchip Technology Inc. Emulator Products Software Tools Programmers Demo Boards PIC12C5XX PIC14000 PIC16C5X PIC16CXXX PIC16C6X PIC16C7XX PIC16C8X PIC16C9XX PIC17C4X PIC17C7XX MPLAB -ICE ICEPIC Low-Cost In-Circuit Emulator MPLAB Integrated Development Environment MPLAB C17* Compiler fuzzytech -MP Explorer/Edition Fuzzy Logic Dev. Tool Total Endurance Software Model PICSTART Plus Low-Cost Universal Dev. Kit PRO MATE II Universal Programmer KEELOQ Programmer SEEVAL Designers Kit SIMICE PICDEM-14A PICDEM-1 PICDEM-2 PICDEM-3 KEELOQ Evaluation Kit KEELOQ Transponder Kit 24CXX 25CXX 93CXX HCS200 HCS300 HCS301 PIC16F87X

....-... )............................................. 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 157

OSC RC XT HS VDD : IDD : IPD : Freq: VDD : IDD : IPD : Freq: PIC16F873-04 PIC16F874-04 PIC16F876-04 PIC16F877-04 VDD : IDD : IPD : Freq : VDD : IDD:. IPD : Freq : PIC16F873-20 PIC16F874-20 PIC16F876-20 PIC16F877-20 VDD : VDD : 4.5V to 5.5V IDD : IPD : IDD IPD : : 20 ma max. at 5.5V VDD : IDD : IPD : Freq : VDD : IDD : IPD : Freq : PIC16LF873-04 PIC16LF874-04 PIC16LF876-04 PIC16LF877-04 Freq : Freq : VDD : IDD : LP IPD :. Freq : VDD : IDD : IPD : Freq : DS30292A-J-page 158 Preliminary 2000 Microchip Technology Inc.

D001 D001A Min Typ Max VDD ^ V V D002* D003 D004* D005 D010 D013 VDR V VPOR V SVDD V/ms BVDD V IDD ma D015* D020 D021 D021A D021B ma IBOR µa IPD µa µa µa µa D023* IBOR µa * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 159

Min Typ Max D001 VDD V D002* VDR V D003 VPOR V D004* D005 D010 D010A SVDD V/ms BVDD V IDD ma D015* D020 D021 D021A µa IBOR µa IPD µa µa µa D023* IBOR µa * DS30292A-J-page 160 Preliminary 2000 Microchip Technology Inc.

Min Typ Max VIL D030 V D030A V 4.5V VDD 5.5V D031 V D032 V D033 V D034 V D034A V VDD = 4.5-5.5V VIH D040 V 4.5V VDD 5.5V D040A V D041 V D042 V D042A V D043 V D044 V D044A V VDD = 4.5-5.5V D070 IPURB µa VDD = 5V, VPIN = VSS D060 IIL - µa Vss VPIN VDD, D061 - µa Vss VPIN VDD D063 - µa Vss VPIN VDD, XT, HS, LP * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 161

Min Typ Max D080 VOL - V D080A - - V D083 - - V D083A - - V D090 VOH - - V D090A - - V D092 - - V D092A - - V D150* VOD - - V - D100 COSC2 - - pf D101 D102 CIO CB - - pf pf D120 ED - - E/W D121 VDRW - V D122 TDEW - ms D130 EP - - E/W D131 VPR - V D132 VPEW - V D132a - V D133 TPEW - ms * DS30292A-J-page 162 Preliminary 2000 Microchip Technology Inc.

1. TppS2ppS 3. TCC:ST 2. TppS 4. Ts T F T pp cc CCP1 osc OSC1 ck CLKOUT rd RD cs CS rw RD WR di SDI sc SCK do SDO ss SS dt t0 T0CKI io t1 T1CKI mc MCLR wr WR S F P H High R I V L Low Z I 2 C AA High High BUF Low Low TCC:ST (I 2 C ) CC HD SU ST DAT STO STA VDD/2 RL CL CL VSS VSS RL = 464Ω CL = 50 pf 15 pf : 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 163

Q4 Q1 Q2 Q3 Q4 Q1 OSC1 CLKOUT 1 2 3 3 4 4 Min Typ Max Fosc DC - MHz DC - MHz DC - MHz DC - khz DC - MHz 0.1 - MHz 4 5 - - MHz khz 1 Tosc 250 - - ns 250 - - ns 50 - - ns 5 - - µs 250 - - ns 250 - ns 250 - ns 50 - ns 5 - - µs 2 TCY 200 DC ns TCY = 4/FOSC 3 TosL, 100 - - ns TosH 2.5 - - µs 15 - - ns 4 TosR, - - ns TosF - - ns - - ns Note 1: (TCY) DS30292A-J-page 164 Preliminary 2000 Microchip Technology Inc.

Q4 Q1 Q2 Q3 OSC1 10 11 CLKOUT 13 14 19 18 12 16 I/O ( ) 17 15 I/O Pin ( ) 20, 21 : Min Typ Max 10* TosH2ckL OSC1 to CLKOUT - ns 11* TosH2ck OSC1 to CLKOUT - ns H 12* TckR CLKOUT - ns 13* TckF CLKOUT - ns 14* TckL2ioV CLKOUT - - ns 15* TioV2ckH CLKOUT - - ns 16* TckH2ioI CLKOUT - - ns 17* TosH2ioV OSC1 - ns 18* TosH2ioI OSC1 - - ns - - ns 19* TioV2osH OSC1 - - ns 20* TioR - ns - - ns 21* TioF - ns - - ns 22 * Tinp - - ns 23 * Trbp - - ns * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 165

VDD MCLR POR 30 PWRT OSC 33 32 34 31 34 I/O : VDD BVDD 35 Min Typ Max 30 TmcL MCLR - - µs VDD = 5V, -40 C +125 C 31* Twdt ms VDD = 5V, -40 C +125 C 32 Tost - - TOSC = OSC1 33* Tpwrt ms VDD = 5V, -40 C +125 C 34 TIOZ - - µs 35 TBOR - - µs VDD BVDD (D005) * DS30292A-J-page 166 Preliminary 2000 Microchip Technology Inc.

RA4/T0CKI 40 41 42 RC0/T1OSO/T1CKI 45 46 47 48 TMR0 or TMR1 : Min Typ Max 40* Tt0H - - ns - - ns 41* Tt0L - - ns - - ns 42* Tt0P - - ns - - ns (2, 4,..., 256) 45* Tt1H - - ns PIC16F7X - - ns PIC16LF7X - - ns PIC16F7X - - ns PIC16LF7X - - ns 46* Tt1L - - ns PIC16F7X - - ns PIC16LF7X - - ns PIC16F7X - - ns PIC16LF7X - - ns 47* Tt1P PIC16F7X - - ns (1, 2, 4, 8) PIC16LF7X - - (1, 2, 4, 8) Ft1 PIC16F7X - - ns PIC16LF7X - - ns - khz 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 167

Min Typ Max 48 TCKEZtmr1 - * RC1/T1OSI/CCP2 and RC2/CCP1 ( ) 50 51 52 RC1/T1OSI/CCP2 and RC2/CCP1 ( PWM ) 53 54 : Min Typ Max 50* TccL - - ns - - ns - - ns 51* TccH - - ns - - ns - - ns 52* TccP - - ns 53* TccR - ns - ns 54* TccF - ns - ns * DS30292A-J-page 168 Preliminary 2000 Microchip Technology Inc.

RE2/CS RE0/RD RE1/WR 65 RD7:RD0 64 62 : 63 Min Typ Max 62 TdtV2wrH - - ns - - ns 63* TwrH2dtI - - ns - - ns 64 TrdL2dtV - - - - ns ns 65 TrdH2dtI - ns * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 169

SS SCK (CKP = 0) 70 71 72 78 79 SCK (CKP = 1) 80 79 78 SDO MSb BIT6 - - - - - -1 LSb 75, 76 SDI MSb IN BIT6 - - - -1 LSb IN 73 74 SS SCK (CKP = 0) 81 73 71 72 79 SCK (CKP = 1) 80 78 SDO MSb BIT6 - - - - - -1 LSb 75, 76 SDI MSb IN BIT6 - - - -1 LSb IN 74 DS30292A-J-page 170 Preliminary 2000 Microchip Technology Inc.

SS SCK (CKP = 0) 70 83 71 72 78 79 SCK (CKP = 1) 80 79 78 SDO MSb BIT6 - - - - - -1 LSb 75, 76 77 SDI MSb IN BIT6 - - - -1 LSb IN 73 74 SS 82 SCK (CKP = 0) 70 71 72 83 SCK (CKP = 1) 80 SDO MSb BIT6 - - - - - -1 LSb 75, 76 77 SDI MSb IN BIT6 - - - -1 LSb IN 74 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 171

Min Typ Max 70* TssL2scH, SS SCK SCK - - ns TssL2scL 71* TscH - - ns 72* TscL - - ns 73* TdiV2scH, TdiV2scL 74* TscH2diL, TscL2diL - - ns - - ns 75* TdoR - ns 76* TdoF - ns 77* TssH2doZ SS ns 78* TscR - ns 79* TscF - ns 80* TscH2doV, TscL2doV - - ns 81* TdoV2scH, TdoV2scL - - ns 82* TssL2doV SS - - ns 83* TscH2ssH, TscL2ssH SS - - ns * SCL 91 93 90 92 SDA START : STOP Min Typ Max 90 TSU:STA - - - - ns 91 THD:STA - - - - ns 92 TSU:STO - - - - ns 93 THD:STO - - - - ns DS30292A-J-page 172 Preliminary 2000 Microchip Technology Inc.

SCL SDA SDA 103 100 102 101 90 106 107 91 92 109 109 110 : Min Max 100 THIGH µs µs 101 TLOW µs µs 102 TR 103 TF 90 TSU:STA 91 THD:STA ns ns ns ns µs µs µs µs 106 THD:DAT ns µs 107 TSU:DAT ns ns 92 TSU:STO µs µs 109 TAA ns ns 110 TBUF µs µs Cb pf 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 173

RC6/TX/CK RC7/RX/DT 121 121 120 : 122 Min Typ Max 120 TckH2dtV - - ns - - ns 121 Tckrf 122 Tdtrf - - ns - - ns - - ns - - ns : RC6/TX/CK RC7/RX/DT 125 126 : Min Typ Max 125 TdtV2ckL - - CK ns 126 TckL2dtl CK - - ns : DS30292A-J-page 174 Preliminary 2000 Microchip Technology Inc.

Min Typ Max A01 NR - - bit VREF = VDD = 5.12V, VSS VAIN VREF A03 EIL - - LSb VREF = VDD = 5.12V, VSS VAIN VREF A04 EDL - - LSb VREF = VDD = 5.12V, VSS VAIN VREF A06 EOFF - - LSb VREF = VDD = 5.12V, VSS VAIN VREF A07 EGN - - LSb VREF = VDD = 5.12V, VSS VAIN VREF A10 - - VSS VAIN VREF A20 VREF (VREF+ - VREF-) - V A21 VREF+ V A22 VREF- V A25 VAIN - V A30 ZAIN - - kω A40 IAD - - µa - - µa A50 IREF - µa VAIN - - µa * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 175

BSF ADCON0, GO Q4 (TOSC/2) (1) 131 130 1 TCY A/D 132 A/D...... 9 8 7 2 1 0 ADRES ADIF GO DONE SLEEP Min Typ Max 130 TAD µs µs µs µs 131 TCNV TAD 132 TACQ µs 134 TGO * µs DS30292A-J-page 176 Preliminary 2000 Microchip Technology Inc.

2000 Microchip Technology Inc. Preliminary DS30292A-J-page 177

NOTES: DS30292A-J-page 178 Preliminary 2000 Microchip Technology Inc.

28-Lead PDIP (Skinny DIP) MMMMMMMMMMMMMMMMM XXXXXXXXXXXXXXXXXXXXX AABBCDE PIC16F876-20/SP 0017HAT 28-Lead SOIC MMMMMMMMMMMMMMMMMMMM XXXXXXXXXXXXXXXXXXXXXXXXX AABBCDE PIC16F876-04/SO 0010/SAA : MM...M XX...X * AA BB C O = C = S = H = D E : * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 179

40-Lead PDIP MMMMMMMMMMMMMM XXXXXXXXXXXXXXXXXX AABBCDE PIC16F877-04/P 0012SAA 44-Lead TQFP MMMMMMMM XXXXXXXXXX XXXXXXXXXX AABBCDE PIC16F877-04/PT 0011HAT 44-Lead MQFP MMMMMMMM XXXXXXXXXX XXXXXXXXXX AABBCDE PIC16F877-20/PQ 0004SAT 44-Lead PLCC MMMMMMMM XXXXXXXXXX XXXXXXXXXX AABBCDE PIC16F877-20/L 0003SAT DS30292A-J-page 180 Preliminary 2000 Microchip Technology Inc.

17.2 K04-070 28-Lead Skinny Plastic Dual In-line (SP) 300 mil E D 2 n 1 α E1 A1 A R c L β eb A2 B1 B p PCB Shoulder Radius n p B B1 R c A A1 A2 L * D E Radius Radius E1 eb α β * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 181

17.3 K04-052 28-Lead Plastic Small Outline (SO) Wide, 300 mil p E1 E D B 2 n 1 X α 45 L c R2 A A1 β R1 L1 φ A2 p n Shoulder A A1 A2 D E Chamfer E1 X Shoulder Radius Gull Wing Radius R1 R2 L φ Radius L1 c B α β * * DS30292A-J-page 182 Preliminary 2000 Microchip Technology Inc.

17.4 K04-016 40-Lead Plastic Dual In-line (P) 600 mil E D n 2 1 α E1 A1 A R c L β eb A2 B1 B p * PCB n p B B1 Shoulder Radius R c A 0.110 A1 0.073 A2 0.020 L 0.125 D 2.013 E 0.530 Radius Radius E1 0.545 eb 0.630 α 5 β 5 * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 183

17.5 K04-076 44-Lead Plastic Thin Quad Flatpack (PT) 10x10x1 mm Body, 1.0/0.1 mm Lead Form E1 E # leads = n1 p D D1 B 2 1 c n X x 45 L R2 A α β R1 φ L1 A2 A1 * p Overall Pack. Height n n1 A Shoulder Height A1 A2 Shoulder Radius Gull Wing Radius R1 R2 L φ Radius L1 c B Outside Tip Width D1 E1 Molded Pack. Length Mlded Pack. Width D E Pin 1 Corner Chamfer X α β * DS30292A-J-page 184 Preliminary 2000 Microchip Technology Inc.

17.6 K04-071 44-Lead Plastic Quad Flatpack (PQ) 10x10x2 mm Body, 1.6/0.15 mm Lead Form E1 E # leads = n1 p D D1 B 2 1 c n X x 45 L R2 A α β R1 L1 φ A2 A1 * p 0.031 n 44 Overall Pack. Height n1 A Shoulder Height A1 A2 Shoulder Radius R1 Gull Wing Radius R2 L Foot Angle φ Radius L1 c B D1 Outside Tip Width E1 D E Pin 1 Corner Chamfer X α β * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 185

17.7 K04-048 44-Lead Plastic Leaded Chip Carrier (L) Square E1 E # leads = n1 D D1 R1 c CH2 x 45 n 1 2 E2 Shoulder Height Side 1 Chamfer Dim. Corner Chamfer (1) Corner Chamfer (other) Shoulder Inside Radius J-Bend Inside Radius R2 β n p A A1 A2 A3 CH1 CH2 E1 D1 E D E2 D2 n1 c B1 B L R1 R2 α β CH1 x 45 A1 MIN 35 A A2 INCHES* NOM * :MO-047 AC A3 MAX B1 B p D2 MILLIMETERS MIN NOM MAX α L DS30292A-J-page 186 Preliminary 2000 Microchip Technology Inc.

A 00 B 98 PIC16F876/873 PIC16F877/874 PIC16C7X PIC16F87X 28/40 28/40 3 3 11 12 13 14,,, ),,, 20 MHz 20 MHz 8 t 10 2 2 4K, 8K EPROM 4K, 8K FLASH 192, 368 192, 368 128, 256 ---, 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 187

NOTES: DS30292A-J-page 188 Preliminary 2000 Microchip Technology Inc.

A A/D... 121 /... 130 ADCON0... 121 ADCON1... 122 ADIF... 123... 126... 7, 8, 9, 37, 38... 124... 127... 123... 123... 131... 127... 128... 126... 130... 126 A/D... 129 GO/DONE... 123 (Rss)... 125... 129... 125... 126... 125 (CCP)... 57... 126... 131 Ratings... 157 ACK... 72, AKD... 64... 72, AKE... 64, AKS... 64 ADRES... 16, 121 AKD... 64 AKE... 64 AKS... 64, 87 AN578, "Use of the SSP I 2 C SSP... 71 PIC16C63A/PIC16C73B... 5 PIC16C65B/PIC16C74B... 6 MPASM... 154 B,... 12, 19... 81 BCLIF... 25 BF... 62, 72, 87, 90 A/D... 124... 126... 81 I 2 C... 79 I 2 C... 71 SSP (I 2 C )... 71 SSP (SPI )... 65 BRG... 81 (BOR)... 133, 136, 138, 139, 140 BOR (BOR )... 26, BF... 72, BF... 62... 98... 98... 101... 99... 102, BCLIF... 25 C (CCP )... 56... 56 CCP... 56 CCPR1H:CCPR1L... 56... 56... 56 Timer1... 56 / /PWM (CCP)... 55 CCP1... 55 CCP1CON... 55 CCPR1H... 55 CCPR1L... 55 RC2/CCP1... 7, 9 CCP2... 55 CCP2CON... 55 CCPR2H... 55 CCPR2L... 55 RC1/T1OSI/CCP2... 7, 9 2 CCP... 55... 55 CCP1CON... 18 CCP1CON... 55 CCP1M3:CCP1M0... 55 CCP1X:CCP1Y... 55 CCP2CON... 18 CCP2CON... 55 CCP2M3:CCP2M0... 55 CCP2X:CCP2Y... 55 CCPR1H... 16, 18 CCPR1L... 18 CCPR2H... 16, 18 CCPR2L... 16, 18 CKE... 62 CKP... 63, CKP... 63 SSPBUF... 66... 133, 148 (CCP )... 57... 57 CCP... 57 CCPR1H:CCPR1L... 57... 57... 51, 57 Timer1... 57... 133... 187 D D/A... 62... 12 (RP1:RP0 Bits)... 12, 19... 12... 13... 15 /, D/A... 62 2000 Microchip Technology Inc. DS30292A-J-page 189

DC PIC16C76... 159 PIC16C77... 159... 153... 153... 187... 28 E... 157... 4... 138 F Firmware...151... 94... 91... 88... 85...83... 96 FSR... 16, 17, 18 (fuzzytech -MP)... 155 G GCE... 64... 77... 77, GCE... 64 I I/O... 29 I 2 C... 71 I 2 C... 91 I 2 C... 90 I 2 C... 84 I 2 C... 71 I 2 C...94... 93...72...81... 79 BRG...81 SDA BRG... 100 BRG... 81... 98... 98...98... 101 (Case1)... 101 (Case2)... 101... 99... 99, 100... 102 (Case1)... 102 (Case2)... 102... 98... 98... 97 ( )... 97 ACK... 72... 77... 79 7-... 92...80... 82... 87... 80... 88... 98... 80... 71... 84... 85... 72... 73... 73 SSPBUF... 72... 83... 96... 95... 95 7 I 2 C... 73 7 I 2 C... 74 I 2 C, SSPADD... 72 I 2 C... 72 ICEPIC PIC16CXXX... 153 ID... 133, 148 (ICSP)... 133, 148 INDF... 18 INDF... 16, 17... 28 FSR... 12... 151... 151 Summary... 152 INTCON... 18 INTCON... 21 GIE... 21 INTE... 21 INTF... 21 PEIE... 21 RBIE... 21 RBIF... 21, 31 T0IE... 21 T0IF... 21 (I 2 C)... 61 (Rss)... 125... 133, 143... 144 (CCP)... 56 (CCP)... 57 (RB7:RB4 )... 31 RB0/INT,... 7, 8, 145 TMR0... 48, 145 TMR1... 49, 51 PR2 TMR2... 54 PR2 TMR2 (PWM)... 53, 58 USART /... 105... 25... 23... 145, CCP1 (CCP1IE )... 56 (GIE )... 21, 143 (RB7:RB4) (RBIE )... 21, 145 (PEIE )... 21 RB0/INT (INTE )... 21 TMR0 (T0IE )... 21 DS30292A-J-page 190 2000 Microchip Technology Inc.

, CCP1 (CCP1IF )... 56, 57 (RB7:RB4) (RBIF )... 21, 31, 145 RB0/INT (INTF )... 21 TMR0 (T0IF )... 21, 145 K KeeLoq... 155 M (MCLR)... 7, 8 MCLR,... 136, 139, 140 MCLR,... 136, 139, 140... 12... 11 MPLAB... 154... 98... 80 O OPCODE... 151 OPTION... 18 OPTION_REG... 20 INTEDG... 20 PS2:PS0... 20, 47 PSA... 20, 47 RBPU... 20 T0CS... 20, 47 T0SE... 20, 47 OSC1/CLKIN... 7, 8 OSC2/CLKOUT... 7, 8... 133, 134 HS... 134, 139 LP... 134, 139 RC... 134, 135, 139 XT... 134, 139, 1... 49, 51, WDT... 146 P P... 62... 179 Paging,... 11, 27 (PSP)... 9, 35, 38... 38 RE0/RD/AN5... 9, 37, 38 RE1/WR/AN6... 9, 37, 38 RE2/CS/AN7... 9, 37, 38... 39 (PSPMODE )... 35, 36, 38... 38 PCL... 16, 17, 18 PCLATH... 16, 17, 18 PCON... 18, 26, 139 BOR... 26 POR... 26 PICDEM-1 PICmicro... 154 PICDEM-2 PIC16CXX... 154 PICDEM-3 PIC16CXXX... 154 PICSTART Plus... 153 PIE1... 18, 22 PIE2... 18, 24 Pinout PIC16C63A/PIC16C73B... 7 PIC16C65B/PIC16C74B... 8 PIR1... 23 PIR2... 25, FSR... 27 PORTA... 7, 8, 18... 7, 8... 29 PORTA... 29 RA3:RA0 and RA5... 29 RA4/T0CKI... 7, 8, 29 RA5/SS/AN4... 7, 8 TRISA... 29 PORTA... 16 PORTB... 7, 8, 18... 31 PORTB... 31 (RBPU )... 20 RB0/INT (INTEDG Bit)... 20 RB0/INT,... 7, 8, 145 RB3:RB0... 31 RB7:RB4... 145 RB7:RB4 (RBIE )... 21, 145 RB7:RB4 (RBIF )... 21, 31, 145 RB7:RB4... 31 TRISB... 31 PORTB... 16 PORTC... 7, 9, 18... 33... 33 PORTC... 33 RC0/T1OSO/T1CKI... 7, 9 RC1/T1OSI/CCP2... 7, 9 RC2/CCP1... 7, 9 RC3/SCK/SCL... 7, 9 RC4/SDI/SDA... 7, 9 RC5/SDO... 7, 9 RC6/TX/CK... 7, 9, 106 RC7/RX/DT... 7, 9, 106, 107 TRISC... 33, 105 PORTC... 16 PORTD... 9, 18, 38... 35 (PSP)... 35 PORTD... 35 TRISD... 35 PORTD... 16 PORTE... 9, 18... 9, 37, 38... 36 (IBF )... 36 (IBOV )... 36 (OBF )... 36 PORTE... 36 PSP (PSPMODE )... 35, 36, 38 RE0/RD/AN5... 9, 37, 38 RE1/WR/AN6... 9, 37, 38 RE2/CS/AN7... 9, 37, 38 TRISE... 36 PORTE... 16 2000 Microchip Technology Inc. DS30292A-J-page 191

, 2 (TOUTPS3:TOUTPS0 )... 53, WDT... 47 (PSA )... 20, 47... 48 (PS2:PS0 Bits)... 20, 47 Timer0 WDT... 48 (POR)...133, 136, 138, 139, 140 (OST)... 133, 138 POR (POR )... 26 (PCON)... 139 (PD )... 19, 136,... 138 (PWRT)... 133, 138 (TO )... 19, 136... 139... 141, 142 PR2... 18 PR2... 17,... 56, 0... 47 (PSA )... 20, 47... 48 (PS2:PS0 )... 20, 47 Timer0 WDT... 48, 1... 50 (T1CKPS1:T1CKPS0 )... 49, 2... 58 (T2CKPS1:T2CKPS0 )... 53 PRO MATE II... 153 /... 199 PCL... 27 PCLATH...27, 145... 139... 11...11... 11, 27... 11... 11...148 (Vpp)... 7, 8,... 151 PWM (CCP )...58... 58 CCPR1H:CCPR1L... 58 Duty Cycle... 58 Example Frequencies/Resolutions... 59... 58... 58 PWM... 59 PR2 TMR2... 53, 58 Q Q-... 58 R R/W... 62 R/W... 72 R/W... 73 RCE,, RCE... 64 RCREG... 18 RCSTA... 18, 106 CREN... 106 FERR... 106 OERR... 106 RX9... 106 RX9D... 106 SPEN... 105, 106 SREN... 106 /, R/W... 62,SSPOV... 63... 12... 13 FSR... 18 INDF... 18 INTCON... 18 OPTION... 18 PCL... 18 PCLATH... 18 PORTB... 18 SSPSTAT... 62 STATUS... 18... 16 TMR0... 18 TRISB... 18... 133, 136... 137... 140 PCON... 139... 139 STATUS... 139 WDT Watchdog Timer (WDT), RSE... 64... 187 RSE... 64 S S... 62 SAE... 64 SCK... 65 SCL... 72 SDA... 72 SDI... 65 SDO... 65 SEEVAL... 155, SCK... 65, SCL... 72, SDA... 72, SDI... 65, SDO... 65... 68, SS... 65 SLEEP... 133, 136, 147 SMP... 62 (MPLAB-SIM)... 155 SPBRG... 18 DS30292A-J-page 192 2000 Microchip Technology Inc.

SPBRG... 17 SPE... 64 CPU... 133... 15 PIC16C73... 16 PIC16C73A... 16 PIC16C74... 16 PIC16C74A... 16 PIC16C76... 16 PIC16C77... 16,... 1 SPI... 67... 65... 65... 65 (SPI)... 61... 65 SPI... 67 SPI... 65 SPI, CKE... 62 SPI Data Input Sample Phase Select, SMP... 62 SPI /... 66 SPI /... 66... 68... 68... 68 SS... 65 SSP... 61 (SPI )... 65 RA5/SS/AN4... 7, 8 RC3/SCK/SCL... 7, 9 RC4/SDI/SDA... 7, 9 RC5/SDO... 7, 9 SPI... 65 SSPADD... 72 SSPBUF... 67, 72 SSPCON1... 63 SSPCON2... 64 SSPSR... 67, 72 SSPSTAT... 62, 72 TMR2... 53, 54 SSP I 2 C SSP I 2 C... 71 SSP SPI... 67 SPI /... 66 SPI... 68 SSPCON1... 71 SSP,SSPOV... 72 SSPADD... 17, 18 SSPBUF... 18, 72 SSPBUF... 16 SSPCON... 16 SSPCON1... 63, 71 SSPCON2... 64 SSPEN... 63 SSPIF... 23, 73 SSPM3:SSPM0... 63 SSPOV... 63, 72, 90 SSPSTAT... 62, 72 SSPSTAT... 17, 18 Stack... 27 (S)... 62, SAE... 64 STATUS... 18, 19, 145 C... 19 DC... 19 IRP... 19 PD... 19, 136 RP1:RP0... 19 TO... 19, 136 Z... 19 (P)... 62... 64... 61, SSPEN... 63... 23, SSPM3:SSPM0... 63 T T1CON... 18 T1CON... 18, 49 T1CKPS1:T1CKPS0... 49 T1OSCEN... 49 T1SYNC... 49 TMR1CS... 49 TMR1ON... 49 T2CON... 18, 53 T2CKPS1:T2CKPS0... 53 TMR2ON... 53 TOUTPS3:TOUTPS0... 53 TAD... 127 0... 47... 47 (T0SE )... 20, 47 (T0CS )... 20, 47 (T0IE )... 21 (T0IF )... 21, 145... 48, 145 RA4/T0CKI,... 7, 8 1... 49... 50... 51 (TMR1CS )... 49 (T1SYNC )... 49 / (TMR1ON )... 49... 49, 51 (T1OSCEN )... 49... 49, 51 RC0/T1OSO/T1CKI... 7, 9 RC1/T1OSI/CCP2... 7, 9 (CCP)... 51, 57 T1CON... 49 TMR1H... 49 TMR1L... 49 2... 54 PR2... 53, 58 SSP... 53, 54 T2CON... 53 TMR2... 53 PR2 TMR2... 53, 54, 58 2000 Microchip Technology Inc. DS30292A-J-page 193

A/D... 176... 93... 81 SDA BRG... 100... 166... 99 (Case 1)... 101 (Case2)... 101 (SCL = 0)... 100... 102... 98 / /PWM... 168 CLKOUT I/O... 165 I 2 C...173 I 2 C /... 172 I 2 C... 82 I 2 C... 92 I 2 C... 89... 97...166... 84... 166...68...166... 95... 141, 142 0... 167 1... 167 USART... 111 USART... 174 USART... 117 USART...116, 174 USART,... 113... 148... 166 TMR0... 18 TMR0... 16 TMR1H... 18 TMR1H... 16 TMR1L... 18 TMR1L... 16 TMR2... 18 TMR2... 16 TRISA... 18 TRISA... 17 TRISB... 18 TRISB... 17 TRISC... 18 TRISC... 17 TRISD... 18 TRISD... 17 TRISE... 18 TRISE... 17, 36 IBF... 36 IBOV... 36 OBF...36 PSPMODE... 35, 36, 38 TXREG... 18 TXSTA... 18 TXSTA... 105 BRGH... 105, 107 CSRC... 105 SYNC... 105 TRMT... 105 TX9... 105 TX9D... 105 TXEN... 105 U UA... 62 (USART)... 112... 113, UA... 62 USART... 105... 110... 111... 113... 110 (BRG)... 107,... 107... 107, (BRGH=0)... 108, (BRGH=1)... 109,... 108 (BRGH )... 105, 107... 107 (CSRC )... 105 (CREN )... 106 (FERR )... 106 (SYNC )... 105 (OERR )... 106 RC6/TX/CK... 7, 9 RC7/RX/DT... 7, 9 RCSTA... 106 (RX9D )... 106 (RX9 )... 106 (SPEN )... 105, 106 (SREN )... 106... 115... 117... 116... 118 (TX9D)... 105 (TXEN )... 105 (TX9 )... 105 (TRMT )... 105 TXSTA... 105 DS30292A-J-page 194 2000 Microchip Technology Inc.

W W... 145 SLEEP... 133, 147... 139, 140 MCLR... 140... 148 WDT... 140 (WDT)... 133, 146... 146 (WDTE )... 146... 146 RC... 146... 146 WDT,... 136, 139, 140 WDT,... 136, 139, 140.... 77 WCOL... 63, 82, 87, 90, 93, 95 WCOL... 82, WCOL... 63 WWW,... 4 2000 Microchip Technology Inc. DS30292A-J-page 195

DS30292A-J-page 196 2000 Microchip Technology Inc.

www.microchip.com ftp://ftp.microchip.com 1-800-755-2345 1-602-786-7302 981103 Trademarks: The Microchip name, logo, PIC, PICmicro, PICSTART, PICMASTER and PRO MATE are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FlexROM, MPLAB and fuzzy- LAB are trademarks and SQTP is a service mark of Microchip in the U.S.A. All other trademarks mentioned herein are the property of their respective companies. 2000 Microchip Technology Inc. DS30292A-J-page 197

: RE: : : ( ) - : : ( ) - : PIC16F87X : DS30292A-J : 1. 2. 3. 4. 5. 6. 7. 8. DS30292A-J-page 198 2000 Microchip Technology Inc.

PART NO. -XX X /XX XXX PIC16F87X (1), PIC16F87XT (2) ;VDD range 4.0V to 5.5V PIC16LF87X (1), PIC16LF87XT (2) ;VDD range 2.0V to 5.5V PIC16F87X (1), PIC16F87XT (2) ;VDD range 4.0V to 5.5V PIC16LF87X (1), PIC16LF87XT (2) ;VDD range 2.0V to 5.5V Examples: g) PIC16F877-20/P 301 = Commercial temp., PDIP package, 4 MHz, normal VDD limits, QTP pattern #301. h) PIC16F876-04I/SO = Industrial temp., SOIC package, 200 khz, Extended VDD limits. i) PIC16F877-04I/P = Industrial temp., PDIP package, 10MHz, normal VDD limits. 04 = 4 MHz 20 = 20 MHz b (3) = 0 C to 70 C ( ) I = -40 C to +85 C ( ) Note 1: C = CMOS LC = Low Power CMOS T = in tape and reel - SOIC, PLCC, MQFP, TQFP packages only. 2: b = blank PQ = MQFP (Metric PQFP) PT = TQFP (Thin Quad Flatpack) SO = SOIC SP = Skinny plastic dip P = PDIP L = PLCC QTP, SQTP, Code or Special Requirements (blank otherwise) * 2000 Microchip Technology Inc. Preliminary DS30292A-J-page 199

WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 602-786-7200 Fax: 602-786-7277 Technical Support: 602 786-7627 Web: http://www.microchip.com Atlanta Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770-640-0034 Fax: 770-640-0307 Boston Microchip Technology Inc. 5 Mount Royal Avenue Marlborough, MA 01752 Tel: 508-480-9990 Fax: 508-480-8575 Chicago Microchip Technology Inc. 333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075 Dallas Microchip Technology Inc. 14651 Dallas Parkway, Suite 816 Dallas, TX 75240-8809 Tel: 972-991-7177 Fax: 972-991-8588 Dayton Microchip Technology Inc. Two Prestige Place, Suite 150 Miamisburg, OH 45342 Tel: 937-291-1654 Fax: 937-291-9175 Detroit Microchip Technology Inc. 42705 Grand River, Suite 201 Novi, MI 48375-1727 Tel: 248-374-1888 Fax: 248-374-2874 Los Angeles Microchip Technology Inc. 18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 714-263-1888 Fax: 714-263-1338 New York Microchip Technology Inc. 150 Motor Parkway, Suite 202 Hauppauge, NY 11788 Tel: 516-273-5305 Fax: 516-273-5335 San Jose Microchip Technology Inc. 2107 North First Street, Suite 590 San Jose, CA 95131 Tel: 408-436-7950 Fax: 408-436-7955 AMERICAS (continued) Toronto Microchip Technology Inc. 5925 Airport Road, Suite 200 Mississauga, Ontario L4V 1W1, Canada Tel: 905-405-6279 Fax: 905-405-6253 ASIA/PACIFIC Hong Kong Microchip Asia Pacific RM 3801B, Tower Two Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2-401-1200 Fax: 852-2-401-3431 India Microchip Technology Inc. India Liaison Office No. 6, Legacy, Convent Road Bangalore 560 025, India Tel: 91-80-229-0061 Fax: 91-80-229-0062 Japan Microchip Technology Intl. Inc. Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa 222-0033 Japan Tel: 81-45-471-6166 Fax: 81-45-471-6122 Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea Tel: 82-2-554-7200 Fax: 82-2-558-5934 Shanghai Microchip Technology RM 406 Shanghai Golden Bridge Bldg. 2077 Yan an Road West, Hong Qiao District Shanghai, PRC 200335 Tel: 86-21-6275-5700 Fax: 86 21-6275-5060 ASIA/PACIFIC (continued) Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore 188980 Tel: 65-334-8870 Fax: 65-334-8850 Taiwan, R.O.C Microchip Technology Taiwan 10F-1C 207 Tung Hua North Road Taipei, Taiwan, ROC Tel: 886-2-2717-7175 Fax: 886-2-2545-0139 EUROPE United Kingdom Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-1189-21-5858 Fax: 44-1189-21-5835 France Arizona Microchip Technology SARL Zone Industrielle de la Bonde 2 Rue du Buisson aux Fraises 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany Arizona Microchip Technology GmbH Gustav-Heinemann-Ring 125 D-81739 München, Germany Tel: 49-89-627-144 0 Fax: 49-89-627-144-44 Italy Arizona Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-39-6899939 Fax: 39-39-6899883 10/27/98 Microchip received ISO 9001 Quality System certification for its worldwide headquarters, design, and wafer fabrication facilities in January, 1997. Our field-programmable PICmicro 8-bit MCUs, KEELOQ code hopping devices, Serial EEPROMs, related specialty memory products and development systems conform to the stringent quality standards of the International Standard Organization (ISO). All rights reserved. 2000 Microchip Technology Incorporated. Printed in the USA. 1/00 Printed on recycled paper. Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies. DS30292A-J-page 200 2000 Microchip Technology Inc.