東芝レビュー2000年8月

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1 BSLSI LSI Chip Set for BS Digital HDTV Receivers SAKURAI Masaru SAWA Shigetaka ISHIKAWA Tatsuya YOSHIOKA Kenji KAI Naoyuki NAGOYA Tetsuo IKEDA Kazumasa MANAKA Shigeyuki OKUYAMA Takehiko ARAFUNE Takeo Broadcast satellite (BS) digital broadcasts offer high-quality video (i.e., HDTV) and audio, and a variety of multimedia data broadcast services. Digital signal processing LSIs are key components of BS digital broadcast receivers. Toshiba has developed an LSI chip set that conforms with the specifications of the Association of Radio Industries and Businesses (ARIB) as well as TV receiver set requirements. It consists of an 8-PSK demodulator (TC90A54F), an MPEG audio/video decoder (TC90A55TB), a video/graphics processor (TC90A56TB), an IEEE1394 interface (MB86617), and a copy protection processor (TC81501F). A 32-bit RISC processor (TX3927) controls the whole chip set. This LSI chip set can be used not only for BS broadcast receivers, but also for communications satellite (CS) broadcast receivers and U.S. DTV/DBS receivers by changing the firmware. 1 LSI System Design and Specification 44

2 2 LSI 8PSKLSI TC90A54F 64 M MPEGLSI TC90A55TB IF MPEG NTSC VHS 5 TS DSP IEEE1394LSI MB86617 IEEE1394 IP CPU LSI TC81501F MPU 64 M LSI TC90A56TB NTSCNational Television System CommitteeIPInterlace to Progressive VHSVideo Home System BSLSI BS digital HDTV LSI system 45

3 LSI Specifications of BS digital TV LSIs A/DPSK TC90A54F 7, W 80 QFP TS TC90A55TB MPEG 11, W 480 BGA NTSC TC90A56TB 8, W 480BGA D/A MB86617 TC81501F DTCP EEPROM A/DD/A DTCPDigital Transmission Content Protection EEPROMElectrically Erasable and Programmable ROM QFPQuad Flat Package BGABall Grid Array 1, W 176 LQFP W 100 QFP 3 MPU 5 LSI 6 4 LSI 46

4 1 PSKLSI Trellis Coded 8-PSK Demodulator and Decoder LSI for Japanese BS Digital Broadcasting 2 PSKLSI PLL PLL I Q A/D A/D 7 P S K 8 T S TS 1 TS 2 AGC AGC IC AGC Automatic Gain ControlI In-phase Q Quadrature TC90A54F Configuration of TC90A54F 47

TC90A54F Basic specifications of TC90A54F C/N 310 6 I

C/NdB 15 10 5 0 10 20 30 rmsdeg Required C/N of

5 TC90A54F Basic specifications of TC90A54F C/N I Q1 Vp-p TS 427 MHz 2.5 VI/O 3.3 V 80QFP12 mm12 mm 5 MHz200 ppm BPSK1/2 C/N0.5 dbtyp. QPSK1/2 C/N2.5 dbtyp. PSK2/3 C/N8.0 dbtyp. C/NdB rmsdeg Required C/N of demodulator 3 IC a b Example of equalizer performance TC90A54F Chip photograph of TC90A54F 48

6 4 2 MPEGLSI TC90A55TB 1 MPEGLSI MPEG Video/Audio Processing LSI TC90A55TB Functions of TC90A55TB T S TS TS 48 PES AACAC-3MPEG ATSC 18DSS BS/CS/ HDSDSD4 1SMPTE274 M296 M 2ITU-R601 3ITU-R656 NTSC Y/C PESPacketized Elementary Stream ATSCAdvanced Television Systems Committe SMPTESociety of Motion Picture and Television Engineers ITUInternational Telecommunication Union Y/C VCXO 27 MHz 74 MHz TS TS0 CAS CRISC PLL / DLL NTSC ENC. OSD NTSC TS1 CRISC VTR MPU TX3927/ TX3904 TSP PESD VDEC DVIF 5 1 DSP MMU PESDPacketized Elementary Stream Decoder DLLDelay Locked Loop DVIFDigital Video Interface ENC.Encoder 64 M SDRAM2 512 K4 bank32 TC90A55TB Internal structure of TC90A55TB 49

7 50

8 TC90A55TB Chip micrograph of TC90A55TB 3 LSI Video and Graphics Processor TC90A55TB Specifications of TC90A55TB T-BGA m CMOS V3.3 VI/O 11, mm 2.1 W 1 51

9 LSI TC90A56TB TC90A56TB video and graphics back end processor LSI 2 52

10 LSI TC90A56TB Video and graphics planes Specifications of back end processor 1080i720p480p480i 1080i720p480p480i 2 1/ PinP SD ,16bppRGB 565 FILL BitBlt 4 SDRAM bpp 64 M 32 I/O SDRAM 2 32 DMA 16RISCRAM 16 K MCU RAM 16 K PinPPicture in Picture 53

11 LSI Specifications of LSI 4 T-BGA mm35 mm Ball 1.27 mm 0.25 m CMOS V3.3 V 8, DACDigital to Analog Converter 10DAC 3 PLL 2 DLL IEEE1394 LSI IEEE1394 and Copy Protection LSIs DTVIEEE1394 IEEE 1394 AV/C 4 Descriptor IEEE API 2 UART DTCP 3 FCP 2 IEEE1394TX3927 IEEE1394 TX1940 IEEE1394LSI CPLSI DTCP J 3 MPEG2-TS /DSS 2 2 DTCP M6 3 LSI 1 IEEE IEC DTCP 4 IEEE1394TA 1 1 IEEE1394 DescriptorAV/C IEC IEEE1394 IEEE1394 protocol stack 54

12 TX3927 TX1940 IC TSP/MPEG IC TC90A55TB IEEE1394LSI MB86617 CPLSI TC81501F IC IEEE1394 DTV/DSTBIEEE1394 DTV/DSTB IEEE1394 hardware system 3 IEEE1394LSI MB86617 TSP /MPEG 2 TS/DSS CGMS CP FIFO FIFO TC81501F CGMSCopy Generation Management System MB86617 Internal configuration of MB86617 IEEE1394 LSI 55

13 4 CPLSI TC81501F CPU TX1940 ROM CIPHER CIPHER CPU RAM ROM RAM EEPROM TC81501F Internal configuration of TC81501F copy protection LSI 5 56

14 6 SAKURAI Masaru, D.Eng SAWA Shigetaka ISHIKAWA Tatsuya YOSHIOKA Kenji KAI Naoyuki, D.Sc. NAGOYA Tetsuo IKEDA Kazumasa MANAKA Shigeyuki OKUYAMA Takehiko ARAFUNE Takeo 57

ハイディフィニション（高精細）ビデオの理解と使用方法

ハイディフィニション（高精細）ビデオの理解と使用方法 HD Adobe Adobe After Effects Adobe Premiere Pro 2 1 HD(High-definition ) 1 HD HD DVD HD DVD Criterion HD HD HD SD( ) HD 10,000 110 HD HD SD 625 PAL 576 576 HD HD 1920 1080 1280 720 16:9 120 240 483 720