R1EX24256BSAS0I/R1EX24256BTAS0I データシート

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1 R1EX24256BSAS0I R1EX24256BTAS0I Two-wire serial interface 256k EEPROM (32-kword 8-bit) R10DS0003JJ0400 Rev.4.00 R1EX24xxx 2 EEPROM ROM MONOS CMOS V 5.5V 2 (I 2 C ) 400kHz 2.0μA (max) 1.0mA (max) 3.0mA (max) 64 5ms SOP8 TSSOP8 TSSOP8 3,000IC/reel SOP8 2,500IC/reel #U0, #K0 R10DS0003JJ0400 Rev.4.00 Page 1 of 17

2 Internal Package Shipping Orderable Part Numbers organization Halogen free Inner wire tape and reel R1EX24256BSAS0I#U0 256k bit 150 mil 8-pin plastic SOP ס Au 2,500 IC/reel ( bit) PRSP0008DF-B R1EX24256BSAS0I#S0 (FP-8DBV) Au R1EX24256BSAS0I#K0 ס Cu 4,000 IC/reel R1EX24256BTAS0I#U0 256k bit 8-pin plastic TSSOP Au ( bit) PTSP0008JC-B R1EX24256BTAS0I#S0 (TTP-8DAV) Au ס 3,000 IC/reel 8-pin SOP/8-pin TSSOP A0 A1 A2 V SS V CC WP SCL SDA (Top view) A0 to A2 SCL SDA WP V CC V SS Pin name Device address Serial clock input Serial data input/output Write protect Power supply Ground Function Voltage detector V CC High voltage generator V SS WP A0, A1, A2 SCL Control logic Address generator X decoder Y decoder Memory array Y-select & Sense amp. SDA Serial-parallel converter R10DS0003JJ0400 Rev.4.00 Page 2 of 17

3 Parameter Symbol Value Unit Supply voltage relative to V SS V CC 0.6 to +7.0 V Input voltage relative to V SS Vin 0.3 to V CC +0.3 V Operating temperature range* 1 Topr 40 to +85 C Storage temperature range Tstg 55 to +125 C 1. DC Parameter Symbol Min Typ Max Unit Supply voltage V CC V V SS V Input high voltage V IH V CC 0.7 V CC V Input low voltage V IL 0.3 V CC 0.3 V Operating temperature Topr C DC (Ta = C, V CC = 1.8 V 5.5V) Parameter Symbol Min Typ Max Unit Test conditions Input leakage current I LI 2.0 μa V CC = 5.5 V, Vin = 0 to 5.5 V Output leakage current I LO 2.0 μa V CC = 5.5 V, Vout = 0 to 5.5 V Standby V CC current I SB μa V CC = 5.5 V, Vin = V SS or V CC 0.2 μa V CC = 3.3 V, Vin = V SS or V CC Read V CC current I CC1 1.0 ma V CC = 5.5 V, Read at 400kHz 0.3 ma V CC = 3.3 V, Read at 400kHz Write V CC current I CC2 3.0 ma V CC = 5.5 V, Write at 400kHz 1.5 ma V CC = 3.3 V, Write at 400kHz Output low voltage V OL2 0.4 V V CC = 2.7 to 5.5 V, I OL = 3.0mA V OL1 0.2 V V CC = 1.8 to 2.7 V, I OL = 1.5mA (Ta = +25 C, f = 1 MHz) Parameter Symbol Min Typ Max Unit Test conditions Input capacitance (A0 to A2, SCL, WP) Cin* pf Vin = 0 V Output capacitance (SDA) C I/O * pf Vout = 0 V 1. Not 100% tested. (V CC = 1.8 V to 5.5 V) 1,000k Cycles min. Note min. Note 1 1. Not 100% tested. 1 (FF Hex) R10DS0003JJ0400 Rev.4.00 Page 3 of 17

4 AC (Ta = C, V CC = V) V IL = 0.2 V CC V IH = 0.8 V CC 20 ns 0.5 V CC 1TTL Gate pf Parameter Symbol Min Typ Max Unit Notes Clock frequency f SCL 400 khz Clock pulse width low t LOW 1200 ns Clock pulse width high t HIGH 600 ns Noise suppression time t I 100 ns 1 Access time t AA ns Bus free time for next mode t BUF 1200 ns Start hold time t HD.STA 600 ns Start setup time t SU.STA 600 ns Data in hold time t HD.DAT 0 ns Data in setup time t SU.DAT 100 ns Input rise time t R 300 ns 1 Input fall time t F 300 ns 1 Stop setup time t SU.STO 600 ns Data out hold time t DH 50 ns Write protect hold time t HD.WP 1200 ns Write protect setup time t SU.WP 0 ns Write cycle time t WC 5 ms 2 1. Not 100% tested. 2. t WC R10DS0003JJ0400 Rev.4.00 Page 4 of 17

5 Bus Timing t F 1/f SCL t HIGH t LOW t R SCL t SU.STA t HD.STA t HD.DAT t SU.DAT tsu.sto SDA (in) t BUF t AA t DH SDA (out) t SU.WP thd.wp WP Write Cycle Timing Stop condition Start condition SCL SDA in Write data (Address (n)) ACK t WC (Internally controlled) R10DS0003JJ0400 Rev.4.00 Page 5 of 17

6 (SCL) 400kHz (SDA) DC V OL I OL SDA SDA SCL Low Data Validity (SDA data change timing waveform) SCL SDA Data change Data change SDA High Low Low High SCL Low R10DS0003JJ0400 Rev.4.00 Page 6 of 17

7 (A0,A1,A2) 8 V CC V SS V CC V SS SDA V SS Pin Connections for A0 to A2 Pin connection Memory size Max connect number A2 A1 A0 Notes 256k bit 8 V CC /V SS V CC /V SS V CC /V SS 1. V CC /V SS V SS WP High Write Protect Area Acknowledge 0 Write Acknowledge 1 (No ACK) Low High/Low WP Write Protect Area WP pin status V IH V IL Write protect area 256k bit Full (256k bit) Normal read/write operation R10DS0003JJ0400 Rev.4.00 Page 7 of 17

8 Read Write SCL High SDA High Low Start condition and stop condition SCL High SDA Low High Start condition and stop condition Read Read Write t WC Write cycle timing Start Condition and Stop Condition SCL SDA (in) Start condition Stop condition Acknowledge Read 8bit Acknowledge 8 SCL Acknowledge EEPROM Write 8 9 EEPROM Acknowledge 0 Read 8 Acknowledge 0 EEPROM Read 8 Acknowledge 0 Acknowledge 0 EEPROM Read Acknowledge 0 Read Acknowledge 0 Acknowledge Timing Waveform SCL SDA IN SDA OUT Acknowledge out R10DS0003JJ0400 Rev.4.00 Page 8 of 17

9 Read Write 4bit 3bit Read/Write 1bit A2 A1 A0 8 A2 A0 High Low 8 R/W(Read/Write) 0 Write 1 Read 1010 Read/Write Device Address Word Device address word (8-bit) Device code (fixed) Device address code R/W code* 1 256k A2 A1 A0 R/W 1. R/W= 1 Read R/W= 0 Write R10DS0003JJ0400 Rev.4.00 Page 9 of 17

10 Write (WP=Low ) Byte Write (WP) Low Write Read/Write 0 8bit 9bit Acknowledge 0 Write 8bit 2 Acknowledge 0 Write 8bit Write EEPROM Acknowledge 0 LSI SCL SDA Byte Write Operation WP Device address 1st Memory 2nd Memory Write data (n) 256k 1010 W * 1 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 Start ACK ACK ACK R/W D7 D6 ACK Stop Note: 1. Don't care bit Page Write 64 Page Write Page Write Byte Write (n) Write (Dn)9bit Acknowledge 0 Write (Dn)Write (Dn+1) Page Write Write (Dn+1) (a0 a5) (n+1) Write Write 64 Write (a0 a5) Roll Over Roll Over Write 2 ( ) Write Write Page Write Operation WP Device address 1st Memory 2nd Memory Write data (n) Write data (n+m) 256k 1010 W * 1 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 D7 D6 Start ACK ACK ACK ACK ACK R/W Stop Note: 1. Don't care bit R10DS0003JJ0400 Rev.4.00 Page 10 of 17

11 Write (WP=High ) Byte Write (WP) High Write Read/Write 0 8bit 9bit Acknowledge 0 Write 8bit 2 Acknowledge 0 Write 8bit EEPROM Acknowledge 1 (No ACK) Byte Write Operation WP Device address 1st Memory 2nd Memory Write data (n) No ACK 256k 1010 W * 1 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 Start ACK ACK ACK R/W D7 D6 Stop Note: 1. Don't care bit Page Write Page Write Byte Write (n) 9bit Acknowledge 0 Write (Dn) Acknowledge 1 Page Write Operation WP Device address 1st Memory 2nd Memory Write data (n) No ACK Write data (n+m) No ACK 256k 1010 W * 1 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 D7 D6 Start ACK ACK ACK R/W Stop Note: 1. Don't care bit R10DS0003JJ0400 Rev.4.00 Page 11 of 17

12 Acknowledge Polling EEPROM Acknowledge Polling 8bit Acknowledge Polling Read/Write 0 9bit Acknowledge Acknowledge 1 Acknowledge 0 Acknowledge Polling Write Write Cycle Polling using ACK Write Cycle Polling Using ACK Send write command Send stop condition to initiate write cycle Send start condition Send device address word with R/W = 0 ACK returned No Yes Next operation is addressing the memory No Yes Send memory address Send start condition Send stop condition Proceed write operation Proceed random address read operation Send stop condition R10DS0003JJ0400 Rev.4.00 Page 12 of 17

13 Read Read Current Address Read Random Read Sequential Read 3 Read Write 8bit Read/Write 1 Current Address Read EEPROM Read Write (n) 1 (n+1)current Address Read (n+1) Read Write ( R/W= 1 ) Acknowledge 0 (n+1) 8bit Acknowledge 1 Acknowledge Read Read Current Address Roll Over 0 Write Current Address Roll Over Current Address OFF ON Current Address ON Read Random Read Current Address Read Operation 256k Start Device address 1010 R Read data (n+1) D7 D6 ACK R/W No ACK Stop R10DS0003JJ0400 Rev.4.00 Page 13 of 17

14 Random Read Read Write Read R/W= 0 8bit 2 Acknowledge 0 Current Address Read Write Acknowledge 1 Acknowledge Read Random Read Operation 256k Device address 1010 W 1st Memory * 1 a14 a13 a12 a11 a10 a9 a8 2nd Memory a7 a6 a5 a4 a3 a2 a1 a0 Device address ### 1010 R Read data (n) D7 D6 Start ACK R/W ACK Start ACK R/W ACK No ACK Stop Dummy write Currect address read Notes: 1. Don't care bit 2. 2nd device address code (#) should be same as 1st Sequential Read Read Current Address Read Random Read 8bit Acknowledge 0 8bit Acknowledge 0 0 Roll Over Roll Over Sequential Read Current Address Read Random Read Acknowledge 1 Acknowledge Sequential Read Operation Device address Read data (n) Read data (n+1) Read data (n+2) Read data (n+m) 256k 1010 R D7 D6 D7 D6 D7 D6 Start ACK ACK ACK ACK No ACK R/W Stop R10DS0003JJ0400 Rev.4.00 Page 14 of 17

15 On/Off On/Off Power on Reset Power on Reset On/Off SCL,SDA V CC V SS Off On On 0 V On 2µs/V SCL SDA 100ns 100ns 100ns V CC V SS 0.1μF ( ) V CC V SS R10DS0003JJ0400 Rev.4.00 Page 15 of 17

16 E R1EX24256BSAS0I/R1EX24256BTAS0I R1EX24256BSAS0I (PRSP0008DF-B / Previous Code: FP-8DBV) *1 D F 8 5 bp *2 E H 1 c JEITA Package Code RENESAS Code Previous Code MASS[Typ.] P-SOP8-3.9x PRSP0008DF-B FP-8DBV 0.08g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. Index mark Terminal cross section ( Ni/Pd/Au plating ) Z 1 e 4 *3 b p x M A y A Detail F L1 L θ Reference Dimension in Millimeters Symbol Min Nom Max D E 3.90 A 2 A 1 A b p b c c θ 0 8 H E e x y Z L L R10DS0003JJ0400 Rev.4.00 Page 16 of 17

17 E R1EX24256BSAS0I/R1EX24256BTAS0I R1EX24256BTAS0I (PTSP0008JC-B / Previous Code: TTP-8DAV) *1 D F 8 5 *2 E H 1 c JEITA Package Code RENESAS Code Previous Code MASS[Typ.] P-TSSOP8-4.4x PTSP0008JC-B TTP-8DAV 0.034g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. b p Index mark Z 1 4 e *3 b p x M A y A Terminal cross section ( Ni/Pd/Au plating ) Detail F L 1 L θ Reference Dimension in Millimeters Symbol Min Nom Max D E 4.40 A 2 A 1 A b p b c c θ 0 8 H E e x y Z L L R10DS0003JJ0400 Rev.4.00 Page 17 of 17

18 R1EX24256BSAS0I/R1EX24256BTAS0I Rev Voltage detector DC I SB I CC1 = I CC2 = 1.5 ma 85 Feature Ordering information #U0, #K0(SOP type) #U0(TSSOP type) Halogen free Inner wire V SS WP C - 1

19 OA AV RoHS Renesas Electronics Corporation. All rights reserved. Colophon 3.0

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