G 2 5 MHz 2V/µs icmos AD825 MSOP 2 5 5 5V DC CMRR 98dB G ppm/.7µv/ G AC.% 65ns 2V/µs khz THD db CMRR 5kHz 8dB 8nV/ Hz G ma IN +IN DGD A A 2 6 5 LOGIC AD825 8 3 9 7 OUT 6288-25 2 5 G = G = 5 AD825 GΩ PGIA A/DADC MHz db THD 65ns.% G.7µV/ ppm/ DC 5kHz 8dB G CMRR DC AD825 2 2 GAIN (db) 5 5 k k k M M M. 2. High Low High Mil Low Digital Performance Cost Voltage Grade Power Gain AD822 AD623 AD628 AD62 AD627 AD823 AD822 AD8553 AD629 AD62 AD825 AD8222 AD52 AD8555 AD822 AD526 AD8556 to G = 2 G = FREQUENCY (Hz) AD62 AD8557 AD825 MSOP 85 6288-23 REV. REVISION 27 Analog Devices, Inc. All rights reserved. 5-689 -6-3 52 82 532-3 3-5-36 MT 2 6 635 6868
AD825 /7 Revision : Initial Version
AD825 V S 5V V S 5 V V V@T A 25 G R L 2kΩ 2 Parameter Conditions Min Typ Max Unit COMMON-MODE REJECTION RATIO (CMRR) CMRR to 6 Hz with kω Source Imbalance +IN = IN = V to + V G = 8 9 db G = 2 86 db G = 5 9 6 db G = 98 6 db CMRR to 5 khz +IN = IN = V to + V G = 8 db G = 2 86 db G = 5 9 db G = 9 db NOISE Voltage Noise, khz, RTI G = nv/ Hz G = 2 27 nv/ Hz G = 5 2 nv/ Hz G = 8 nv/ Hz. Hz to Hz, RTI G = 2.5 µv p-p G = 2 2.5 µv p-p G = 5.5 µv p-p G =. µv p-p Current Noise, khz 5 pa/ Hz Current Noise,. Hz to Hz 6 pa p-p VOLTAGE OFFSET Offset RTI V OS G =, 2, 5, ±2 + 6/G µv Over Temperature T = to +85 ±26 + 9/G µv Average TC T = to +85 ±.2 + 5/G µv/ Offset Referred to the Input vs. Supply (PSR) V S = ±5 V to ±5 V ±6 + 2/G µv/v INPUT CURRENT Input Bias Current 5 3 na Over Temperature T = to +85 na Average TC pa/ Input Offset Current 5 3 na Over Temperature T = to +85 3 na Average TC 6 pa/ DYNAMIC RESPONSE Small Signal 3 db Bandwidth G = MHz G = 2 MHz G = 5 MHz G = 3 MHz Settling Time.% ΔOUT = V step G = 585 ns G = 2 65 ns G = 5 65 ns G = 68 ns
AD825 Parameter Conditions Min Typ Max Unit Settling Time.% ΔOUT = V step G = 65 ns G = 2 635 ns G = 5 635 ns G = 685 ns Slew Rate G = 2 V/µs G = 2 25 V/µs G = 5 25 V/µs G = 25 V/µs Total Harmonic Distortion f = khz, R L = kω, G = db GAIN Gain Range G =, 2, 5, V/V Gain Error OUT = ± V G =.3 % G = 2, 5,. % Gain Nonlinearity OUT = V to + V G = R L = kω, 2 kω, 6 Ω 6 ppm G = 2 R L = kω, 2 kω, 6 Ω 8 ppm G = 5 R L = kω, 2 kω, 6 Ω 8 ppm G = R L = kω, 2 kω, 6 Ω ppm Gain vs. Temperature All gains ppm/ INPUT Input Impedance Differential GΩ pf Common Mode GΩ pf Input Operating Voltage Range V S = ±5 V to ±5 V +.. V Over Temperature T = to +85 +.. V OUTPUT Output Swing 3.5 +3.5 V Over Temperature T = to +85 3.5 +3.5 V Short-Circuit Current 37 ma ERENCE INPUT R IN 2 kω I IN +IN, IN, = µa Voltage Range V Gain to Output ±. V/V DIGITAL LOGIC Digital Ground Voltage, Referred to GND +.25 2.7 V Digital Input Voltage Low Referred to GND 2. V Digital Input Voltage High Referred to GND 2.8 V Digital Input Current µa Gain Switching Time 325 ns t SU See Figure 3 timing diagram 2 ns t HD ns t -LOW 2 ns t -HIGH ns
AD825 Parameter Conditions Min Typ Max Unit POWER SUPPLY Operating Range ±5 ±5 V Quiescent Current, +I S..5 ma Quescent Current, I S 3.7.5 ma Over Temperature T = to +85.5 ma TEMPERATURE RANGE Specified Performance +85 t -HIGH t -LOW t SU t HD A, A 6288-5 7 3.
AD825 3 Parameter Rating Supply Voltage ±7 V Power Dissipation See Figure 2 Output Short-Circuit Current Indefinite Common-Mode Input Voltage ±V S Differential Input Voltage ±V S Digital Logic Inputs ±V S Storage Temperature Range 65 to +25 Operating Temperature Range 2 to +85 Lead Temperature (Soldering sec) 3 Junction Temperature θ JA (-Layer JEDEC Standard Board) 2 /W Package Glass Transition Temperature 2 85 25 AD825 T J AD825 PC θ JA T A P D T J T A (P D θ JA ) P D V S I S R L V S /2 I OUT V OUT I OUT PD Quiescent Power Total Drive Power Load Power VS VOUT VOUT PD ( VS IS) RL RL R L V S V OUT V S /2 θ JA θ JA JEDEC MAXIMUM POWER DISSIPATION (W) 2..75.5.25..75.5.25 2 2 6 8 2 AMBIENT TEMPERATURE ( C) ESD. ESD ESD ESD 6288-
AD825 IN +IN A A 2 3 5 AD825 TOP VIEW (Not to Scale) 9 8 7 6 OUT 6288-5 5. MSOP RM-. IN 2 3 A LSB 5 A MSB 6 7 OUT 8 9 +IN
AD825 T A @25 +5V V S 5V R L kω 5 NUMBER OF UNITS 2 8 6 2 UNITS NUMBER OF 3 2 2 9 6 3 3 6 9 2 CMRR (µv/v) 6288-6 3 2 2 3 INPUT BIAS (na) 6288-9 6. CMRR G 9. NUMBER OF UNITS 35 3 25 2 5 5 2 5 5 5 5 2 OFFSET VOLTAGE RTI (µv) 6288-7 Hz) (nv/ NOISE 9 8 7 6 5 G = G = 2 3 G = 5 2 G = FREQUENCY (Hz) 6288-7. V OSI. 6 5 UNITS NUMBER OF 3 2 3 2 2 3 INPUT BIAS (na) 6288-8 2µV/DIV s/div 6288-8... HzG
AD825 5 3 G = G = 5 PSRR (db) 9 7 G = 2 G = 5 3 µv/div s/div 6288-2 k k k M FREQUENCY (Hz) 6288-6 2.. HzG 5. PSRR RTI 8 5 6 3 CURRENT NOISE (pa/ Hz) 2 8 6 PSRR (db) 9 7 5 G = 2 G = G = G = 5 2 FREQUENCY (Hz) 6288-3 3 k k k M FREQUENCY (Hz) 6288-7 3. 6. PSRR RTI 5 (na) BIAS CURRENT 5 5 I B I B + I OS pa/div s/div 6288-5 25 5 2 35 5 65 8 85 25 TEMPERATURE ( C) 6288-9.. Hz 7.
AD825 25 2 G = G = 5 2 G = CMRR (db) 8 G = 2 G = GAIN (db) 5 5 G = 5 G = 2 6 G = 5 2 k k k M FREQUENCY (Hz) 8. CMRR 6288-2 k k k M M M FREQUENCY (Hz) 2. 6288-23 CMRR (db) 2 8 6 G = G = 2 G = 5 G = 2 k k k M FREQUENCY (Hz) 6288-2 NONLINEARITY (ppm/div) f = khz 3 2 2 3 8 6 2 2 6 8 OUTPUT VOLTAGE (V) 6288-2 9. CMRR kω 22. G R L kω 2kΩ 6Ω CMRR (µv/v ) 8 6 2 2 6 8 5 3 3 5 7 9 3 TEMPERATURE ( C) 6288-9 NONLINEARITY (ppm/div) f = khz 3 2 2 3 8 6 2 2 6 8 OUTPUT VOLTAGE (V) 6288-25 2. CMRRG 23. G 2 R L kω 2kΩ 6Ω
AD825 3 f = khz (V) 6 2.V, +3.6V V, +3.8V V S = ±5V +3.6V, +3.V NONLINEARITY (ppm/div) 2 2 3 8 6 2 2 6 8 OUTPUT VOLTAGE (V) 6288-26 VOLTAGE COMMON-MODE INPUT 8 +V, +3.5V.2V, +2.2V +.3V, +2.V V S = ±5V.2V, 2.V +.3V, 2.V V,.V 8 2.V, 3.6V V, V +3.6V, 3.V 6 6 2 8 8 2 6 OUTPUT VOLTAGE (V) 6288-29 2. G 5 R L kω 2kΩ 6Ω 27. G NONLINEARITY (ppm/div) f = khz 3 2 2 3 8 6 2 2 6 8 OUTPUT VOLTAGE (V) 6288-27 INPUT VOLTAGE FERED TO SUPPLY VOLTAGES (V) +25 C +85 C 2 +25 C C +2 +85 C +25 C C + +25 C 6 8 2 6 SUPPLY VOLTAGE (±V S ) 6288-3 25. G R L kω 2kΩ 6Ω 28. G V V R L kω INPUT COMMON-MODE VOLTAGE (V) 6 2 8 8 2 3.8V, +6.9V 3.8V, 6.9V 3.8V, +.9V 3.8V,.9V V, +3.8V V S = ±5V V, +3.7V V S = ±5V V,.V +3.8V, +6.9V +3.9V, +.9V +3.8V, 2.V +3.8V, 6.9V CURRENT (ma) 5 5 5 5 +IN IN 6 V, V 6 2 8 8 2 6 OUTPUT VOLTAGE (V) 6288-28 6 2 8 8 2 6 DIFFERENTIAL INPUT VOLTAGE (V) 6288-3 26. G 29. G R L kω
AD825 OUTPUT VOLTAGE SWING FERED TO SUPPLY VOLTAGES (V).2..6.8. +. +.8 +.6 +. +.2 +25 C +85 C +25 C +25 C C C +85 C +25 C 6 8 2 6 SUPPLY VOLTAGE (±V S ) 6288-32 OUTPUT VOLTAGE SWING ERRED TO SUPPLY VOLTAGES (V). +85 C +25 C.8.2.6 2. +2. +.6 +.2 +25 C C C +25 C +.8 +. 2 +85 C 6 +25 C 8 2 6 OUTPUT CURRENT (ma) 6288-35 3. G R L 2kΩ 33. OUTPUT VOLTAGE SWING FERED TO SUPPLY VOLTAGES (V).2..6.8. +85 C +. +.8 +.6 +. +.2 +25 C +25 C C +25 C C +25 C +85 C 6 8 2 6 SUPPLY VOLTAGE (±V S ) 6288-33 V O U T (V ) NO LOAD 2mV/DIV 7pF pf TIME (µs) 2µs/DIV 6288-36 3. G R L kω 3. 5 +25 C SWING (V) VOLTAGE OUTPUT 5 5 +25 C C +85 C +85 C C +25 C 5V/DIV.2%/DIV 585ns TO.% 65ns TO.% +25 C 5 k k LOAD RSISTANCE ( Ω ) 6288-3 TIME (µs) 2µs/DIV 6288-37 32. 35. G R L kω
AD825 5V/DIV.2%/DIV 65ns TO.% 635ns TO.% V O U T (V ) TIME (µs) 2µs/DIV 6288-38 2mV/DIV TIME (µs) 2µs/DIV 6288-2 36. G 2 R L kω 39. G R L 2kΩ C L pf 5V/DIV.2%/DIV 65ns TO.% 635ns TO.% V O U T (V ) TIME (µs) 2µs/DIV 6288-39 2mV/DIV TIME (µs) 2µs/DIV 6288-3 37. G 5 R L kω. G 2 R L 2kΩ C L pf 5V/DIV.2%/DIV 68ns TO.% 685ns TO.% V O U T (V ) TIME (µs) 2µs/DIV 6288-2mV/DIV TIME (µs) 2µs/DIV 6288-38. G R L kω. G 5 R L 2kΩ C L pf
AD825 2 8 SETTLED TO.% V O U T (V ) (ns) TIME 6 SETTLED TO.% 2 2mV/DIV TIME (µs) 2µs/DIV 6288-5 2 6 8 2 6 8 2 STEP SIZE (V) 6288-5 2. G R L 2kΩ C L pf 5. G 5 R L kω 2 2 8 SETTLED TO.% 8 SETTLED TO.% (ns) TIME 6 SETTLED TO.% (ns) TIME 6 SETTLED TO.% 2 2 2 6 8 2 6 8 2 STEP SIZE (V) 6288-8 2 6 8 2 6 8 2 STEP SIZE (V) 6288-6 3. G R L kω 6. G R L kω 2 8 SETTLED TO.% (ns) TIME 6 SETTLED TO.% 2 2 6 8 2 6 8 2 STEP SIZE (V) 6288-7. G 2 R L kω
AD825 A A 2.2kΩ IN 2.2kΩ A kω kω DIGITAL GAIN CONTROL A3 OUTPUT A2 kω kω +IN 2.2kΩ 2.2kΩ 6288-5 7. AD825 3 7 icmos 2 5 7 AD825 2 5 THD G.3% G 98dB CMRR CMRR 5kHz 8dB G CMRR CMRR AD825 V 5V 2 AD825 2 A A 8 A A 5 8 AD825 µf.µf +IN IN µf.µf +5V A A AD825 5V +5V +5V G = 5V NOTE:. IN TRANSPARENT GAIN MODE, IS TIED TO V S. THE VOLTAGE LEVELS ON A AND A DETERMINE THE GAIN. IN THIS EXAMPLE, BOTH A AND A ARE SET TO LOGIC HIGH, RESULTING IN A GAIN OF. 8. A A G 6288-55
AD825 5. A A Gain Low Low Low High 2 High Low 5 High High PCB AD825 A A 9 AD825 5V V A A A A 6 µf.µf +IN IN µf.µf +5V + AD825 A A A A G = PREVIOUS STATE +5V V +5V V +5V V G = 6. A A Gain High to Low Low Low Change to High to Low Low High Change to 2 High to Low High Low Change to 5 High to Low High High Change to Low to Low X X No Change Low to High X X No Change High to High X X No Change X AD825 AD825 A A t SU A A t HD t HD A A t -HIGH t -LOW 2 5 AD825 PCB 5V NOTE:. ON THE DOWNWARD EDGE OF, AS IT TRANSITIONS FROM LOGIC HIGH TO LOGIC LOW, THE VOLTAGES ON A AND A ARE READ AND LATCHED IN, RESULTING IN A GAIN CHANGE. IN THIS EXAMPLE, THE GAIN SWITCHES TO G =. 6288-56 9. G t -HIGH t -LOW t SU t HD A, A 6288-5 7 5.
AD825 AD825 PSRR DC.µF µf 5 IC INCORRECT AD825 TRANSFORMER CORRECT AD825 TRANSFORMER.µF µf +IN A A AD825 AD825 AD825 V OUT MΩ LOAD IN THERMOCOUPLE THERMOCOUPLE.µF µf 5. 6288-58 C C AD825 f HIGH-PASS = 2 πrc C C R AD825 AD825 52 CAPACITIVELY COUPLED CAPACITIVELY COUPLED 52. I BIAS AD825 ESD 7 ESD 2.2kΩ 3V 3V DC 3V AD8256mA AD825 BAV99L FJH SP72 R 6288-59
AD825 kω 7 AD825 ADC V S V S.5V CMRR V 53. 3 AD825 AD825 26 27 INCORRECT AD825 V AD825 PC + CORRECT OP77 AD825 6288-6 AD825 AD825 CMRR AD825 2Hz CMRR AD825 CMRR CMRR PCB RF RF RF DC 5 R-C FilterFreq DIFF πr CD CC FilterFreq CM πrcc C D C C AD825
AD825 R R C C C D C C.µF +IN IN +5V AD825.µF µf 5V 5. RFI R C C RFI R C C R C C AD825 CMRR C C C D A/D CMRR A/D ADC AD825 ADC µf V OUT 6288-6 nf 9.9Ω AD762 nf ADC 9.9Ω nf AD762 AD825 AD762 AD825 µf.µf +IN IN µf.µf +5V 5V A A AD825 9.9Ω nf 55. ADC.µF +2V 2V AD762 +5V ADR35.µF 6288-62
AD825 ADC 57 AD825 AD87 V DC ADC ADC ADC V ADC µf.µf +IN IN +5V + A A AD825 MICRO- CONTROLLER µf.µf 5V 56. 6288-63 +2V.µF +5V 5V AMPLITUDE V IN +IN + A AD825 G = A.99kΩ V OUT A = V IN + V 2 AMPLITUDE +2.5V 2.5V V TIME +2V 2V µf.µf µf 2V.99kΩ 2V pf.µf + AD87 +2V.µF V OUT B = V IN + V 2 33. V V AMPLITUDE +2.5V 2.5V V TIME 6288-6
AD825 AD825 6 ADC 59AD825x AD825 FPGA AD762 AD825 ADG29 khz db THD 9dB S/N 58 (db) AMPLITUDE 2 3 5 6 7 8 9 2 3 5 5 2 25 3 35 5 5 FREQUENCY (khz) 58. AD825 AD825x DAQ FFT khz 6288-66 JMP.µF +2V +2V + + 2V µf µf JMP +5V 2kΩ +CH +CH2 +CH3 +CH CH CH3 CH2 CH 86Ω 86Ω 86Ω 86Ω 86Ω 86Ω 86Ω 86Ω V DD 2 SA EN 5 S2A 6 S3A 7 SA 8 ADG29 SB S3B 9 2 S2B 5 A SB A V SS 6 3 3 GND Ω Ω C D Ω Ω C C +IN C C IN 2 6 C3.µF 5 JMP + A A AD825 V V 9 S 8 3 +2V 2V C.µF +5V 2kΩ VOUT 7 Ω 9.9Ω +IN nf AD762 ADR35 ALTERA EPF6ATC-3.µF 2V JMP +5V 2kΩ JMP +5V R8 2kΩ 59. AD825x DAQ ADG29 AD825 AD762 6288-65
AD825 3. 3. 2.9.95.85.75 3. 3. 2.9 PIN.5.5 6.33.7 5.5 BSC COPLANARITY. 5.5.9.65. MAX SEATING PLANE.23.8 8.8.6. D6288--/7()-J COMPLIANT TO JEDEC STANDARDS MO-87-BA 6. MSOP RM- mm Model Temperature Range Package Description Package Option Branding AD825ARMZ to +85 -Lead MSOP RM- H AD825ARMZ-RL to +85 -Lead MSOP RM- H AD825ARMZ-R7 to +85 -Lead MSOP RM- H AD825-EVALZ Evaluation Board Z