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FUJITSU SEMICONDUCTOR DATA SHEET DS4 236 4 ASSPDTS Bi-CMOS PLL (. GHz PLL) MB5F7SL MB5F7SL,, MHz 2 PLL (Phase Locked Loop) LSI Bi CMOS, 5 ma (VCC 2.7 V), VCC 2.4 V,.5 ma, 6 ma 2, MB5F7SL,, MHz ( ) / MHz ( 2) VCC 2.4 V 3.6 V 5. (5.5) ma (VCC 2.7 V, Ta 25 C,, 2 ) 5.5 ma VCC 3. V. μa (VCC 3. V, Ta 25 C, ) μa (VCC 3. V, ).5 ma/6. ma ( ) 2 MHz (64/65, 28/29) 23 bit 4 bit (3 6383 ) 7 bit ( 27 ) bit (3 247 ),, PLL, 4 C 85 C Copyright 2-22 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 22.3
MB5F7SL TOP VIEW (SSOP-6) GND2 6 Clock OSCIN 2 5 Data GND 3 4 LE fin 4 3 fin2 VCC 5 2 VCC2 LD/fout 6 Xfin2 PS 7 PS2 DO 8 9 DO2 (FPT-6P-M5) 2 DS4 236 4
MB5F7SL SSOP-6 I/O GND2 2 GND 2 OSCIN I TCXO AC 3 GND GND 4 fin I AC 5 VCC,, OSC 6 LD/fout O 7 PS I (LD), (fout) LDS LD/fout LDS H fout /LDS L LD L ( ) PS H /PS L 8 DO O 9 DO2 O 2 PS2 I 2 L ( ) PS2 H /PS2 L Xfin2 I 2 2 VCC2 2 3 fin2 I 2 AC 4 LE I 5 Data I 6 Clock I ( ) LE,, ( ), / 2 / / 2 23 bit ( ) DS4 236 4 3
MB5F7SL GND 5 3 VCC PS 7 3 bit 7 bit bit LDS SW FC ( 7 bit) ( bit) fp 8 Do fin 4 (64/65, 28/29) 2 bit 4 bit bit LD T T2 ( 4 bit) CS fr OSCIN 2 AND fr2 LD T T2 fr 2 OR fr2 6 ( 4 bit) CS LD/ fp fout 2 bit 4 bit bit fp2 fin2 3 Xfin2 2 (64/65, 28/29) 2 PS2 2 LDS SW2 FC2 2 ( 7 bit) 2 ( bit) 3 bit 7 bit bit fp2 2 2 9 Do2 LE 4 Data 5 Clock 6 C N C N 2 (23 bit) 2 GND2 VCC2 4 DS4 236 4
MB5F7SL VCC.5 4. V VI.5 VCC.5 V VO GND VCC V Tstg 55 25 C (,, ),, VCC 2.4 3. 3.6 V VI GND VCC V Ta 4 85 C,,,,,,, DS4 236 4 5
MB5F7SL (VCC 2.4 V 3.6 V, Ta 4 C 85 C) ICC, 2 ( ) VCC 3. V 5. (5.5) ma IPS PS PS2 L. 5 μa fin 2 fin MHz fin2 2 fin2 2 MHz OSCIN fosc 3 4 MHz fin 3 Pfin, 5 Ω 5 2 dbm fin2 Pfin2 2, 5 Ω 5 2 dbm H OSCIN VOSC.5 VCC VP P Data LE Clock VIH.7 VCC.4 L VIL V.3 VCC.4 H VIH.7 VCC V PS, PS2 L VIL.3 VCC V H Data, LE, IIH 4.. μa Clock L PS, PS2 IIL 4.. μa H OSCIN IIH μa L IIL 4 μa H LD/fout VOH VCC 3. V, IOH ma VCC.4 V L VOL VCC 3. V, IOL = ma.4 V H Do VDOH VCC 3. V, IDOH.5 ma VCC.4 V L Do2 VDOL VCC 3. V, IDOL.5 ma.4 V V Do Do2 IOFF VCC 3. V VOFF.5 V VCC.5 V 2.5 na H LD/fout IOH 4 VCC 3. V. ma L IOL VCC 3. V. ma H Do Do2 IDOH 4 VCC 3. V, VDOH VCC / 2, Ta +25 C CS H 6. ma CS L.5 ma L Do Do2 IDOL VCC 3. V, VDOL VCC / 2, Ta +25 C CS H 6. ma CS L.5 ma 6 DS4 236 4
MB5F7SL (VCC 2.4 V 3.6 V, Ta 4 C 85 C) IDOL/IDOH IDOMT 6 VDO VCC / 2 3 VDO IDOVD 7.5 V VDO VCC.5 V Ta IDOTA 8 4 C Ta +85 C, VDO VCC / 2 : fin fin2 MHz, fosc 2 MHz, VCCIF 2.7 V, Ta 25 C I I3 2: AC pf IDOL I2 3: 28/29 64/65, 2.5 ma, dbm 4: IC IDOH I2 I4 5: fosc 2.8 MHz, VCC VCC2 3. V, Ta 25 C I 6: VCC 3. V, Ta 25 C ( I3 I4 ) / ( I3 I4 ) / 2.5 V CC /2 V CC -.5 V CC 7: VCC 3. V, Ta 25 C (IDOL, IODH ) ( I2 I ) / 2/ ( I I2 ) / 2 (V) 8: VCC 3. V (IDOL, IODH ) ( IDO (+85 C) IDO ( 4 C) / 2) / ( IDO (+85 C) IDO ( 4 C) / 2) DS4 236 4 7
MB5F7SL., fvco [ (P N) A] fosc R fvco VCO P /2 (64/28) N bit (3 247) A 7 bit ( 27, A < N) fosc (OSCIN ) R 4 bit (3 6383) 2. Data, Clock, LE 3, 2,, 2 Data,, (LE),, 2 2 CN CN2 () (LSB) (MSB) 2 3 4 5 6 7 8 9 2 3 4 5 6 7 8 9 2 2 22 23 CN CN2 T T2 R R2 R3 R4 R5 R6 R7 R8 R9 R R R2 R3 R4 CS X X X X CS R R4, 2 (3 6383) T, T2 CN, CN2 X ( ) ( ) MSB 8 DS4 236 4
MB5F7SL DS4 236 4 9 (2) 4 bit (R R4) ( ) 3 bit (N N) ( ) 3 7 bit (A A7) R4 R3 R2 R R R9 R8 R7 R6 R5 R4 R3 R2 R 3 4 6383 N N N9 N8 N7 N6 N5 N4 N3 N2 N 3 4 247 A7 A6 A5 A4 A3 A2 A 27 (LSB) (MSB) A A7, 2 ( 27) N N, 2 (3 247) LDS LD/fout SW/SW2 ( SW, 2SW2) FC/FC2 ( FC, 2FC 2) CN, CN2 ( ) MSB 2 3 4 5 6 7 8 9 2 3 4 5 6 7 8 9 2 2 22 23 CN CN2 LDS SW / SW2 FC / FC2 A A2 A3 A4 A5 A6 A7 N N2 N3 N4 N5 N6 N7 N8 N9 N N
MB5F7SL (SW) SW H SW L 64/65 28/29 2 64/65 28/29 (CS) LD/fout (LDS) CS LD/fout LDS 6. ma fout.5 ma LD (T, T2) LD/fout T T2 fr fr2 fp fp2 (FC, FC2) FC, FC2 H Do, Do2 FC, FC2 L Do, Do2 fr fp H L fr fp L H fr fp Z Z Z PLL,, VCO FC VCO () FC H VCO (2) FC L VCO () (2) ( ), DS4 236 4
MB5F7SL 3. ( ) PS/PS2 H L,,,,, (fr) (fp),, PLL,,,, PLL,,. μa, μa Do LD PLL Do,, (VCO), ( ) VCO ( ),,, VCC ON Clock Data LE PS PS2 () (2) (3) (), PS PS L ( ) (2) (VCC 2.2 V), μs, (3), ns, PS PS2 L H, DS4 236 4
MB5F7SL 4. Data, Clock, LE Clock, LE, st 2nd Data MSB LSB Clock t t2 t5 t t4 LE t3 t6 ns t, t6 2 ns t, t2, t4 3 ns t3, t5, LE L 2 DS4 236 4
MB5F7SL fr/ fr2 fp/ fp2 twu twl LD (FC H ) DO/ DO2 (FC L ) DO/ DO2 LD 2 LD / / H / L / L L ( ) 2 π 2 π Do/2 ( ) LD twu L, twl 3 H twu, twl, OSCIN, twu 2/fosc [s] ) fosc 2.8 MHz twu 56.3 ns twl 4/fosc [s] twl 32.5 ns DS4 236 4 3
MB5F7SL (fin, OSC IN ) fout VCC. μf S.G. pf pf 5 Ω 5 Ω S.G. DO PS LD/fout VCC fin GND OSCIN GND2 8 7 6 5 4 3 2 9 2 3 4 5 6 DO2 PS2 Xfin2 VCC2 fin2 LE Data Clock S.G. pf ( ) 5 Ω pf VCC2. μf 4 DS4 236 4
MB5F7SL. fin 5 Ta = +25 C Pfin (dbm) -5 - -5-2 VCC = 2.4 V VCC = 2.7 V VCC = 3. V VCC = 3.6 V -25-3 2 3 4 5 6 7 8 9 2 3 4 5 fin (MHz) 5 2 Ta = +25 C Pfin2 (dbm) -5 - -5-2 -25 VCC = 2.4 V VCC = 2.7 V -3 VCC = 3. V -35 VCC = 3.6 V -4 2 3 4 5 6 7 8 9 2 3 4 5 fin2 (MHz) DS4 236 4 5
MB5F7SL 2. OSCIN VOSC (dbm) - -2-3 -4-5 Ta = +25 C VCC = 2.4 V VCC = 2.7 V VCC = 3. V VCC = 3.6 V 5 5 2 25 3 35 4 45 5 fosc (MHz) 6 DS4 236 4
MB5F7SL 3. PLL Do.5 ma VDO IDO. Ta = +25 C VCC = 3 V IDO (ma) 2. /div IDOL IDOH..6/div 4.8 VDO (V) 6. ma VDO IDO. Ta = +25 C VCC = 3 V IDO (ma) 2. /div IDOL IDOH..6/div 4.8 VDO (V) DS4 236 4 7
MB5F7SL 4. PLL2 Do.5 ma VDO IDO. Ta = +25 C VCC = 3 V IDO (ma) 2. /div IDOL IDOH..6/div 4.8 VDO (V) 6. ma VDO IDO. Ta = +25 C VCC = 3 V IDO (ma) 2. /div IDOL IDOH..6/div 4.8 VDO (V) 8 DS4 236 4
MB5F7SL 5. fin fin : 36.88 Ω 683.25 Ω MHz 2 : 3.64 Ω 26.8 Ω 4 MHz 3 :.85 Ω 92.72 Ω 8 MHz 4 :.76 Ω 54.955 Ω MHz 2 4 3 START. MHz STOP. MHz fin2 : 299.88 Ω 658.6 Ω MHz 2 : 3 : 26.68 Ω 84.5 Ω 4 MHz.949 Ω 75.6 Ω 8 MHz 4 : 4.246 Ω 36.49 Ω MHz 4 2 3 START. MHz STOP. MHz DS4 236 4 9
MB5F7SL 6. OSCIN OSCIN : 9.45 kω 3.875 kω 3 MHz 2 : 4.7255 kω 5.685 kω MHz 4 2 3 3 :.698 kω 3.845 kω 2 MHz 4 : 463.75 Ω 2.69 kω 4 MHz START 3. MHz STOP 4. MHz 2 DS4 236 4
MB5F7SL (,, ) S.G. Test Circuit OSCIN fin Do LPF fvco = 5 MHz KV = 2 MHz/V fr = 2 khz fosc = 3 MHz LPF VCC = 3. V VVCO = 3.3 V Ta = +25 C CP : 6 ma mode. kω Spectrum Analyzer VCO 8 pf 2.2 kω.8 μf 33 pf PLL Reference Leakage ATTEN db RL dbm db/ MKR 7.6 db 2 khz CENTER.5 GHz SPAN. MHz RBW khz VBW khz SWP 5. ms PLL Phase Noise ATTEN db RL dbm db/ MKR 54.83 db 9.58 khz C/N = 79.6 (dbc/hz) BW = 6 khz CENTER.5 GHz SPAN 5. khz RBW 3 khz VBW 3 khz SWP.4 s DS4 236 4 2
MB5F7SL 5. MHz PLL Lock Up time 5 MH -> 3 MHz within ± khz Lch -> Hch 299 µs PLL Lock Up time 3 MH -> 5 MHz within ± khz Hch -> Lch 33 µs 5. MHz. MHz/div. MHz/div Hz 3.5 MHz. MHz S 2. ms S 2. ms 3.5 MHz 2. khz/div 2. khz/div 29.995 MHz 29.995 MHz S 2. ms S 2. ms Meas # 9 22 DS4 236 4
MB5F7SL OUTPUT VCO LPF pf 3 V. μf pf Clock Data LE fin2 VCC2 Xfin2 PS2 Do2 6 5 4 3 2 9 MB5F7SL 2 3 4 5 6 7 8 GND2 OSCIN GND fin VCC LD/fout PS Do 3 V pf pf TCXO. μf LockDet OUTPUT VCO LPF,,,,,, ( ), LSI,, LSI ( ), DS4 236 4 23
MB5F7SL MB5F7SLPFV SSOP, 6 (FPT-6P-M5) 24 DS4 236 4
MB5F7SL プラスチック SSOP, 6 ピン リードピッチ.65mm パッケージ 幅 パッケージ 長 さ リード 形 状 4.4 5.mm ガルウィング 封 止 方 法 取 付 け 高 さ プラスチックモールド.45mm MAX 質 量.7g (FPT-6P-M5) コード( 参 考 ) P-SSOP6-4.4 5.-.65 プラスチック SSOP, 6 ピン (FPT-6P-M5) * 5.±.(.97±.4) 注 )* 印 寸 法 のレジン 残 りは 片 側 +.5(.6)MAX 注 2)*2 印 寸 法 はレジン 残 りを 含 まず 注 3) 端 子 幅 および 端 子 厚 さはメッキ 厚 を 含 む 注 4) 端 子 幅 はタイバ 切 断 残 りを 含 まず.7±.3 (.7±.) 6 9 INDEX * 2 4.4±. 6.4±.2 (.73±.4) (.252±.8) Details of "A" part +.2.25. +.8.49.4 (Mounting height) LEAD No. 8.65(.26).24±.8 (.9±.3).3(.5) M "A" ~8.(.4).5±.2 (.2±.8).6±.5 (.24±.6).±. (Stand off) (.4±.4).25(.) C 23-2 FUJITSU SEMICONDUCTOR LIMITED F63S-c-4-8 単 位 :mm (inches) 注 意 : 括 弧 内 の 値 は 参 考 値 です DS4 236 4 25
MB5F7SL MEMO 26 DS4 236 4
MB5F7SL MEMO DS4 236 4 27
MB5F7SL 富 士 通 セミコンダクター 株 式 会 社 222-33 2--23 http://jp.fujitsu.com/fsl/ 2-98-6 : 9 7 (, ) PHS,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,