LMK03000,LMK03001 Literature Number: JAJA429
SIGNAL PATH designer Tips, tricks, and techniques from the analog signal-path experts No. 109...1-7...2 /....4...6...8 James Catt, Applications Engineer v(t) PLL VCO LMK03xxx F clkφ1 F clkφ2 F clkφ3 F clkφ4 s(n) s(n+1) s(n+2) s(n+3) FPGA s (k) Figure 1. Ts F clk φ1 Ts/4 Fclkφ2 Ts/4 F clk φ3 Ts/4 F clk φ4 s(n) s(n+1) s(n+2) s(n+3) s(n+4) s(n+5) s(n+6) s(n+7) Figure 2. 4
200fs PLL VCO TXCO LMH6552 14155 ASIC FPGA VCO SerDes PLL Loop Filter Backplane SerDes DS90LV018A LMK03000C PLL + VCO LMX2531 ASIC FPGA DAC DAC DAC14135 LMK03000/01LMK02000 VCO 3 3LVDS/5LVPECL 1MHz 785MHz 70% RMS LMK02000 200 fs LMK03000C/LMK03001C 400 fs LMK03000/LMK03001 800 fs 2G/3G LMK03000/01 LMK02000 Signal Path Designer www.national.com/jpn/timing 2
SIGNAL PATH designer m T φ S m =, m = 0,1,M-1 M T s + t 1 + 1 1 + a 1 d 1 v(t) FPGA Signal Processing 1 0.5 PLL T s+ t m+ m 1 + a m d m 0-0.5 0 1 2 3 4 1 2 3 4 1 VCO LMK03xxx -1 Figure 3. DC n = Figure 4. M=4 signalpath.national.com/jpndesigner 3
LMH6574 LMH67xx 083000 8 LCD LMH7220 LMX2531 LMK03000 LCD CPU LP 8 A/D A/D LMH 6GSPS 08500* 8, 500 MSPS 081000 8, 1 GSPS 8A/D 081500 8, 1.5 GSPS 0.2ps 08D500 8,, 500 MSPS 1 GSPS : DES 08D1000 8,, 1 GSPS 2 GSPS : DES 08D1500 8,, 1.5 GSPS 3 GSPS : DES 083000* 8, 3 GSPS LMH6703 LMH6704 LMH6574 LMH6555* LMH6552* LMH6550 LMH7220 / Icc ma V/ s 1.2 GHz 11 4500 650 MHz 11.5 3000 4:1 500 MHz 13 2200 1.2 GHz 120 3000 1 GHz 22.5 2500 400 MHz 20 3000 LVDS 2.9ns 2.9 ns 6.8 600 ps SOT23-6, SOIC-8 SOT23-6, SOIC-8 SOIC-14 LLP-16 SOIC-8, LLP-8 SOIC-8 TSOT-6 LMK03000* LMX2531 * LVDS LVPECL VCO 3 5 1 - PLL RMS 0.4ps 0.4ps signalpath.national.com/jpn 4
SIGNAL PATH designer dbfs -10-20 -30-40 -50 1 0.8 0.6 0.4 0.2 0-0.2-0.4-0.6-0.8 0-1 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 Figure 5. M=4 f-in k*fs/m ± f-in rm 2πf + IN ( n ) 2πf IN n 2πfIN rm s m ( n) = cos + 2 sin sin 2 f S fs f S k fs ± f k f IN + M M S -60-70 -80-90 -100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Fs/4 Fs/2 3Fs/4 f/fs Figure 6. ( n r ) T ) s m ( n) = cos(2 π fin + m s signalpath.national.com/jpndesigner 5
Tx Drvr LMH6550 LMH6551 14155/V155 012C170 DSxxMB200 DSxxBRx00 SCAN25100 SCAN12100 CLC5526 I DAC PA VGA 0 90 DUC Q DAC LMV225/6/7/8 LMV243 LMV232 LMV221 LMV751 LMV821 LM6211 FLTR PLL VCO LMX2531 ( LMX2xxx + VCO) CLC5526 DAC14135 CLC5903 (2.5G DDC/AGC) FPGA CPRI SerDes LNA GTA DVGA DDC LNA GTA DVGA Rx PLL VCO LMX2531 LMX2xxx + VCO 14155 14C105/080 12C105/080 12DL080/065/040 12QS065 LMK 10/100 PHY DP83848 DP83848 JTAG LM5xxx LM73 & LM95234 SCANSTA101/111/112 SCANSTA476 www.national.com/see/wirelessguide 6
SIGNAL PATH designer SNR 4 AWGN 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0.00 35 45 55 65 75 85 SNR (db) 14b, SD=0.008 UI 14b, SD=0.004 UI 14b, SD=0.0008 UI 12b, SD=0.004 UI Figure 7. 4 SNR signalpath.national.com/jpndesigner 7
Q1 Q R S PWM D1 1.25V L1 WEBENCH Signal Path Designer webench.national.com/jpn WEBENCH www.national.com/jpn/timing www.national.com/jpn/signalpath/ jpn.feedback@nsc.com No. 117...1-7 SIMPLE SWITCHER SIMPLE SWITCHER POWER designer Expert tips, tricks, and techniques for powerful designs...2 WEBENCH...4 PWM...6...8 40V Robert Bell, Applications Engineer V IN V OUT Figure 1. signalpath.national.com/jpndesigner power.national.com/jpndesigner IC National Semiconductor Corporation, 2007. National Semiconductor,, LLP, LMH, Signal Path Designer, and WEBENCH are registered trademarks of National Semiconductor. All other brand or product names are trademarks or registered trademarks of their respective holders. 570088-009-JP
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