DVI

DVI December 2003

December 2003

? December 2003 Page 3

Host Data Device Clock December 2003 Page 4

Data Skew Host Data Device Clock Setup Hold Data Skew December 2003 Page 5

Host Data Device Clock Setup Hold Propagation Delay December 2003 Page 6

EMC Current Host Data Device Clock Current December 2003 Page 7

Host Device Device Device December 2003 Page 8

CDR D Q PLL Clk ( 2 ) 1 CDR December 2003 Page 9

dv/dt = 4V/ns 5V 1ns dv/dt = 4V/ns 1V 200ps December 2003 Page 10

(D+) 1V (D-) 1V (D+) (D-) Common mode Noise December 2003 Page 11

EMI EMI Current (D+) (D-) Current December 2003 Page 12

DVI DVI DVI December 2003

DVI DDWG 98 8 DVI Rev 1.0 99 3 http://www.ddwg.org/downloads.html Download HDCP Rev 1.0 00 2 http://www.siimage.com/documents/sii-wp-002-a.pdf EIA EIA/CEA-861 01 1 http://www.ce.org/about_cea/cea_initiatives/downloads/dtv/dv I_Informational_Doc_1_04_02.pdf DDWG Test & Measurement Guide Ver. 1.0 01 2 http://www.ddwg.org/data/dvi_tm_guide_rev1.pdf HDMI 02 4 http://www.siimage.com/press/04_16_02.asp HDMI 1.0 http://www.hdmi.org/press/release_120902.asp December 2003 Page 14

DVI(Digital Visual Interface) DVI1.0 Digital Display Working Group Intel PC Video TMDS 2 (Dual Link) Molex Royalty-Free HDCP(High-bandwidth Digital Content Protection) CEA(EIA/CEA-861) (CEA=Consumer Electronics Association ) DVI1.0 DTV Royalty fair & reasonable Thomson, Philips HMDI(High Definition Multimedia Interface) Philips Silicon Image Thomson 7 EIA/CEA-861 TMDS(Transition-Minimized Differential Signaling) HDCP December 2003 Page 15

DVI Ser Des Ser Des Ser Des Ser Des 10 X10 X10 X10 X10 PLL PLL PLL PLL Incoherent Coherent December 2003 Page 16

DVI PLL DVI PLL 2 PLL December 2003 Page 17

HDMI HDMI PLL H( ) 1/(1+j / 0 ) 0 =2 F 0 F 0 =4.0MHz December 2003 Page 18

DVI 3 C(Compliance) F(Function) I(Interoperability) December 2003 Page 19

DVI December 2003

DVI(Digital Visual Interface) DVI R G B 1 DDWG R G Transmitter B Receiver Clk December 2003 Page 21

TMDS TMDS December 2003 Page 22

DVI DVI December 2003 Page 23

DVI RGB1 2 December 2003 Page 24

PC CE December 2003 Page 25

December 2003 Page 26

December 2003 Page 27

DVI DVI December 2003

December 2003 Page 29

(TP2) TP2 December 2003 Page 30

December 2003 Page 31

December 2003 Page 32

DDWG (TPA-R) PLL PLL EEPROM( ) DVI December 2003 Page 33

Test & Measurement Guide H(s)=1/(s + 40us) December 2003 Page 34

DVI AVcc Data+ R T R T Clk- Data- Clk+ PLL PLL PLL Clk 2.5 December 2003 Page 35

Intra-Pair 65MHz 1.5m December 2003 Page 36

UXGA(162MHz) TPA-R PLL OD 2.5 December 2003 Page 37

1 UXGA(162MHz) TPA-R December 2003 Page 38

SDA PLL 4 1 4 December 2003 Page 39

SDA PLL 4 1 December 2003 Page 40

TPA2.0 PLL PLL TPA-P TPA-R HDMI ) December 2003 Page 41

UXGA(162MHz) TPA2.0-R PLL OD ( 10 1) (8 )10 December 2003 Page 42

UXGA(162MHz) TPA2.0-R PLL 10 1 December 2003 Page 43

December 2003

SDA6000A, SDA5000A, SDA3000A 4 2.7Gbps 2.5GHz December 2003 Page 45

infiniband SDA 25M 2.7G fibre channel DVI/HDMI Rapid IO IEEE 1394b serial ATA gigabit ethernet 100Mb/s 1.25Gbps SDA 2.5Gb/s PCI Express 5Gb/s December 2003 Page 46

December 2003 Page 47

CDR December 2003 Page 48

December 2003 Page 49

December 2003 Page 50

CRU CRU ( ) CRU ( ) December 2003 Page 51

SMA December 2003 Page 52

-> -> -> -> December 2003 Page 53

50ohm SG 50ohm Probe December 2003 Page 54

L1 C1 R L2 December 2003 Page 55

Input Impedance? 0 Frequency December 2003 Page 56

December 2003 Page 57

WaveLink Body Module WaveLink Probe Body Probe Module Body Module December 2003 Page 58

WaveLink December 2003 Page 59

2:1 D600AT, D300AT have +-2V input range with /2 370 mv LVDS 10% 37 mv,10:1 3.7 mv WaveLink 18.5 mv December 2003 Page 60

Probe Splitter DX00AT Probe Module December 2003 Page 61

ProLink ProBus December 2003 Page 62

WaveLink D600/D600AT WaveLink D600 Frequency Response System Amplitude (db) Scope Amplitude (db) 6 3 0-3 -6 Amplitude (db) -9-12 -15-18 -21-24 -27-30 -33-36 10 1000 Frequency (MHz) December 2003 Page 63

D600AT, D300AT December 2003 Page 64

TwinTip 45 0 mm 3 mm December 2003 Page 65

/ (WaveLink ) December 2003 Page 66

DX00AT TwinTips SP-ATT December 2003 Page 67

Spice December 2003

December 2003 Page 69

Spice Rout 50ohm TL1 50ohm TL2 25ohm TL3 50ohm 2 3 4 5 V1 1.5ns 1.5ns 0.3ns 0 0 0 0 0 0 0 0 R1 50ohm December 2003 Page 70

Spice V1 1 0 PWL(0,0 500ps,4V 100ns,4V) Rout 1 2 50 T1 2 0 3 0 Z0=50 TD=1.5ns T2 3 0 4 0 Z0=25 TD=0.3ns T3 4 0 5 0 Z0=50 TD=1.5ns R1 5 0 50 December 2003 Page 71

Spice December 2003 Page 72

Spice December 2003 Page 73

Spice Spice December 2003 Page 74

IC Rout 50ohm TL1 50ohm L1 8nH 2 3 4 V1 50ps C1 6pF RL 50ohm 0 0 0 0 0 December 2003 Page 75

Spice December 2003 Page 76

Spice December 2003 Page 77

Spice Spice December 2003 Page 78

3.125Gbps 3.125Gbps December 2003 Page 79

3.125Gbps December 2003 Page 80

3.125Gbps December 2003 Page 81