GaAsInP SiC 1),2) /cm 2 In LED LED 3) LD ),6) 2001 Void-Assisted-Separation: VAS 7) 12) Threading dislocation density: TDD10 6 /cm 2 L
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1 Development of Single-Crystal Substrates SCIOCS Co., Ltd. Hajime FUJIKURA Toshihisa INOUE Toshio KITAMURA Taichiro KONNO Takayuki SUZUKI Tetsuji FUJIMOTO Takehiro YOSHIDA Masatomo SHIBATA Toshiya SAITO In this paper, we first review fabrication technologies for single-crystal wafers which have been reported to date. Then, our original fabrication technique for single-crystal wafers which is called void-assisted separation (VAS) is introduced. Our recent progresses in wafer fabrication technology for next-generation devices, such as further improvement of crystal quality as well as increasing wafer size, are also explained in detail. Si LEDLD CD DVD IT III-VGaAs InP III Ga In AlVAs PSb LED LD III-VGaAs GaAs GaAs IT LED LD 1) 4) GaAs InPGaAs InP 2018
2 GaAsInP SiC 1),2) /cm 2 In LED LED 3) LD ),6) 2001 Void-Assisted-Separation: VAS 7) 12) Threading dislocation density: TDD10 6 /cm 2 LD In p- p-al n-al In QW n- Fig. 1 n + - substrate source p- n - gate n + - substrate drain n + - insulator Devices using free-standing substrates as starting substrates Laser diode and Vertical metal-insulator-semiconductor transistor 13),14) Fig. 1 LD VAS 2 15) Fig. 2 15) 20µm mm 10 6 /cm 2 7) 12) ELOEpitaxial Lateral Overgrowth: ELO ELO 5) ELO ELO 6) 2018
3 Seed crystal Self-formed small seed Thin layer on foreign substrate (template) Enlargement (free-standing) w/o substrate removal (template) with substrate removal (free-standing substrate) Strategy layered growth ELO mass-production layered growth layered growth ELO facet growth Size TDD (/cm 2 ) Issue several mm 10 3 Size 2-inch 10 7 High TDD Wafer bow High TDD Highly defective region 10 6 Thick- growth Off-angle 10 5 Highly defective region? Highly defective region Fig. 2 Summary of strategies for bulk crystal fabrication and their characteristics 15) ELO Fig. 3 15) C CGa C 10) 12) ELO ELO crystal Fig. 3 foreign substrate dislocation surface at each growth period mask highly defective region crystal several 10s ~ several 100s µm foreign substrate surface at each growth period low TDD region dislocation Main mechanism of dislocation reduction in crystal growth for layered growth and ELO and faceted growth 15) Through-hole Fig. 4 particle Crack Inversion domain (ID) crystal foreign substrate Various macro-defects observed in crystal Inversion Domain: IDGa NC Fig. 4 µm mm 6) ELO Fig. 5 Fig. 5 µm C C Pit Highly-doped region 2018
4 (c) Thin seed layer islands < 1 µm nano-void Sapphire Seed crystal Initial growth stage Coalescence (d) (e) (f) C-plane bowing Substrate removal Fig. 5 stress stress An example of bulk crystal fabrication sequence by thick layer growth on seed crystal with nano-voids Copyright (2018) The Japan Society of Applied Physics 12) 16),17) Fig. 5 (e)(f) C Fig. 4 ELO C ELO 10 5 /cm 2 MOVPEHVPE GaAs InP Na Table 1 MOVPE LD Fig. 2 4) µm/h mm MOVPE HVPE 6) 12),18),19) HVPE 100µm/h ELO Na 20),21) HVPE mm ELO VAS Fig. 5 7) Table 1 Method of crystal growth and their characteristics Growth method Features Present status Vapor phase Liquid phase Metal-organic vapor phase epitaxy (MOVPE) Hydride vapor phase epitaxy (HVPE) Ammonothermal method Na-flux method is grown by reaction between Trimethylgallium and NH3. is grown by reaction between GaCl and NH3. is re-crystallized from raw material dissolved in supercritical NH3. is grown by reaction between Ga and N2 both dissolved in Na-melt. Used for ELO-template growth in R&D stage of LDs. Main method for mass-production of substrates R&D phase. R&D phase. 2018
5 HVPE HVPEFig. 6 Ga HCl GaCl NH31100 Fig. 7 MOVPE Ti Ti TiN Fig. 7 HVPEFig. 7 Fig. 5 Fig. 7 HVPE source zone (~850 C) growth zone (~1100 C) H2/N2 wafer NH3 exhaust HCl Ga-melt GaCl 100µm VAS mm 10 6 /cm 2 100µmELO Fig. 8 VAS Fig. 4 ELO Dislocation density (cm 2 ) x-direction y-direction Distance from wafer center (mm) y x 1 Ga + HCl GaCl + H2 GaCl + NH3 + H2 + HCl 2 Fig. 6 Schematic drawing of HVPE equipment Fig. 8 Threading dislocation density (TDD) distribution of free-standing substrate made by the VAS-method Ti TiN nano-net thin layer Sapphire MOVPE growth thin layer Sapphire Deposition of Ti Nano-void Anneal 0 sec. 1 min. 5 min. 1 µm 30 µm 30 µm nano-void 10 µm sapphire 3 µm 10 µm Fig. 7 Sequence of seed crystal formation in void-assisted separation method (VAS) and SEM photograph of initial stage of substrate growth by HVPE on the voided-seed crystal 2018
6 (c) Fig. 9 Photographs of free-standing substrates made by the VAS method. and as-grown bulk crystals before and after growth optimization, respectively. (c) Free-standing wafers after application of polishing process. VAS VASHVPE 22),23) Fig. 9 2 HVPE Ga VAS HVPE HVPE Fig. 9 Fig. 9 MOVPE ID Fig. 9 (c) 2 VAS 10 6 /cm 2 LD LED LD LED VAS Fig. 10 AB 10) Fig. 5 C VAS 1mm 10 6 /cm 2 2 3mm /cm
7 Threading dislocation density, TDD (/cm 2 ) Nano-indentation hardness (GPa) TDD = /cm 2 n = /cm 3 AS-grown thickness, tas (mm) HVPE growth conditions Fig. 10 Effect of crystal hardness on the available as-grown thickness, tas and TDDs. Relationships between tas and TDD for the macro-defect-free substrates grown by the VAS-method using the conditions A-D. Cathodoluminescence images for substrates grown using the conditions B and D are shown as insets. Dependence of nano-indentation hardness values of the crystal grown by the VAS-method on HVPE-growth conditions A-D. Copyright (2018) The Japan Society of Applied Physics 12) HVPE Fig. 10 A 19.6GPa B, C, D D22GPa 12) D 24) 28) Fig. 10 DFig. 11 6mm 10 5 /cm 2 Fig. 10 D HVPE Fig mm as-grown surface 55mm > 6mm Photographs of thick bulk crystal for 2-inch wafer grown using the conditions D after cylindrical grinding. Top-view and bird s-eye view. Copyright (2018) The Japan Society of Applied Physics 12) 10 6 /cm 2 10µm 10nm100nm 2018
8 D A-C GaAs10 29) Al 30) VAS Large off-angle variation Fig. 5 C Fig. 12 C 1mm VAS mm mm 2Fig HVPE Fig ) 2 VAS Fig mm large wafer small off-angle variation φ2-inch HVPE susceptor small wafer C-planes Fig. 12 Schematic explanation of difficulty in achieving small off-angle variation for large size wafer in comparison with small wafer. If C-plane curvature of crystals are the same, large wafer should have larger off-angle variation than small wafer. Fig. 13 Concept of tiling method and Photograph of 7-inch freestanding substrate made by the tiling method 2018
9 Fig Ga /cm inch (polished) Fig inch (polished) 6-inch (as-grown) Photograph of 2, 4 and 6-inch size macro-defect-free wafers grown using the conditions D. The 2 and 4-inch wafers were single side polished wafers. On the other hand, the 6-inch one was the as-grown wafer with residual Ga on its backside. Copyright (2018) The Japan Society of Applied Physics 12) VAS VAS 10 6 /cm 2 HVPE 10 5 /cm LDLED VAS 1) I. Akasaki et al., J. Cryst. Growth, 98, 209 (1989). 2) S. Nakamura, Jpn. J. Appl. Phys., 30, L1705 (1991). 3) S. Nakamura et al., Jpn. J. Appl. Phys., 34, L797 (1995). 4) S. Nakamura et al., Jpn. J. Appl. Phys., 35, L74 (1996). 5) A. Usui et al., Jpn. J. Appl. Phys., 36, L899 (1997). 6) K. Motoki et al., J. Cryst. Growth, , 912 (2002). 7) Y. Oshima et al., Jpn. J. Appl. Phys., 42, L1 (2003). 8) Y. Oshima et al., Jpn. J. Appl. Phys., 45, 7685 (2006). 9) Y. Oshima et al., J. Cryst. Growth, 312, 3569 (2010). 10) H. Fujikura et al., J. Cryst. Growth, 350, 38 (2012). 11) H. Fujikura et al., Proc. SPIE, 10104, (2017); doi: / ) H. Fujikura et al., Jpn. J. Appl. Phys., 57, (2018). 13) H. Ohta et al., IEEE Electron Device Lett., 36, 1180 (2015). 14) T. Oka et al., Appl. Phys. Express, 8, (2015). 15),, 137, 685 (2017). 16) M. Sarzyński et al., Appl. Phys. Express, 5, (2012). 17) F. Horikiri et al., Jpn. J. Appl. Phys., 56, (2017). 18) K. Fujito et al., J. Cryst. Growth, 311, 3011 (2009). 19) K. Xu et al., Chin. Phys. B, 24, (2015). 20) F. Kawamura et al., Jpn. J. Appl. Phys., 45, L1136 (2006). 21) R. Dwiliński et al., J. Cryst. Growth, 310, 3911 (2008). 2018
10 22) J. L. Weyher et al., J. Cryst. Growth, 312, 2611 (2010). 23) C. E. C. Dam et al., J. Cryst. Growth, 307, 19 (2007). 24) M. Fujikane et al., J. Alloys and Compounds, 450, 405 (2008). 25) J. Huang et al., Nanoscale Res. Lett., 7, 150 (2012). 26) M. Fujikane et al., Phys. Status Solidi C, 7, 1798 (2010). 27) C. Tsai et al., Appl. Surf. Sci., 254, 1997 (2002). 28) R. Nowak et al., Appl. Phys. Lett., 75, 2070 (1999). 29) T. E. M. Staab et al., Phys. Rev. Lett., 83, 5519 (1999). 30) V. Gavini et al., Phys. Rev. B, 76, (2007). 31) T. Yoshida et al., Phys. Status Solidi B, 254, (2017). PROFILE Hajime FUJIKURA Tetsuji FUJIMOTO Toshihisa INOUE Takehiro YOSHIDA Toshio KITAMURA Masatomo SHIBATA Taichiro KONNO Toshiya SAITO Takayuki SUZUKI 2018
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