PC murakami@cc.kyushu-u.ac.jp
muscle server blade server PC PC +
EHPC/Eric (Embedded HPC with Eric) 1216 Compact PCI Compact PCIPC Compact PCISH-4 Compact PCISH-4 Eric Eric
EHPC/Eric
EHPC/Eric Gigabit Ethernet CompactPCI CompactPCI LSI Eric LSI Eric LSI Eric CompactPCI PC CPU SH-4 PCI
Compact PCI Compact PCI Eric LSI SDRAM Eric1GB MPU SH4 PCII/F Ethrenet
vs. HPC MPP SMP PC Ethernet, etc. Compact PCI, Ethernet, etc.
PC Compute Intensive +
p 0 p 1 o 0 o 1 N H S PC S = (1 p) + p N 1 (1 o) + o H
etc.
PCXeon (2.8GHz) 80 512GB/processor2 STO-3G 1 HIV-1 protease
10 4 27 RNA 10 6 2740 110 500010
(1) (2) (3) (4) (6) (5)C = = = N I a ai IJ N I ai IJ C S C F 1 1 ε + + = K L KL IJ IJ IJ JL IK KL IJ P V T F ), ( 2 1 ), (
(1) (2) (3) (4) (6) (5)C 75 58 37 20 10 427 316 207 110 55 27.5 9.15 2.2 0.3 0.1 23614.5 8584.9 1892.7 272.9 23.7 Total 211.7 60.9 11.0 1.7 0.2 23284.3 (98.6%) 8482.1 (98.8%) 1871.0 (98.6%) 269.4 (98.7%) 22.9 (96.6%) 10.1 5.0 1.5 0.3 0.1 57.3 18.9 4.4 0.6 0.1 GAQMY GAQM GAQ GA G 98 LSI
for(i = 0; I < Nshell; I++) for( J = 0; J < I; J++) for (K = 0; K < I; K ++) for( L = 0; L < I; L++) for(i = 0; i < N i ; i++) for(j = 0; j < N j ; j++) for (k = 0; k < N k ; k++) for(l = 0; l < N l ; l++) <s i s j s k s l > forend forend forend forend <a I a J a K a L >() forend forend forend forend
Eric LSI LSI: IIC RC
Eric:LSI 32b SH-4 I/F 64b 64b 64b 64b IIC Program Memory (64KB) ERF Table (128KB) RC Microprogram Memory (64KB) 16b 64b 64b 64b 64b 64b IIC Engine RC Engine 0 RC Engine 1 RC Engine 2 RC Engine 3 IALU FMUL &ADD FDIV &SQRT EXP &ERF IALU FMUL &ADD IALU FMUL &ADD IALU FMUL &ADD IALU FMUL &ADD Register File Register File Register File Register File Register File 64b 64b 64b 64b 64b Data Memory (32KB/bank 8banks) 64b IIC (RISC ) 64b SDRAM I/F 64b RC ( CMP )
LSI Eric vs. Intel P4 LSI Eric CMP 200MHz Intel P4 3.2GHz 2003 10
GAQMY Pentium 1100 ( 19 ) Pentium 640 ( 11 )
(704KB) Eric LSI (3.6M) 5mm 10mm TSMC 0.13µm 3.6M 704KB 5mm 10mm :200MHz 10W 2GFlop/s()
Compact PCI Compact PCI Eric LSI SDRAM Eric1GB MPU SH4 PCII/F Ethrenet
EHPC/Eric =Eric 28 PC Ethernet Eric112
EHPC/Eric GFlop/s MO ( ) W D H:mm KW M$ EHPC/Eric 112 224 ()) 2 1200 650 1010 () 2 () 0.1 SR8000/64 512 512 4 4720 3274 1785 212 15
HPC PCI I/O SDRAM GPIO UART Interrupt Controller PCI I/O
300 MHz, 32-bit Xtensa-based processor 16- and 24-bit instructions FPU MMU with TLB Stretch Instruction Set Extension Fabric Aligned load and store 8, 16, 32, 64, and 128 bit Unaligned load and store Up to 16 bytes variable byte streaming I/O Up to 32 bits variable bit streaming I/O User-defined extensions to the core ISA Defined in C/C++ Fully pipelined and interlocked Low power consumption Support for standard operating systems Stretch
CRAY XD1 Compute Processors Chassis 12 Each Rack 144 Performance Aggregate Switching Capacity Interprocessor Latency Aggregate Memory Bandwidth Maximum Memory Maximum Disk Storage 53 GFlop/s 96 GB/s 1.6 us 77 GB/s 96 GB 296 GB 633 GFlop/s 1152 GB/s 1.8 us 922 GB/s 1152 GB
PC murakami@cc.kyushu-u.ac.jp