プログラミング可能なソフトスタート機能を備えた3.0A LDOリニア・レギュレータ



Similar documents
プログラミング可能なソフト・スタート機能を備えた1.5A LDO リニア・レギュレータ

?????????????????NMOS?250mA????????????????

電源監視回路

Unidirectional Measurement Current-Shunt Monitor with Dual Comparators (Rev. B

Triple 2:1 High-Speed Video Multiplexer (Rev. C

16-Bit, Serial Input Multiplying Digital-to-Analog Converter (Rev. B

????????????MUX ????????????????????

定電流駆動 LED ドライバ

AD8212: 高電圧の電流シャント・モニタ

ECO-MODE? ???1.5A?60V?????SWIFT??DC/DC ?????

LP3470 Tiny Power On Reset Circuit (jp)

MAX4832 DS.J

LM150/LM350A/LM350 3A 可変型レギュレータ

LM mA 低ドロップアウト・リニア・レギュレータ

High-Voltage (100V

LT 低コスト、シャットダウン機能付き デュアルおよびトリプル300MHz 電流帰還アンプ

MAX4836 DS.J

ECO-MODE™ 搭載、1.5A、42V、降圧型 SWIFT™ DC/DC コンバータ

LM2940

LM6172 デュアル高速低消費電力、低歪み電圧帰還アンプ

OPA134/2134/4134('98.03)

LM117/LM317A/LM317 可変型3 端子レギュレータ

LM7171 高速、高出力電流、電圧帰還型オペアンプ

LM317A

untitled

Plastic Package (Note 12) Note 1: ( ) Top View Order Number T or TF See NS Package Number TA11B for Staggered Lead Non-Isolated Package or TF11B for S

TO-92 Plastic Package (Z) TO-252 (D-Pak) Bottom View Dual-In-Line Packages (N) Surface-Mount Package (M, MM) Front View 8-Lead LLP Top View 4 DAP Top

MAX DS.J

LTC 高効率同期整流式降圧スイッチング・レギュレータ

LM837 Low Noise Quad Operational Amplifier (jp)

LMC6082 Precision CMOS Dual Operational Amplifier (jp)

LP2985 マイクロパワー150mA 低ノイズ、超低ドロップアウト・レギュレータ(SOT-23 およびmicro SMD パッケージ) 超低ESR 出力コンデンサが使用可能

General Purpose, Low Voltage, Rail-to-Rail Output Operational Amplifiers 324 V LM LMV321( )/LMV358( )/LMV324( ) General Purpose, Low Voltage, Rail-to-

LMC6022 Low Power CMOS Dual Operational Amplifier (jp)

MITSUMI Any products mentioned in this catalog are subject to any modification in their appearance and others for improvements without prior notificat

LM3886

LM A High Efficiency Synchronous Switching Regulator (jp)

untitled

LM358

ADC121S Bit, ksps, Diff Input, Micro Pwr Sampling ADC (jp)

LM2940/LM2940C 1A 低ドロップアウト3 端子レギュレータ

LM2940.fm

LT 単一セル・マイクロパワー600kHz PWM DC/DCコンバータ

MAX6301 DS.J

MAX16804 DS Rev1.J

LMC7101/101Q Tiny Low Pwr Op Amp w/Rail-to-Rail Input and Output (jp)

高輝度白色 LED ドライバ 2mm x 2mm QFN と SOT-23 パッケージ

LT 定電流/定電圧、入力電流制限付き 2Aバッテリ・チャージャ

LM193/LM293/LM393/LM 回路入り低動作電圧低オフセット電圧コンパレータ

LTC 自己給電絶縁型コンパレータ

ABSOLUTE MAXIMUM RATINGS Supply Voltage ( )...+6V All Other Pins V to ( + 0.3V) Duration of Output Short Circuit to _ or...continuous Continuous

LTC ホット・スワップ・コントローラ

OPA277/2277/4277 (2000.1)

LTC 単一5VAppleTalk トランシーバ

LM4040.fm

LM3876

MAX DS.J

HA17458シリーズ データシート

DS90LV011A 3V LVDS 1 回路入り高速差動出力ドライバ

LMV851/LMV852/LMV854 8 MHz Low Power CMOS, EMI Hardened Operational Amplifi(jp)

LM2831 高周波数動作 1.5A 負荷 降圧型DC/DCレギュレータ

DAC121S101/DAC121S101Q 12-Bit Micro Power, RRO Digital-to-Analog Converter (jp)

AD8250 :ゲイン設定可能(G=1、2、5、10)な 10MHz、20V/μsのiCMOS®計装アンプ

LM Watt Stereo Class D Audio Pwr Amp w/Stereo Headphone Amplifier (jp)

LT レール・トゥ・レール電流センス・アンプ

pc725v0nszxf_j

LM2577.fm

1.1nV/√Hz の低ノイズ、低消費電力、高精度 オペアンプ、小型 DFN-8 パッケージ datasheet (Rev. A)

MAX4886 DS.J

MLA8取扱説明書

MAX665S//X ABSOLUTE MAXIMUM ATINGS B4P to PKN (MAX665X) to 24 B3P to PKN (MAX665) to 8 B2P to PKN (MAX665S) to 2 BP to PKN, B2P to B

LMC555 CMOSタイマ

LM1577/LM2577 シリーズSIMPLE SWITCHER® 昇圧型電圧レギュレータ

cms.pdf

R1RW0408D シリーズ

LM5021 AC-DC Current Mode PWM Controller (jp)

8ピン擬似共振制御グリーン・モード・コントローラ

ABSOLUTE MAXIMUM RATINGS Supply Voltage,...-.5V to 5.V Input Voltage (LVDS, TTL)...-.5V to ( +.5V) Output Voltage (LVDS)...-.5V to ( +.5V) Continuous

DS90LV V or 5V LVDS Driver/Receiver (jp)

LM35 高精度・摂氏直読温度センサIC

pc817xj0000f_j

LT6000/LT6001/LT シングル/デュアル/クワッド1.8V、13µA高精度レール・トゥ・レール・オペアンプ

untitled

MAX3736 DS.J

LM2575/LM2575HV SIMPLE SWITCHER 1A LM2575 ( ) 1A 3.3V 5V 12V 15V LM LM A ( ) ( ) ( ) Note: TO-220 SIMPLE SWITCHER SIMPLE SWITCHER 1A

LTC ビット、200ksps シリアル・サンプリングADC

ADC082S021 2 Channel, 50 ksps to 200 ksps, 8-Bit A/D Converter (jp)

DS90LV047A

8841, 8842 メモリハイコーダ

MAX9471/2 DS.J

LT シャットダウン機能付き、135μa、14nV/√Hz、レール・トゥ・レール出力、高精度オペアンプ

ELCODIS.COM - ELECTRONIC COMPONENTS DISTRIBUTOR

R1RP0416D シリーズ

Keysight Technologies スイッチング電源の測定

R1RW0416DI シリーズ


M51995AP/AFP データシート

R1EV5801MBシリーズ データシート

pc123xnnsz_j

NJM2835 低飽和型レギュレータ 概要 NJM2835 はバイポーラプロセスを使用し 高耐圧 ローノイズ 高リップル除去比を実現した出力電流 500mAの低飽和型レギュレータです TO パッケージに搭載し 小型 2.2 Fセラミックコンデンサ対応 ノイズバイパスコンデンサ内蔵をしてい

Transcription:

www.tij.co.jp TPS749xx µ µ SS = 0µ F V SS = 0.001µ F 1V/div SS = 0.0047µ F V IN IN PG V BIAS IN BIAS BIAS EN SS TPS74901 GND FB R 3 R 1 V 1V/div 0V 1.2V V EN SS R 2 Time (1ms/div) 1. 2.

(1) V (2) TPS749xxyyy z XX is nominal output voltage (for example, 12 = 1.2V, 15 = 1.5V, 01 = Adjustable). (3) YYY is package designator. Z is package quantity. (1) TPS749xx V IN,V BIAS Input voltage range 0.3 to +6 V V EN Enable voltage range 0.3 to +6 V V PG Power-good voltage range 0.3 to +6 V I PG PG sink current 0 to +1.5 ma V SS SS pin voltage range 0.3 to +6 V V FB Feedback pin voltage range 0.3 to +6 V V Output voltage range 0.3 to V IN + 0.3 V I Maximum output current Internally limited Output short-circuit duration Indefinite P DISS ontinuous total power dissipation See Dissipation Ratings Table T J Operating junction temperature range 40 to +125 T STG Storage junction temperature range 55 to +150 T A < +25 DERATING FATOR θ JA θ J POWER RATING ABOVE T A = +25 RGW (QFN) (1) 36.5 /W 4.05 /W 2.74W 27.4mW/ KTW (DDPAK) (2) 18.8 /W 2.32 /W 5.32W 53.2mW/ 2

µ µ TPS74901 MIN TYP MAX V IN Input voltage range V +V DO 5.5 V V BIAS Bias pin voltage range 2.7 5.5 V V REF Internal reference (Adj.) T J = +25 0.798 0.802 0.806 V Output voltage range V IN = 5V, I = 3.0V V REF 3.6 V Accuracy V + 2.2V V BIAS 5.5V, V (RGW package) (1) 50mA I 3.0A Accuracy V + 2.4V V BIAS 5.5V, (KTW package) (1) 50mA I 3.0A 2 ±0.5 2 % 2 ±0.5 2 V /V IN Line regulation V (NOM) + 0.3 V IN 5.5V 0.03 %/V V /I Load regulation 50mA I 3.0A 0.09 %/A V DO V IN dropout voltage (2) I = 3.0A, V BIAS V (NOM) 3.25V (3) 120 280 mv V BIAS dropout voltage (2) I = 3.0A, V IN =V BIAS 1.31 1.75 V % V = 80% V (NOM),RGW 3.9 4.6 5.5 Package I L urrent limit A V = 80% V (NOM), KTW 3.8 4.6 5.5 Package I BIAS Bias pin current 1 2 ma Shutdown supply current I SHDN V EN 0.4V 1 50 µa (I GND ) I FB Feedback pin current 1 0.150 1 1kHz, I = 1.5A, Power-supply rejection V IN = 1.8V, V = 1.5V (V IN to V ) 300kHz, I = 1.5A, PSRR V IN = 1.8V, V = 1.5V 1kHz, I = 1.5A, Power-supply rejection V IN = 1.8V, V = 1.5V (V BIAS to V ) 300kHz, I = 1.5A, V IN = 1.8V, V = 1.5V 100Hz to 100kHz, Noise Output noise voltage 25 V µv RMS I = 3.0A, SS = 0.001µF t STR Minimum startup time R LOAD for I = 1.0A, SS = open 200 µs I SS Soft-start charging current V SS = 0.4V 440 na V EN, HI Enable input high level 1.1 5.5 V V EN, LO Enable input low level 0 0.4 V V EN, HYS Enable pin hysteresis 50 mv V EN, DG Enable pin deglitch time 20 µs I EN Enable pin current VEN = 5V 0.1 1 µa V IT PG trip threshold V decreasing 85 90 94 %V V HYS PG trip hysteresis 3 %V V PG, LO PG output low voltage I PG = 1mA (sinking), V <V IT 0.3 V I PG, LKG PG leakage current V PG = 5.25V, V >V IT 0.1 1 µa Operating junction T J 40 +125 temperature Thermal shutdown Shutdown, temperature increasing +165 T SD temperature Reset, temperature decreasing +140 60 30 50 30 µa db db 3

IN urrent Limit V BIAS UVLO SS 0.44µ A Thermal Limit R 1 SS Soft-Start Discharge 0.8V Reference FB PG EN Hysteresis and Deglitch R 2 0.9 V REF GND R1 (kω) R2 (kω) V (V) Short Open 0.8 0.619 4.99 0.9 1.13 4.53 1.0 1.37 4.42 1.05 1.87 4.99 1.1 2.49 4.99 1.2 4.12 4.75 1.5 3.57 2.87 1.8 3.57 1.69 2.5 3.57 1.15 3.3 1. V = 0.8 (1 + R 1 /R 2 ) SS Open 470pF 1000pF 4700pF 0.01µF 0.015µF 2. SOFT-START TIME 0.1ms 0.5ms 1ms 5ms 10ms 16ms t SS (s) = 0.8 SS (F) /7.5 10 7 4

RGW PAKAGE QFN-20 (TOP VIEW) KTW PAKAGE DDPAK-7 (TOP VIEW) IN IN 6 20 IN 7 19 IN 8 18 PG BIAS 9 10 17 16 N FB EN 11 GND 12 N 13 N 14 SS 15 SS FB GND IN BIAS 5 4 3 2 1 N N N 1 2 3 4 5 6 7 EN NAME KTW (DDPAK) RGW (QFN) IN 5 5 8 EN 7 11 SS 1 15 µ BIAS PG 6 N/A 10 9 Ω Ω FB 2 16 N 3 N/A 1, 18 20 2 4, 13, 14, 17 µ GND 4 12 PAD/TAB 5

µ µ µ 0.20 V IN LINE REGULATION 0.5 V BIAS LINE REGULATION hange in V (%) 0.15 0.10 0.05 0 0.05 0.01 0.15 +25 40 +125 hange in V (%) 0.4 0.3 0.2 0.1 0 0.1 0.2 0.3 0.4 40 +125 +25 0.20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VIN V (V) VBIAS V (V) 3 4 1.0 LOAD REGULATION 0.5 LOAD REGULATION hange in V (%) 0.8 0.6 0.4 0.2 0 0.2 40 +25 +125 0 10 20 30 40 50 hange in V (%) 0.4 03 0.2 0.1 0 0.1 0.2 0.3 0.4 0.5 +25 40 +125 0 0.5 1.0 1.5 2.0 2.5 3.0 I (ma) I (A) 5 6 180 160 V IN DROP VOLTAGE vs i AND TEMPERATURE (T J ) V IN DROP VOLTAGE vs V IN DROP VOLTAGE vs I AND TEMPERATURE (T J ) 400 I = 3A 350 VDO(VIN V) (mv) 140 120 100 80 60 40 20 0 +125 40 +25 0 0.5 1.0 1.5 2.0 2.5 3.0 VDO(VIN V) (mv) 300 250 200 150 100 50 0 1.0 1.5 +25 +125 40 2.0 2.5 3.0 3.5 4.0 4.5 I (A) 7 VBIAS V (V) 8 6

µ µ µ VDO(VIN V) (mv) 200 180 160 140 120 100 80 60 40 20 V IN DROP VOLTAGE vs (V BIAS V ) AND TEMPERATURE (T J ) 40 +25 +125 I = 0.5A VDO(VBIAS V) (mv) 2200 2000 1800 1600 1400 1200 1000 800 V BIAS DROP VOLTAGE vs I AND TEMPERATURE (T J ) +125 40 +25 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 600 0 0.5 1.0 1.5 2.0 2.5 3.0 VBIAS V (V) I (A) 9 10 90 V BIAS PSRR vs FREQUENY 90 V IN PSRR vs FREQUENY Power-Supply Rejection Ratio (db) 80 70 60 50 40 30 20 10 V IN = 1.8V V = 1.2V V = 5V BIAS I = 0.1A I = 1.5A I = 0.5A SS = 1nF 0 10 100 1k 10k 100k 1M 10M Power-Supply Rejection Ratio (db) 80 70 60 50 40 30 20 10 V = 1.8V IN V = 1.2V I = 500mA I = 100mA = 1nF I SS = 1500mA I 0 10 100 1k 10k 100k 1M = 300mA 10M Frequency (Hz) Frequency (Hz) 11 12 Power-Supply Rejection Ratio (db) V IN PSRR vs (V IN V ) 90 80 70 V = 1.2V I = 1.5A SS = 1nF 1kHz 60 50 10kHz 40 500kHz 30 20 100kHz 10 0 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 Output Spectral Noise Density (µv/ Hz ) 1 0.1 I = 100mA V = 1.2V NOISE SPETRAL DENSITY SS = 10nF 0.01 100 1k 10k SS = 0nF SS = 1nF 100k VIN V (V) Frequency (Hz) 13 14 7

µ µ µ 2.0 BIAS PIN URRENT vs I AND TEMPERATURE (T J ) 2.0 BIAS PIN URRENT vs V BIAS AND TEMPERATURE (T J ) 1.8 1.6 +125 1.8 1.6 +125 1.4 1.4 I BIAS (ma) 1.2 1.0 0.8 0.6 0.4 40 +25 I BIAS (ma) 1.2 1.0 0.8 0.6 0.4 +25 40 0.2 0.2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 I (A) V BIAS (V) 15 16 500 SOFT-START HARGING URRENT (I SS )vs TEMPERATURE (T J ) 1.0 LOW-LEVEL PG VOLTAGE vs URRENT I SS (na) 475 450 425 400 375 350 325 V OL Low-Level PG Voltage (V) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 300 50 25 0 25 50 75 100 125 0 0 2 4 6 8 10 12 Junction Temperature ( ) PG urrent (ma) 17 18 5.0 4.5 40 URRENT LIMIT vs (V BIAS V ) urrent Limit (A) 4.0 3.5 3.0 2.5 +25 +125 2.0 Drive capability of output FET limits I when VBIAS V is under 2.0V. 1.5 V = 0.8V 1.0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 V BIAS V (V) 19 8

µ µ µ V BIAS LINE TRANSIENT V IN LINE TRANSIENT 100mV/div SS = 1nF = 10µ F (eramic) 100mV/div = 10µ F (eramic) 100mV/div = 2.2µ F (eramic) SS = 1nF 5.0V 3.8V 1V/div 3.3V 1V/ µ s 1V/div 1.8V 1V/ µ s Time (50µ s/div) 20 Time (50µ s/div) 21 PUT LOAD TRANSIENT RESPONSE TURN-ON RESPONSE 100mV/div = 470µ F (OSON) SS =0nF 100mV/div = 100µ F (eramic) 0.5V/div SS = 2.2nF SS = 1nF V 100mV/div 2A/div = 22µ F (eramic) 50mA 3A 1A/ µ s SS = 1nF 1V/div 0V 1.2V V EN Time (50µ s/div) 22 Time (1ms/div) 23 POWER-UP/POWER-DOWN V PG (500mV/div) V = V = V IN BIAS EN 1V/div V Time (20ms/div) 24 9

µ Ω µ µ µ µ V IN IN PG IN 1µF BIAS EN TPS74901 R 3 V V BIAS BIAS 1µF SS GND FB R 1 10µF SS R 2 V = 0.8 1+ R 1 ( ) R 2 25. 10

Reference BIAS Simplified Block Diagram 26. IN V BIAS = 5V ±5% V IN = 1.8V V = 1.5V I = 1.5A Efficiency = 83% FB V Reference BIAS Simplified Block Diagram 27. V IN V IN V BIAS = 3.3V ± 5% V IN = 3.3V ± 5V V = 1.5V I = 1.5A Efficiency = 45% FB (V REF SS ) t SS = (1) I SS = t SSL (V (NOM) ) I L(MIN) (2) 11

µ µ µ Ω µ µ µ V N µv RMS ( µv RMS ) = 25 V (V) V (3) V IN V BIAS IN BIAS R IN BIAS EN TPS74901 GND 28. FB SS SS R 1 R 2 V 12

Ω Ω µ P D = ( V IN V ) (4) I (+125 TA) R θja = (5) P D θ 13

PB ross Section PB Top View T J R θj T 0.062in. R θs T S 4-layer. 0.062 FR4 Vias are 0.012 diameter, plated Top/Bottom layers are 2 oz. copper Inner layers are 1 oz. copper R θsa T A R θja =R +R +R θj θs θsa 2.0in 2 1.0in 2 0.5in 2 55 50 45 0 LFM θ JA ( /W) 40 35 30 250 LFM 150 LFM 25 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 2 Area (in ) 4.5 29. θ 14

PB ross Section PB Top View T J R θj T 0.062in. R θs 4-layer. 0.062 FR4 Vias are 0.012 diameter, plated Top/Bottom layers are 2 oz. copper Inner layers are 1 oz. copper T S R θsa T A R θja =R +R +R θj θs θsa 0.5in 2 1.0in 2 2.0in 2 50 45 40 0 LFM θ JA ( /W) 35 30 25 250 LFM 150 LFM 20 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 2 Area (in ) 4.0 30. θ 15

PB ross Section PB Top View T J R θj T 0.062in. R θs 4-layer. 0.062 FR4 Vias are 0.012 diameter, plated Top/Bottom layers are 2 oz. copper Inner layers are 1 oz. copper T S R θsa T A R θja =R +R +R θj θs θsa 0.5in 2 1.0in 2 2.0in 2 90 80 70 θ JA ( /W) 60 0 LFM 150 LFM 50 40 250 LFM 30 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 2 Area (in ) 4.0 31. θ 16

PB ross Section PB Top View 2.0in 2 T J R θj 1.0in 2 0.062in. T R θs 0.5in 2 T S 4-layer. 0.062 FR4 Vias are 0.012 diameter, plated Top/Bottom layers are 2 oz. copper Inner layers are 1 oz. copper R θsa T A R θja =R θj +R θs +Rθ SA 35 30 0LFM θ JA ( /W) 25 20 15 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 2 Area (in ) 4.0 32. θ 17

PB ross Section PB Top View 2.0in 2 T J R θj 1.0in 2 0.062in. T R θs 0.5in 2 T S 4-layer. 0.062 FR4 Vias are 0.012 diameter, plated Top/Bottom layers are 2 oz. copper Inner layers are 1 oz. copper R θsa T A R θja =R θj +R θs +RθSA θ JA ( /W) 55 50 45 40 35 30 25 20 15 0 LFM 10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 2 Area (in ) 4.5 33. θ 18

Orderable Device Status (1) Package Type Package Drawing Pins Package Qty TPS74901KTWR ATIVE DDPAK KTW 7 500 Green (RoHS & no Sb/Br) TPS74901KTWRG3 ATIVE DDPAK KTW 7 500 Green (RoHS & no Sb/Br) TPS74901KTWT ATIVE DDPAK KTW 7 50 Green (RoHS & no Sb/Br) TPS74901KTWTG3 ATIVE DDPAK KTW 7 50 Green (RoHS & no Sb/Br) TPS74901RGWR ATIVE QFN RGW 20 3000 Green (RoHS & no Sb/Br) TPS74901RGWRG4 ATIVE QFN RGW 20 3000 Green (RoHS & no Sb/Br) TPS74901RGWT ATIVE QFN RGW 20 250 Green (RoHS & no Sb/Br) TPS74901RGWTG4 ATIVE QFN RGW 20 250 Green (RoHS & no Sb/Br) Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) U SN U SN U SN U SN U NIPDAU U NIPDAU U NIPDAU U NIPDAU Level-2-260-1 YEAR Level-2-260-1 YEAR Level-2-260-1 YEAR Level-2-260-1 YEAR Level-2-260-1 YEAR Level-2-260-1 YEAR Level-2-260-1 YEAR Level-2-260-1 YEAR 19

TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant TPS74901KTWR KTW 7 SITE 41 330 24 10.6 15.6 4.9 16 24 Q2 TPS74901KTWT KTW 7 SITE 41 330 24 10.6 15.6 4.9 16 24 Q2 TPS74901RGWR RGW 20 SITE 41 330 12 5.3 5.3 1.5 8 12 Q2 TPS74901RGWT RGW 20 SITE 41 180 12 5.3 5.3 1.5 8 12 Q2 20

Device Package Pins Site Length (mm) Width (mm) Height (mm) TPS74901KTWR KTW 7 SITE 41 346.0 346.0 41.0 TPS74901KTWT KTW 7 SITE 41 346.0 346.0 41.0 TPS74901RGWR RGW 20 SITE 41 346.0 346.0 29.0 TPS74901RGWT RGW 20 SITE 41 190.0 212.7 31.75 21

22

23

24

0.0625 (1,587) 0.0585 (1,485) H 0.410 (10,41) 0.385 (9,78) 0.303 (7,70) 0.297 (7,54) A 0.055 (1,40) 0.045 (1,14) 0.006 B 0.064 (1,63) 0.056 (1,42) 0.304 (7,72) 0.296 (7,52) 0.300 (7,62) 0.252 (6,40) 0.370 (9,40) 0.187 (4,75) H 0.330 (8,38) 0.605 (15,37) 0.595 (15,11) A 0.179 (4,55) 0.012 (0,305) 0.000 (0,00) 0.019 (0,48) 0.104 (2,64) 0.096 (2,44) H 0.017 (0,43) F 0.050 (1,27) 0.034 (0,86) 0.022 (0,57) 0.026 (0,66) 0.014 (0,36) 0 ~3 0.010 (0,25) M B A M M 0.183 (4,65) 0.170 (4,32) 4201284/A 08/01 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice.. Lead width and height dimensions apply to the plated lead. D. Leads are not allowed above the Datum B. E. Stand off height is measured from lead tip with reference to Datum B. F. Lead width dimension does not include dambar protrusion. Allowable dambar protrusion shall not cause the lead width to exceed the maximum dimension by more than 0.003. G. ross hatch indicates exposed metal surface. H. Falls within JEDE MO 169 with the exception of the dimensions indicated. (SBVS082B) 25

IMPORTANT NOTIE 2001.11