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みさえみやのじょう
4 years ago
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1 Its Concept and Architecture Hiroshi Nakashima (Kyoto U.) with cooperation of Mitsuhisa Sato (U. Tsukuba) Taisuke Boku (U. Tsukuba) Yutaka Ishikawa (U. Tokyo)

2 Contents Alliance Who & Why Allied? Specification How Opened? What Specified & Not Specified? Node Architecture & Site Configuration FAQ Past & Future

3 Alliance Who Allied? Kyoto U. Academic Center for Computing & Media Researches U. Tsukuba Center for Computational Science U. Tokyo Information Technology Center

4 Alliance Why Allied? Change procurement style from passive & vender initiative choice from product market to new scheme with active & university initiative creation from technology market aiming at high-performance solution with most advanced technologies for wide-spectrum of university users

5 Specification How Opened? Open Hardware Arch commodity device base e.g. x86, IB/Myri-10G most efficient/advanced components from current IT market no special/dedicated components for HPC Open Software Stack open source & standard OS/middleware e.g. Linux, MPI, Globus bases for also open source HPC middleware, libraries and tools Open to User s Needs in addition to FP users in computational science attract INT users who are using PC clusters for searching/mining, natural lang. processing, genomic informatics,...

6 Specification What Specified? Common Requirements Hardware shared memory node of 16+ x86 s and 32+GB ECC memory with 40+GB/sec (aggr.) bundle (even #) of inter-node links of 5+GB/sec (aggr.) on-node 250+GB RAID-1 disk (optional) and IPMI2.0 Software Red Hat or SuSE Linux Fortran, C and C++ with OpenMP and auto-parallelizer Java with JIT compiler MPI of 4+GB/sec and 8.5-μsec RT latency BLAS, LAPACK and ScaLAPACK Benchmarks (not required performance numbers) SPEC CPU2006, SPEC OMP2001, HPC Challenge (part) our own for memory, MPI and storage performance

7 Specification What Not Specified? Site Matters Hardware /socket/node performance # of nodes and total performance inter-node connection and its performance storage system capacity and its performance power consumption Software batch job scheduler, fault tolerance, system management commercial library and applications Benchmarks performance numbers of common benchmarks site-specific application benchmarks

8 Per-Node Peformance Rpeak = GFlops Memory = 32GB 40GB/sec Links = 5-8 GB/sec 4GB/sec@MPI Node Architecture High-Speed Inter-Node Link Bundle 8GB DDR2-667 High-Speed Intra-Node Interconnect 64bit x GFlops High-Speed Intra-Node Interconnect Memory I/F

9 Per-Node Peformance Rpeak = GFlops Memory = 32GB 40GB/sec Links Disclaimer: = 5-8 GB/sec 4GB/sec@MPI 64bit x GFlops Node Architecture High-Speed Inter-Node Link Bundle Pictures and Diagrams in this and following three slides are not always based on the specifications but may be example configurations. High-Speed Thus the Intra-Node Interconnect similarities 8GB of them to existing products are just DDR2-667 incident. Performance and other numbers are not always minimum requirements or those given in the specifications. High-Speed Intra-Node Interconnect Memory I/F

10 Configuration of U. Tsukuba # nodes = 512+ Rpeak = 75+ TFlops Memory = 16+ TB Full-Bisection Interconnect for 128 nodes: 1TB/sec 1/8-1/1 x Full-Bisection Interconnect 0.5-4TB/sec Storage System 400 TB, 10GB/sec

Interconnect for 128 nodes: 640GB/sec x 1 + 320GB/sec x 3

11 Configuration of U. Tokyo Storage System 1 PB, 15GB/sec Full-Bisection Interconnect for 128 nodes: 640GB/sec x GB/sec x 3 # nodes = 950+ Rpeak = 140+ TFlops Memory = 30+ TB Full-Bisection Interconnect for 512 nodes: 2.5TB/sec

12 Configuration of Kyoto U. Fat-node Subsystem # nodes= 6 Cores = Rpeak = 7.7 TFlops Memory= 6 TB # nodes = 400+ Rpeak = 60+ TFlops Memory = 13 TB Full-Bisection Interconnect 3.2TB/sec Storage System 800 TB, 16GB/sec

13 FAQ Q1: Unified procurement? A1: No, independent three procurements and thus the winners may be different. Q2: Yet another Tsubame or TACC s Ranger? A2: Absolutely NOT. At least, our node has a large inter-node bandwidth, 6-8 x Tsubame and 3-4 x Ranger. Q3: Prototype of 10PFlops riken.jp? A3: Maybe not, but hope some continuity. Q4: Alliance untied when systems installed? A4: No, we ll continue R&D collaboration.

14 Past How Going On? May 06: first meeting Sep. 06: public announcement Oct. 06: RFP released & procurement start Mar. 07: draft specification released Oct. 07: final specification released & bidding start Near Future Nov. 07: bidding close Dec. 07: contract award notice Jun. 08: Open Supercomputers begin operations Far Future Open Supercomputers will retire in 2012(Kyoto), 2013(Tsukuba) and 2014(Tokyo). but our R&D collaboration will continue further.

GPU n Graphics Processing Unit CG CAD

GPU 2016/06/27 第 20 回 GPU コンピューティング講習会 ( 東京工業大学 ) 1 GPU n Graphics Processing Unit CG CAD www.nvidia.co.jp www.autodesk.co.jp www.pixar.com GPU n GPU ü n NVIDIA CUDA ü NVIDIA GPU ü OS Linux, Windows, Mac