Second-semi.PDF
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1 PC HPC
2 Agenda PC
3
4 Linux OS UNIX OS Linux Linux OS
5 HPC 1 1CPU CPU
6 Beowulf PC (PC) PC CPU(Pentium ) Beowulf: NASA Tomas Sterling Donald Becker 2 (PC ) Beowulf
7 PC!!
8 Linux Cluster (1) Level 1: OS Level 2:
9 Linux Cluster (2) Level 3: ( )
10 ( ) SofTek PC Cluster (24 node) Spec CPU: Pentiumlll 500MHz * 24 RAM:12GB Network: Fast Ethernet(100BaseTX) Peak Performance: 13.6GFlops OS: LASER5 Linux6.0 (kernel 2.2.5) Compiler: PGI CDK Programming Model: C/C++, F77,f90,HPF Parallel Programming: MPI, PVM, HPF
11
12 Beowulf type 1. 2.
13 bottleneck Processor Memory Processor Onchip Cache 16K-32KB Cache 128K 4MB Memory
14 Pentium II 300MHz
15 Pentium II 300MHz
16
17 1CPU 1CPU/SMP Linpack LAPACK ScaLAPACK ATLAS ASCI-Red Opt. BLAS PBLAS Parallel BLAS BLAS BLAS Basic Linear Algebra Subprogram Basic Linear Algebra Communication Subprogram BLACS PVM/MPI..
18 BLAS Level Level 1 BLAS Vector-Vector Operations + S V V * V Level 2 BLAS Matrix-Vector Operations V M * V Level 3 BLAS Matrix-Matrix Operations + M M M * M
19 BLAS Level 1 BLAS y = y + s * x Operation Level 2 BLAS y = y + A* x Operation Level 3 BLAS C = C + A*B Operation
20 BLAS MFLOPS Level 3 BLAS Level 2 BLAS Level 1 BLAS Order of Vector/Matrix
21 LU Linpack &LAPACK) ATLAS BLAS LAPACK (BLAS 3) ASCI-Red BLAS Normal BLAS PGI compiler Linpack (BLAS1)
22 Linpack LAPACK : Level 1 BLAS : Coding Style : Cache : Level 3 BLAS : Block algorithm Cache BLAS Cache ATLAS (Automatically Tuned Linear Algebra Software) ASCI-Red BLAS
23
24 TCP/IP (1) Socket I/F TCP/IP window ack check sum CPU TCP/IP mbuf TCP CPU
25 TCP/IP (2) MTU(Ethernet:1500byte) large packet OS interrupt
26 IP USER Space Kernel Space NIC TCP/UDP TCP/IP
27 (NIC) API M-VIA (Linux VI Architecture GAMMA (Linux Active Message M-VIA, GAMMA MPI
28 M-VIA (A High Performance Modular VIA for Linux) [3] VI Architecture API NIC DEC Tulip (DC21*4*, ) chip, Intel i8255x (for x=7, 8 or 9) chip, Packet Engines GNIC-I, GNIC-II Gigabit Ethernet M-VIA
29 MVICH [4] VI Architecture MPICH MPI (0.0.3 bsend, pack/unpack M-VIA
30 Pentium III 500MHz 2, Memory 384MB, Intel EtherExpress Pro/100 NIC, 100Base Switching Hub, Linux byte MPICH MVICH 1.9
31 MPICH socket(tcp) MVICH(M-VIA) M-VIA 4Kbyte MPICH MVICH 34% 139%(32byte)
32 GAMMA (Genoa Active Message Machine) [5] communication handlers Active Messages [7] API NIC DEC Tulip (DC21*4*, ) chipsets, Intel i8255x (for x=7, 8 or 9) chipsets
33 MPI/GAMMA [6] GAMMA MPI MPICH Fast Ethernet MPI
34 Pentium III 500MHz 2, Memory 384MB, DEC DC21143 NIC, 100Base Switching Hub, Linux byte MPICH MPI/GAMMA 3.1
35 MPICH socket(tcp) MPI/GAMMA GAMMA 8Kbyte MPICH MPI/GAMMA 49% 404% (32byte)
36 IP
37 MPICH socket(tcp) MVICH(M-VIA) M-VIA MPI/GAMMA GAMMA IP
38 ( ) Fast Ethernet API MPI GAMMA MPI/GAMMA Fast Ethernet Gigabit Fast Ethernet
39 ScaLAPACK ScaLAPACK(ScalLable Linear Algebra PACKage) LAPACK PGI CDK ScaLAPCK LU xdlutime [8] Pentium III ATLAS BLAS ASCI-Red BLAS ScaLAPACK MPI MPICH p4 MPI/GAMMA BLAS MPI
40 Pentium III 500MHz 4, Memory 256MB, DEC DC21143 NIC, 100Base Switching Hub, Linux CPU N N cpu1 cpu cpu3 cpu4
41 ScaLAPACK Matrix size 2000 ASCI-red, MPI/GAMMA
42 ScaLAPACK ASCI-MPICH ASCI-MPI/GAMMA 4% 79% (size 100)
43 1 VAMPIR VAMPIRtrace MPICH MPI/GAMMA
44 2 MPICH(p4)
45 3 MPI/GAMMA
46 4 850Mflop/s
47
48 [1] [2] [3] [4] [5] [6] [7] [8]
Microsoft PowerPoint - sales2.ppt
最適化とは何? CPU アーキテクチャに沿った形で最適な性能を抽出できるようにする技法 ( 性能向上技法 ) コンパイラによるプログラム最適化 コンパイラメーカの技量 経験量に依存 最適化ツールによるプログラム最適化 KAP (Kuck & Associates, Inc. ) 人によるプログラム最適化 アーキテクチャのボトルネックを知ること 3 使用コンパイラによる性能の違い MFLOPS 90
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