1. Introduction SOI(Silicon-On-Insulator) Monolithic Pixel Detector ~µm) 2

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Transcription:

Introduction TEG 2005.10.4 @KEK 1

1. Introduction SOI(Silicon-On-Insulator) Monolithic Pixel Detector ~µm) 2005.10.4 @KEK 2

SOI 2005.10.4 @KEK 3

SOI : Smart Cut (UNIBOND) by SOITEC Low-R Hi-R 2005.10.4 @KEK 4

3µm Process! 2005.10.4 @KEK 5

2. SOI SOI 0.15µm 7 ~ --> BOX (Burried Oxide) n+, p+ Implant, TCAD --> 10 TEG Submit SOI SiO2 BOX wafer) p+ n+ 250~350um Al pixel pixel 2005.10.4 @KEK 6

TCAD Simulation --> Tsuboyama, (Hazumi) Talk n+ guard ring p+ stop Simulation Model n+ pixel p substrate 2005.10.4 @KEK 7

3. n+, p+ implant --> SOI Tr Source/Drain --> 650um 250~350um --> Implant AL Thermal Donor TD generation p or n --> p-wafer, n-wafer p-stop, Guard Ring Back Gate SOI Tr --> I/O Guard Ring SiO 2 ~10MV/cm 500V Metal 1 5MV/cm --> Metal 1 Floating? 2005.10.4 @KEK 8

SOI Pixel Process step flow After Gate stack formation (with extension and sidewall formations) SOI Box Handling wafer 650um Box Window photo lithography and etching Handling wafer S/D Implantation followed by S/D annealing and Salicidation Handling wafer p+ n+ 1 st ILD filling and CMP planarization (after Salicide formation) Handling wafer p+ n+ 2005.10.4 @KEK 9

Contact etching Handling wafer p+ n+ Contact plug filling and 1 st Metal formation Handling wafer p+ n+ 650um 3 ~ 5Metal formation followed by Backside polishing and Al coating Handling wafer p+ n+ 250~350um Al pixel pixel 2005.10.4 @KEK 10

Thermal Donor Generation in high resistivity wafer 2005.10.4 @KEK 11

TD generation on High Resistivity Wafer J. Harkonen et. al., Proton irradiation results of p+/n-/n+ Cz-Si detectors processed on p-type boron-doped substrates with thermal donor-induced space charge sign inversion, NIM in Press. n-type p-type 2005.10.4 @KEK 12

Space Charge Sign Inversion (SCSI) n-type Si p-type Si Depletion Voltage SCSI Depletion Voltage TD Generated 2005.10.4 @KEK 13

Effect of Back Gate Voltage BOX 100 Tr Substrate 2005.10.4 @KEK 14

2005.10.4 @KEK 15

Detector Edge Side View 2005.10.4 @KEK 16

TEG Design status Nick Name Service deadline Contents Principal Designer VDECTEG1 VDEC 10/7 Preamp, TOT, Comparator, Active Feedback, etc. Ikeda Completed! --> Ikeda Talk RadTEG1p shuttle 10/14 Pixel TEG, Tr TEG, Ring Oscillator etc. Arai RadTEG1n Several cells (Tr TEG, Ring Osc.) are completed. PixTEG1p shuttle 10/14 32x32 Pixel Array Arai PixTEG1n Several cells (Adr decoder, Buffer...) are completed. StripTEG1p StripTEG1n shuttle 10/14 Short Strip Sensor Prototype (TCAD Verification --> Hazumi, Tsuboyama Talk Hazumi Tsuboyam HawaiTEG1p HawaiTEG1n shuttle 10/14 Imaging Hard X-ray Compton Polarimeter SOI Sensor --> Gary, Elena Varner 2005.10.4 @KEK 17

VDECTEG1 2005.10.4 @KEK 18

Pixel TEG 2005.10.4 @KEK 19

IHXCP(Imaging Hard X-Ray Compton Polarimeter) U of Hawaii SLAC Pixel Size 200 x 200 µm Pixel Array (Detector) Size 2.1 x 2.1 cm Noise <=10 e- Global Trigger Rate 500 Hz Single Pixel Rate 10? mili-hz Trigger Threshold 0.5 kev Trigger Latency 1-2 µs Power 200 µw/pixel Total Array Power 2 W ADC precision 12 bits 2005.10.4 @KEK 20

IHXCP TEG 4x4 array IHXCP pixels Digitizing Trigger/ Encoding 2005.10.4 @KEK 21

SOI Pixel 2.5mm TEG 1 TEG 4 x 2 Thermal Donor Back Gate TEG ( 2005.10.4 @KEK 22