Precision CMOS Dual Operational Amplifier Literature Number: JAJS760
CMOS & CMOS LMC6062 CMOS 19911126 33020 23900 11800 ds011297 Converted to nat2000 DTD Edited for 2001 Databook SGMLFIX:PR1.doc Fixed (mm) SGMLFIX:PR4.doc Fixed (mm) SGMLFIX:PR8.doc Fixed (mm) SGMLFIX:PR16.doc Fixed (mm) 2000 8 ( Typ ) 150 V 4.5V 15V 10fA 20mV (100k ) V 130dB D/A CMOS 8-Pin DIP/SO Input Bias Current vs Temperature Top View 20000801 National Semiconductor Corporation 1 Printed in Japan NSJ 1/2001
(Note 1) (V ) 0.3V (V ) 0.3V (V V ) 16V V (Note 11) V (Note 2) ( 10 ) 260 65 150 150 ESD (Note 4) 2kV 10mA 30mA 40mA (Note 3) (Note 1) AI I 40 T J 85 4.5V V 15.5V ( JA )(Note 12) N 8 DIP 115 /W M 8 193 /W (Note 10) DC T J 25 V 5V V 0V V CM 1.5V V O 2.5V R L 1M Symbol Parameter Conditions Typ (Note 5) AI Limit (Note 6) I Limit (Note 6) V OS Input Offset Voltage 150 350 800 V 800 1300 Max TCV OS Input Offset Voltage 1.0 V/ Average Drift I B Input Bias Current 0.010 pa 4 4 Max I OS Input Offset Current 0.005 pa 2 2 Max R IN Input Resistance 10 Tera CMRR Common Mode 0V V CM 12.0V 85 75 66 db Rejection Ratio V 15V 72 63 Min PSRR Positive Power Supply 5V V 15V 85 75 66 db Rejection Ratio V O 2.5V 72 63 Min PSRR Negative Power Supply 0V V 10V 94 84 74 db Rejection Ratio 81 71 Min V CM Input Common-Mode V 5V and 15V 0.4 0.1 0.1 V Voltage Range for CMRR 60 db 0 0 Max V 1.9 V 2.3 V 2.3 V V 2.5 V 2.5 Min A V Large Signal R L 2 k Sourcing 1400 400 300 V/mV Voltage Gain (Note 7) 300 200 Min Sinking 350 180 90 V/mV 100 60 Min R L 600 Sourcing 1200 400 200 V/mV (Note 7) 150 80 Min Sinking 150 100 70 V/mV 50 35 Min Units http://www.national.com 2
DC ( ) T J 25 V 5V V 0V V CM 1.5V V O 2.5V R L 1M Symbol Parameter Conditions Typ (Note 5) AI Limit (Note 6) I Limit (Note 6) V O Output Swing V 5V 4.87 4.80 4.75 V R L 2 k to 2.5V 4.73 4.67 Min 0.10 0.13 0.20 V 0.17 0.24 Max V 5V 4.61 4.50 4.40 V R L 600 to 2.5V 4.31 4.21 Min 0.30 0.40 0.50 V 0.50 0.63 Max V 15V 14.63 14.50 14.37 V R L 2 k to 7.5V 14.34 14.25 Min 0.26 0.35 0.44 V 0.45 0.56 Max V 15V 13.90 13.35 12.92 V R L 600 to 7.5V 12.86 12.44 Min 0.79 1.16 1.33 V 1.32 1.58 Max I O Output Current Sourcing, V O 0V 22 16 13 ma V 5V 10 8 Min Sinking, V O 5V 21 16 13 ma 13 10 Min I O Output Current Sourcing, V O 0V 30 28 23 ma V 15V 22 18 Min Sinking, V O 13V 34 28 23 ma (Note 11) 22 18 Min I S Supply Current Both Amplifiers 0.9 1.5 1.5 ma V 5V, V O 1.5V 1.8 1.8 Max Both Amplifiers 1.1 1.7 1.7 ma V 15V, V O 7.5V 2 2 Max Units 3 http://www.national.com
AC T J 25 V 5V V 0V V CM 1.5V V O 2.5V R L 1M Symbol Parameter Conditions Typ (Note 5) AI Limit (Note 6) I Limit (Note 6) SR Slew Rate (Note 8) 1.5 0.8 0.8 V/ s 0.6 0.6 Min GBW Gain-Bandwidth Product 1.3 MHz m Phase Margin 50 Deg Amp-to-Amp Isolation (Note 9) 140 db e n Input-Referred F 1 khz 22 Voltage Noise nv/ i n T.H.D. Input-Referred Current Noise Total Harmonic Distortion F 1 khz 0.0002 Units pa/ F 10 khz, A V 10 R L 2 k, V O 8 V PP 0.01 5V Supply Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9: Note 10: Note 11: Note 12: IC IC 150 30mA PD T J(max) JA T A ( ) P D P D (T J(max) T A )/ JA 1.5k 100pF Typ V 15V V CM 7.5V R L 7.5V 7.5V V O 11.5V 2.5V V O 7.5V V 15V 10V V 15V R L 100 7.5V 1kHz V O 12V PP JA P D (T J T A )/ JA 13V V http://www.national.com 4
V S 7.5V T A 25 Distribution of Distribution of Input Offset Voltage Input Offset Voltage (T A 25 ) (T A 55 ) Distribution of Input Offset Voltage (T A 125 ) Input Bias Current Supply Current Input Voltage vs Temperature vs Supply Voltage vs Output Voltage Common Mode Power Supply Rejection Input Voltage Noise Rejection Ratio Ratio vs Frequency vs Frequency vs Frequency 5 http://www.national.com
V S 7.5V T A 25 ( ) Output Characteristics Output Characteristics Gain and Phase Response Sourcing Current Sinking Current vs Temperature ( 55 125 ) Gain and Phase Gain and Phase Open Loop Response vs Capacitive Load Response vs Capacitive Load Frequency Response with R L 600 with R L 500 k Inverting Small Signal Inverting Large Signal Non-Inverting Small Pulse Response Pulse Response Signal Pulse Response http://www.national.com 6
V S 7.5V T A 25 ( ) Non-Inverting Large Signal Pulse Response Crosstalk Rejection vs Frequency Stability vs Capacitive Load, R L 600 Stability vs Capacitive Load R L 1 M ( ) C f (Figure 1 ) R 1 C IN R 2 C f C IN C f LMC660 LMC662 7 http://www.national.com
( ) FIGURE 2b. Compensating for Large Capacitive Loads with a Pull Up Resistor FIGURE 1. Cancelling the Effect of Input Capacitance ( ) Figure 2a 1000pA ( 10fA ) Figure 3 PC ( 2 ) 10 12 5V 5pA 100 5mV 10 11 0.05pA (1/2) Figure 4a 4b 4c FIGURE 2a. Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads Figure 2a R1 C1 V 500 A ( ) FIGURE 3. Example of Guard Ring in P.C. Board Layout http://www.national.com 8
( ) CMOS SCR SCR SCR LMC6062 100mA SCR (a) Inverting Amplifier (b) Non-Inverting Amplifier ( ) FIGURE 5. Air Wiring (c) Follower FIGURE 4. Typical Connections of Guard Rings Figure 5 (V 5.0V DC ) ph Figure 6 10 14 A V 1000 0.01 1k CMRR 100fA 2.5 V/ R 2 CMRR R 7 CMRR CMRR 9 http://www.national.com
(V 5.0V DC ) ( ) If R 1 R 5, R 3 R 6, and R 4 R 7 ; then A V ª 100 for circuit shown (R 2 9.822k). (V + 5.0V DC ) FIGURE 6. Instrumentation Amplifier FIGURE 7. Low-Leakage Sample and Hold FIGURE 8. 1 Hz Square Wave Oscillator http://www.national.com 10
Package Temperature Range Industrial 40 85 NSC Drawing Transport Media 8-Pin Molded DIP AIN IN N08E Rail 8-Pin Small Outline AIM, AIMX IM IMX M08A Rail Tape and Reel 11 http://www.national.com
inches (millimeters) 8-Pin Small Outline Package Order Number AIM, AIMX, IM or IMX NS Package Number M08A 8-Pin Molded Dual-In-Line Package Order Number AIN or IN NS Package Number N08E http://www.national.com 12
CMOS 1. (a) (b) 2. 135-0042 2-17-16 TEL.(03)5639-7300 / http://www.national.com/jpn/ 0120-666-116
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