DAS27 27/9/ NOR PMOS 6 NMOS 3 Threshold Voltage Conversion Method of Frequency Fluctuations Using Current Starved Ring Oscillators Ryo Kishida Jun Furuta Kazutoshi Kobayashi Abstract: It has been difficult to predict lifetime of integrated circuits with the miniaturization of electronic devices. In this paper, Threshold voltage (V th ) conversion method of frequency fluctuations are proposed using current starved ring oscillators (ROs). Measured transistors are inserted between supply voltage line (VDD) and virtual VDD in the ROs. ROs are not composed by inverters but NORs to suppress aging degradation in ROs and only effects of measured transistors are observed. Measured frequencies are converted to V th and extrapolated. Estimations of V th degradations are different between exponential and logarithm functions. Exponential estimation is six and three times larger than logarithm in PMOS and NMOS respectively in ten years.. CPU [] µm Department of Electronics, Kyoto Institute of Technology 27 nm [2] 3 6 Bias Temperature Instability (BTI) [3] BTI [4] 5 5 V/cm 3 6 6 V/cm BTI 27 Information Processing Society of Japan 98
DAS27 27/9/ BTI BTI [5] CMOS NMOS PMOS [6] NMOS PMOS NOR BTI 2 BTI 3 BTI 4 BTI 5 6 2. Bias Temperature Instability (BTI) BTI BTI 2 NBTI (Negative BTI) PBTI (Positive BTI) 2. BTI BTI [3] MOSFET BTI BTI BTI Atomistic Trap-based BTI (ATB) [7], [8] ATB Oxide Trap 9 9 s S G Gate Oxide Vg Oxide Trap Defect Carrieres Interface Trap Atomistic Trap-based BTI (ATB) 9 s BTI [9] Interface Trap 2 [] t t n log(t) n.4 2 2.2 BTI BTI NBTI (Negative BTI) PBTI (Positive BTI) 2 NBTI PMOS (V gs < V) PBTI (Positive BTI) NMOS V gs > V 65 nm PBTI 65 nm SiON NMOS 45 nm high-k PBTI [] high-k Hf ( ) SiON 5 high-k Si D 27 Information Processing Society of Japan 99
DAS27 27/9/ Virtual VDD VDD RO VDD NOR type Ring Oscillator (RO) RO GND PMOS switch (PMOS-SW) GND (a) to 6-bit embedded counter ENB 3 to embedded 6-bit counter NOR ENB NOR ENB 2 Virtual GND VDD RO VDD NOR type Ring Oscillator (RO) RO GND NMOS switch (NMOS-SW) GND (b) to 6-bit embedded counter (a) PMOS (VDD) (RO VDD) PMOS (b) NMOS (GND) (RO GND) NMOS 4 ENB RO VDD PMOS ENB Vgs = Vth Vth Vgs = Vth Vth PMOS RO NMOS RO NMOS ENB RO GND NOR PMOS RO (V gs ) (V th ) NBTI PMOS SiON high-k SiON high-k NMOS PBTI 65 nm SOI (silicon-on-insulator) high-k PBTI high-k PBTI 3. BTI 3. 2 RO 2(a) PMOS (VDD) RO (RO VDD) PMOS PMOS PMOS-SW RO VDD RO RO 2(b) NMOS RO NMOS (GND) RO (RO GND) NMOS NMOS RO GND 3.2 NOR NOR 3 NOR RO NOR RO 2 NOR type Ring Oscillator NOR 2 (ENB) NOR NOR RO BTI 4 NOR BTI ENB NOR RO PMOS RO NMOS RO PMOS RO (V gs ) (V th ) NBTI NMOS RO V gs V PBTI ENB PMOS RO NMOS RO PMOS RO NMOS RO ENB NOR RO BTI 27 Information Processing Society of Japan 2
DAS27 27/9/ V RO_OUT Initial frequency Frequency after BTI stress Time Oscillation 2 µs BTI stress > s Oscillation 2 µs BTI stress > s Oscillation 2 µs 5 7 5 65 nm SOI (siliconon-insulator) 7 4. BTI 3 4. 6 ENB 2 µs ENB RO BTI 5 BTI 2 µs BTI 3 BTI BTI 2. V 2 C 4.2 BTI 7 NBTI PMOS (D rate ) () D rate = F F (t) F () F F (t) t BTI 7 D rate NBTI 6 Freq. Degradation Rate [a.u.] 7 BTI BTI.9.8.7.6.5.4.3.2. PMOS-NBTI 2 4 6 8 PMOS NBTI 5. BTI 5. (V th ) PMOS-SW, NMOS-SW 8 V th V th PMOS NMOS V th PMOS (2) NMOS (3) 27 Information Processing Society of Japan 2
DAS27 27/9/ Frequency ratio [%] 4 3 2 - -2-3 NMOS PMOS -4 - -5 5 Threshold voltage shift [%].9.8.7.6.5.4.3.2. 2 4 6 8 8 9 PMOS 7 V th 2 F P =.384V th (2) F N =.34V th (3) F P F N PMOS NMOS 7 D rate (2) (3) 5.2 V th (2) (3) 2 f(t) = mt n + l (4) g(t) = a log(t + ) + b (5) t f(t) g(t) a, b, l, m, n 9 7 (3 8 s) V th V th 6 NMOS 2 NMOS PMOS 3.8.6.4.2 2 4 6 8 PMOS 6.9.8.7.6.5.4.3.2. 2 4 6 8 NMOS 27 Information Processing Society of Japan 22
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