19-182; Rev 2; 12/99 ± ± µ PART TEMP. RANGE PIN-PACKAGE INL () MAX541ACPA MAX541BCPA MAX541CCPA C to +7 C C to +7 C C to +7 C 8 Plastic DIP 8 Plastic DIP 8 Plastic DIP ±1 ±2 ±4 MAX541AA C to +7 C 8 SO ±1 MAX541BA C to +7 C 8 SO ±2 MAX541CA C to +7 C 8 SO ±4 Ordering Information continued at end of data sheet. TOP VIEW AGND REF 1 2 3 4 MAX541 8 7 6 5 DGND RFB AGNDF AGNDS REFS REFF 1 2 3 4 5 6 7 14 13 INV 12 DGND 11 LDAC 1 9 N.C. 8 REFF REFS LDAC R INV CONTROL LOGIC R FB 16-BIT DAC 16-BIT DATA LATCH SERIAL INPUT REGISTER RFB INV AGNDF AGNDS DIP/SO DIP/SO DGND Functional Diagrams continued at end of data sheet. Maxim Integrated Products 1
ABSOLUTE MAXIMUM RATINGS to DGND...-.3V to +6V,,, LDAC to DGND...-.3V to +6V REF, REFF, REFS to AGND...-.3V to ( +.3V) AGND, AGNDF, AGNDS to DGND...-.3V to +.3V, INV to AGND, DGND...-.3V to RFB to AGND, DGND...-6V to +6V Maximum Current into Any Pin...5mA Continuous Power Dissipation (T A = +7 C) 8-Pin Plastic DIP (derate 9.9mW/ C above +7 C)...727mW 8-Pin SO (derate 5.88mW/ C above +7 C)...471mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of the specificatio is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. ELECTRICAL CHARACTERISTI ( = +5V ±5%, V REF = +2.5V, AGND = DGND =, T A = T MIN to T MAX, unless otherwise noted.) 14-Pin Plastic DIP (derate 1.mW/ C above +7 C)...8mW 14-Pin SO (derate 8.33mW/ C above +7 C)...667mW 14-Pin Ceramic SB (derate 1.mW/ C above +7 C..8mW Operating Temperature Ranges MAX541 _C_ A/_C_D.... C to +7 C MAX541 _E_ A/_E_D...-4 C to +85 C CMJD...-55 C to +125 C Storage Temperature Range...-65 C to +15 C Lead Temperature (soldering, 1s)...+3 C PARAMETER SYMBOL CONDITIONS MIN TYP MAX STATIC PERFORMANCE ANALOG SECTION (R L = ) Resolution N 16 MAX54_A ±.5 ±1. Integral Nonlinearity INL = 5V MAX54_B ±.5 ±2. MAX54_C ±.5 ±4. Differential Nonlinearity DNL Guaranteed monotonic ±.5 ±1. Zero-Code Offset Error ZSE T A = +25 C ±1 T A = T MIN to T MAX ±2 Zero-Code Tempco ZS TC T A = T MIN to T MAX ±.5 Gain Error (Note 1) T A = +25 C ±5 T A = T MIN to T MAX ±1 Gain-Error Tempco ±.1 DAC Output Resistance R (Note 2) 6.25 Bipolar Resistor Matching R FB /R INV 1. Ratio error ±.15 Bipolar Zero Offset Error T A = +25 C ±1 T A = T MIN to T MAX ±2 Bipolar Zero Tempco BZS TC ±.5 Power-Supply Rejection PSR 4.75V 5.25V ±1. REFERENCE INPUT Reference Input Range V REF (Note 3) 2. 3. Reference Input Resistance Unipolar mode 11.5 R (Note 4) REF, bipolar mode 9. UNITS Bits ppm/ C ppm/ C kω ppm/ C DYNAMIC PERFORMANCE ANALOG SECTION (R L =, unipolar mode) Voltage-Output Slew Rate SR C L = 1pF (Note 5) 25 V/µs Output Settling Time to ± 1 /2 of FS, C L = 1pF 1 µs % V kω 2
ELECTRICAL CHARACTERISTI (continued) ( = +5V ±5%, V REF = +2.5V, AGND = DGND =, T A = T MIN to T MAX, unless otherwise noted.) PARAMETER DAC Glitch Impulse SYMBOL CONDITIONS Major-carry traition Digital Feedthrough Code = hex; = ; LDAC = ;, = to levels DYNAMIC PERFORMANCE REFERENCE SECTION Reference -3dB Bandwidth BW Code = FFFF hex Reference Feedthrough Code = hex, V REF = 1Vp-p at 1kHz Signal-to-Noise Ratio SNR Reference Input Capacitance C IN Code = hex Code = FFFF hex STATIC PERFORMANCE DIGITAL INPUTS Input High Voltage V IH Input Low Voltage V IL Input Current I IN V IN = Input Capacitance C IN (Note 6) Hysteresis Voltage V H POWER SUPPLY Positive Supply Range Positive Supply Current I DD Power Dissipation PD MIN TYP MAX 1 2.4 1 1 1 92 75 12.4.8 ±1 1 4.75 5.25.3 1.1 1.5 UNITS nvs nvs MHz mvp-p db pf V V µa pf V V ma mw TIMING CHARACTERISTI ( = +5V ±5%, V REF = +2.5V, AGND = DGND =, CMOS inputs, T A = T MIN to T MAX, unless otherwise noted.) PARAMETER Frequency Pulse Width High Pulse Width Low Low to High Setup High to High Setup High to Low Hold High to High Hold to High Setup to High Hold LDAC Pulse Width High to LDAC Low Setup High to Low (power-up delay) SYMBOL f CLK t CH t CL t S t S1 t H t H1 t DS t DH t LDAC t LDA (Note 6) (Note 6) CONDITIONS MIN TYP MAX 1 45 45 45 45 3 45 4 5 5 2 UNITS MHz µs Note 1: Gain Error tested at V REF = 2.V, 2.5V, and 3.V. Note 2: R tolerance is typically ±2%. Note 3: Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance. Note 4: Reference input resistance is code dependent, minimum at 8555 hex. Note 5: Slew-rate value is measured from % to 63%. Note 6: Guaranteed by design. Not production tested. 3
( = 5V, V REF = 2.5V, T A = +25 C, unless otherwise noted.) SUPPLY CURRENT (ma).5.45.4.35.3.25 SUPPLY CURRENT vs. TEMPERATURE.2-4 -2 2 4 6 8 1 TEMPERATURE ( C) -1 SUPPLY CURRENT (ma).35.34.33.32.31.3.29 SUPPLY CURRENT vs. REFERENCE VOLTAGE.28 1 2 3 4 5 6 REFERENCE VOLTAGE (V) -2 ZERO-CODE OFFSET ERROR () 1..8.6.4.2 -.2 -.4 -.6 ZERO-CODE OFFSET ERROR vs. TEMPERATURE -.8-1. -6-2 2 6 1 14 TEMPERATURE ( C) -3 1..8 INTEGRAL NONLINEARITY vs. TEMPERATURE -4 1..8 DIFFERENTIAL NONLINEARITY vs. TEMPERATURE -5 1..8 GAIN ERROR vs. TEMPERATURE -6.6.6.6 INL ().4.2 -.2 -.4 -.6 -INL +INL DNL ().4.2 -.2 -.4 -.6 -DNL +DNL GAIN ERROR ().4.2 -.2 -.4 -.6 -.8 -.8 -.8-1. -6-2 2 6 1 14-1. -6-2 2 6 1 14-1. -6-2 2 6 1 14 TEMPERATURE ( C) TEMPERATURE ( C) TEMPERATURE ( C) INL () 1..75.5.25 -.25 -.5 -.75 INTEGRAL NONLINEARITY vs. CODE -7 DNL () 1..75.5.25 -.25 -.5 -.75 DIFFERENTIAL NONLINEARITY vs. CODE -8 REFERENCE CURRENT (µa) 2 16 12 8 4 REFERENCE CURRENT vs. CODE -9-1. 1k 2k 3k 4k 5k 6k 7k DAC CODE -1. 1k 2k 3k 4k 5k 6k 7k DAC CODE 1k 2k 3k 4k 5k 6k 7k 4
( = 5V, V REF = 2.5V, T A = +25 C, unless otherwise noted.) FULL-SCALE STEP RESPONSE (f = 1MHz) 2µs/div 1µs/div C L = 1pF R L = -1 5mV/div FULL-SCALE STEP RESPONSE (f = 2MHz) 2µs/div 4/div C L = 1pF R L = -1A 5mV/div MAJOR-CARRY PUT GLITCH DIGITAL FEEDTHROUGH -11-12 (5V/div) 5V/div (AC-COUPLED, 1mV/div) (AC-COUPLED, 5mV/div) 2µs/div CODE = hex 2µs/div MAX541 1 2 3 4 5 6 7 8 AGND REF DGND 5
1 RFB 2 3 AGNDF 4 AGNDS 5 REFS 6 REFF 7 8 9 N.C. 1 11 LDAC LDAC 12 DGND 13 14 INV t H1 t LDA t HO t SO t CH t CL t S1 t DH t DS D15 D14 D LDAC* t LDAC * ONLY 6
MC68XXXX P MOSI (GND) ( ) ARE FOR ONLY +5V.1µF (LDAC) DGND +2.5V 1µF.1µF REF (REFF) (REFS) AGND_ MAX495 EXTERNAL OP AMP UNIPOLAR +5V +2.5V 1µF.1µF MC68XXXX P (GND) MOSI IC1 RFB R FB.1µF REFF REFS R INV LDAC DGND AGNDF AGNDS INV +5V BIPOLAR MAX4 EXTERNAL OP AMP -5V 7
LDAC LDAC LDAC DAC UPDATED D15 D14 D13 D12 D11 D1 D9 D8 D7 D6 D5 D4 D3 D2 D1 D MSB LDAC D15 D14 D13 D12 D11 D1 D9 D8 D7 D6 D5 D4 D3 D2 D1 D MSB LDAC DAC UPDATED 8
µ µ µ ± µ µ 9
1 1 6.25k Ω 819MΩ 2 216 = µ µ ( ) + ( ) 2 2 83 159 18 = µ µ LDAC DAC LATCH CONTENTS MSB ANALOG PUT, V 1111 1111 1111 1111 V REF (65,535 / 65,536) 1 V REF (32,768 / 65,536) = 1/ 2 V REF 1 V REF (1 / 65,536) V DAC LATCH CONTENTS MSB ANALOG PUT, V 1111 1111 1111 1111 +V REF (32,767 / 32,768) 1 1 +V REF (1 / 32,768) 1 V 111 1111 1111 1111 -V REF (1 / 32,768) -V REF (32,768 / 32,768) = -V REF 1
PART TEMP. RANGE PIN-PACKAGE INL () MAX541AEPA -4 C to +85 C 8 Plastic DIP ±1 MAX541BEPA -4 C to +85 C 8 Plastic DIP ±2 MAX541CEPA -4 C to +85 C 8 Plastic DIP ±4 MAX541AESA -4 C to +85 C 8 SO ±1 MAX541BESA -4 C to +85 C 8 SO ±2 MAX541CESA -4 C to +85 C 8 SO ±4 ACPD C to +7 C 14 Plastic DIP ±1 BCPD C to +7 C 14 Plastic DIP ±2 CCPD C to +7 C 14 Plastic DIP ±4 AD C to +7 C 14 SO ±1 BD C to +7 C 14 SO ±2 CD C to +7 C 14 SO ±4 BC/D C to +7 C Dice* ±2 AEPD -4 C to +85 C 14 Plastic DIP ±1 BEPD -4 C to +85 C 14 Plastic DIP ±2 CEPD -4 C to +85 C 14 Plastic DIP ±4 AESD -4 C to +85 C 14 SO ±1 BESD -4 C to +85 C 14 SO ±2 CESD -4 C to +85 C 14 SO ±4 CMJD -55 C to +125 C 14 Ceramic SB** ±4 REF MAX541 CONTROL LOGIC 16-BIT DAC 16-BIT DATA LATCH SERIAL INPUT REGISTER DGND TRANSISTOR COUNT: 229 SUBSTRATE CONNECTED TO DGND AGND *Dice are tested at T A = +25 C, DC parameters only. **Contact factory for availability. 11
PDIPN.EPS SOICN.EPS 12 Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA 9486 (48) 737-76 1999 Maxim Integrated Products is a registered trademark of Maxim Integrated Products.