QII53012-7.2.0 15. FPGA FPGA Quartus II Joint Test Action Group JTAG FPGA FPGA FPGA Quartus II In-System Memory Content Editor FPGA 15 2 15 3 15 3 15 4 In-System Memory Content Editor Quartus II In-System Memory Content Editor SignalTap II SignalTap II Quartus II Volume 3SignalTap II In-System Content Editor RAM Altera Corporation 15 1
Quartus II Volume 3 RAM Quartus II 15 1 MegaWizard Plug-In Manager In-System Memory Content Editor 15 1. MegaWizard Plug-In Manager LPM_CONSTANT RAM: 1-PORT, ROM: 1-PORT ALTSYNCRAM, LPM_RAM_DQ, LPM_ROM 15 2 Stratix Arria GX Cyclone APEX II APEX 20K Mercury 15 2. Arria GX / Stratix M512 LPM_CONSTANT / M4K / LPM_ROM / LPM_RAM_DQ N/A / ALTSYNCRAM (ROM) / ALTSYNCRAM RAM N/A / MegaRAM / Cyclone APEX II APEX 20K / N/A / / / N/A / / / / / / / Mercury / / N/A (1) / N/A N/A N/A N/A N/A N/A 15 2 : (1) RAM LPM_RAM_DQ LPM_ROM 15 2 Altera Corporation
1. 2. 3. 4. 5. In-System Memory Content Editor Quartus II RAM RAM LUT 15 1 1. Tools MegaWizard Plug-In Manager 2. Create a new custom megafunction variation Edit an existing custom megafunction variation 3. Allow In-System Memory Content Editor to capture and update content independently of the system clock Instance ID ID 4 4. Finish 5. Processing Start Compilation Altera Corporation 15 3
Quartus II Volume 3 VHDL Verilog HDL lpm_hint VHDL lpm_hint => "ENABLE_RUNTIME_MOD = YES, INSTANCE_NAME = < >"; Verilog HDL defparam < >.lpm_hint = "ENABLE_RUNTIME_MOD = YES, INSTANCE_NAME = < >"; In-System Memory Content Editor In-System Memory Content Editor Instance Manager JTAG Chain Configuration Hex Editor 15 1 15 1. In-System Memory Content Editor Instance Manager FPGA JTAG FPGA 15 4 Altera Corporation
In-System Memory Content Editor In-System Memory Content Editor In-System Memory Content Editor JTAG JTAG In-System Memory Content Editor 1 JTAG Quartus II In-System Memory Content Editor Instance Manager JTAG Instance Manager Instance Manager 15 2 Instance Manager 15 2. Instance Manager Read Data from In-System Memory Continuously Read Data from In-System Memory Stop In-System Memory Analysis Write Data to In-System Instance Manager Read data from In-System Memory Hex Editor Altera Corporation 15 5
Quartus II Volume 3 Continuously Read Data from In-System Memory Hex Editor Stop In-System Memory Analysis Write Data to In-System Memory Hex Editor Instance Manager Instance Manager Hex Editor Processing Instance Manager Not running Offloading data Updating Data Quartus II In-System Memory Content Editor Setting ID 15 3 15 3. In-System Memory Content Editor Setting 15 6 Altera Corporation
In-System Memory Content Editor Hex Editor Hex Editor Hex Editor FPGA Edit Value Fill with 0's Fill with 1's Fill with Random Values Custom Fills Edit Import Data from File 16.hex.mif Edit Export Data to File Hex Editor.hex.mif Verilog Value Change Dump.vcd RAM.mif Hex Editor Hex Editor 16 ASCII 8 16 16 Hex Editor 15 4 Altera Corporation 15 7
Quartus II Volume 3 15 4. Hex Editor 16 ASCII. Hex Editor Hex Editor Hex Editor In-System Memory Content Editor 15 5 15 5. In-System Memory Content Editor 1 8 15 8 Altera Corporation
In-System Memory Content Editor 15 6 0 0000 0 0007 15 6. Hex Editor 0 0007 15 7 0 0000 0 0003 15 7. Hex Editor 0 0003 In-System Memory Content Editor Tcl Tcl Quartus II Command-Line Tcl API Help Help quartus_sh --qhelp r Quartus II Scripting Reference Manual PDF Tcl Quartus II Volume 2 Tcl Quartus II Volume 2 Command-Line Scripting In-System Memory Content Editor Altera Corporation 15 9
Quartus II Volume 3 : read_content_from_memory [-content_in_hex] -instance_index < > -start_address < > -word_count < > : write_content_to_memory : save_content_from_memory_to_file : update_content_to_memory_from_file Tcl API Help Quartus II Scripting Reference Manual In-System Memory Content Editor In-System Memory Content Editor 1. Tools In-System Memory Content Editor 2. In-System Memory Content Editor JTAG Chain Configuration SRAM.sof 3. Scan Chain 4. Device 5. Program Device 15 10 Altera Corporation
: SignalTap II Embedded Logic Analyzer In-System Memory Content Editor SignalTap II In-System Memory Content Editor SignalTap II JTAG FPGA FIR 1. FIR SignalTap II 2. SignalTap II FIR 3. In-System Memory Content Editor FIR 1 4. In-System Memory Content Editor In-System Memory Content Editor SignalTap II In-System Memory Content Editor FIR SignalTap II FPGA Altera Corporation 15 11
Quartus II Volume 3 Quartus II Volume 2Command-Line Scripting Quartus II Volume 3Design Debugging Using the SignalTap II Embedded Logic Analyzer Quartus II Scripting Reference Manual Quartus II Volume 2Tcl Scripting 15 3 15 3. v7.2.0 15 12 2007 5 v7.1.0 2007 3 v7.0.0 2006 11 v6.1.0 2006 5 v6.0.0 2005 10 v5.1.0 15 9 15 12 15 2 Cyclone III 15 2 Quartus II 6.0.0 Quartus II 5.1 5.0 12 13 Quartus II 7.1 Stratix III 2005 5 v5.0.0 4.2 Vol 3 V 12 2004 12 v1.2 11 12 lpm_hint Verilog Making Changes Hex Editor Editing Data Displayed in the Hex EditorImporting and Exporting Memory FilesEdit value SignalTap II In-System Memory Content Editor 2004 8 v1.1 2004 6 v1.0 15 12 Altera Corporation