MachXO DS1002 Version 02.5, Feb. 2007 MachXO
( ) SRAM SRAM MPU JTAG TransFR TM (TFR) 256 2280 LUT4 FF 73 271 I/O /RoHS MachXO EBR 27.6Kbits sysmem TM RAM(EBR) 7.5Kbit FIFO sysio LVCMOS 3.3/2.5/1.8/1.5/1.2 LVTTL PCI LVDS, Bus-LVDS, LVPECL, RSDS sysclock TM PLL 1 2 PLL IEEE 1149.1 1.2V 3.3V/2.5V/1.8V IEEE1532 1-1 MachXO LCMXO256 LCMXO640 LCMXO1200 LCMXO2280 LUT 256 640 1200 2280 RAM (Kbits) 2.0 6.0 6.25 7.5 EBR SRAM (Kbits) 0 0 9.2 27.6 EBR SRAM (9k bit) 0 0 1 3 V CC (V) 1.2/1.8/2.5/3.3 1.2/1.8/2.5/3.3 1.2/1.8/2.5/3.3 1.2/1.8/2.5/3.3 PLL 0 0 1 2 I/O 78 159 211 271 100-pin TQFP (14 x 14 mm) 78 74 73 73 144-pin TQFP (20 x 20 mm) 113 113 113 100-ball csbga (8 x 8 mm) 78 74 132-ball csbga (8 x 8 mm) 101 101 101 256-ball ftbga (17 x 17 mm) 159 211 211 324-ball ftbga (19 x 19 mm) 271 MachXO 1-
MachXO CPLD FPGA CPLD FPGA FPGA (LUT) (EBR) CPLD CPLD isplever MachXO MachXO isplever isplever MachXO 1-2
MachXO I/O (PIO) sysclock PLL sysmem TM RAM(EBR) 2-1 2-2 2-3 EBR PIO PIO sysio 2 (PFU) RAM/ROM PFU (PFF) PFU RAM ROM PFF ROM PFU PFF 2 1 MachXO I/O sysmem EBR RAM ROM FIFO FIFO LUT FIFO 2-1 MachXO1200 ( ) MachXO 2-1
2-2 MachXO640 ( ) 2-3 MachXO256 ( ) MachXO 2 (PLL) sysclock PLL JTAG MachXO 3.3V 2.5V 1.8V 1.2V MachXO 2-2
PFU MachXO PFU PFF PFU RAM ROM PFF ROM PFU PFF PFU PFU 2-4 0 3 4 PFU 53 25 2-4 PFU 2 (FF Latch ) 2 LUT4 LUT LUT5 LUT6 LUT7 LUT8 / ( ) RAM/ROM 2-5 / / 14 13 1 ( PFU ) 7 6 ( PFU ) 1 2-1 MachXO 2-3
2-5 2-1 A0, B0, C0, D0 LUT4 A1, B1, C1, D1 LUT4 M0, M1 CE LSR / CLK PFU FCIN 1 F0, F1 LUT4 Q0, Q1 OFX0 LUT5 MUX OFX1 LUT6, LUT7, LUT8 2 MUX PFU FCO 1 1. 2-2. 2. PFU. MachXO 2-4
4 RAM ROM PFF RAM 2-2 2-2 RAM ROM PFU LUT 4x2 or LUT 5x1 2-bit SP 16x2 ROM16x1 x 2 PFF LUT 4x2 or LUT 5x1 2-bit N/A ROM16x1 x 2 : LUT 4 (LUT4) LUT4 16 4 1 2 LUT4 1 LUT5 LUT6 LUT7 LUT8 2 2 2 2 2 A B - A B - A B - A B 2 Carry Generate Carry Propagate RAM 16 2 LUT, (RAM) LUT isplever PFU 2-3 (RAM) 2-6 2 MachXO RAM TN1092 ROM : ROM RAM MachXO 2-5
2-3 RAM SPR16x2 DPR16x2 2-6 1 2 : SPR = Single Port RAM, DPR = Dual Port RAM PFU PFU 2-4 PFU 2-4 PFU RAM ROM LUT 4x8 or MUX 2x1 x 8 LUT 5x4 or MUX 4x1 x 4 LUT 6x 2 or MUX 8x1 x 2 LUT 7x1 or MUX 16x1 x 1 2-bit Add x 4 2-bit Sub x 4 SPR16x2 x 4 DPR16x2 x 2 SPR16x4 x 2 DPR16x4 x 1 ROM16x1 x 8 ROM16x2 x 4 2-bit Counter x 4 SPR16x8 x 1 ROM16x4 x 2 2-bit Comp x 4 ROM16x8 x 1 MachXO ( ) MachXO 2-6
PFU (2PFU )x1 (3PFU )x2 (7PFU )x6 isplever 2-7 MachXO256 MachXO640 2-8 MachXO1200 MachXO2280 / MachXO PFU 4 4 2-7 2-8 4 MachXO 2-7
16:1 MachXO256 MachXO640 4 12 MachXO1200 MachXO2280 4 9 6 PLL 4 2-9 16:1 4 12 2-9 MachXO sysclock (PLL) MachXO1200 MachXO2280 PLL PLL 4 CLKINTFB( ) PLL PLL_LOCK 2-10 sysclock PLL PLL PLL t LOCK CLKOS sysclock PLL PLL 4 VCO 2-11 PLL 2-5 PLL MachXO 2-8
2-10 PLL 2-11 PLL 2-5 PLL I/O CLKI I CLKFB I PLL PLL / CLKINTFB RST I 1 CLKOS O PLL CLKOP O PLL CLKOK O PLL LOCK O 1 PLL CLKI CLKINTFB O CLKTREE CLKOP DDAMODE I 1 ( ), 0 : ( ) DDAIZR I 1 : = 0, 0 : = on DDAILAG I 1 : Lag 0 : Lead DDAIDEL[2:0] I PLL TN1089 MachXO 2-9
sysmem MachXO MachXO1200 MachXO2280 sysmem RAM(EBR) EBR 9k RAM sysmem sysmem FIFO 2-6 2-6 sysmem FIFO 8,192 x 1 4,096 x 2 2,048 x 4 1,024 x 9 512 x 18 256 x 36 8,192 x 1 4,096 x 2 2,048 x 4 1,024 x 9 512 x 18 8,192 x 1 4,096 x 2 2,048 x 4 1,024 x 9 512 x 18 256 x 36 8,192 x 1 4,096 x 2 2,048 x 4 1,024 x 9 512 x 18 256 x 36 RAM Word0 LSB MSB Word1 LSB MSB RAM ROM RAM RAM sysmem ROM EBR sysmem RAM / / /FIFO 2-14 4 / sysmem RAM MachXO 2-10
2-12 sysmem EBR EBR 3 1. 2. 3. 9/18/36 FIFO FIFO Data-in CEW WE CLKW Data RCE RE CLKR FIFO Almost Full Full Almost Empty Empty Flag Full Almost Full CLKW Empty Almost Empty CLKR 2-7 MachXO 2-11
2-7 FIFO Full (FF) 1 2 N -1 Almost Full (AF) 1 Full-1 Almost Empty (AE) 1 Full-1 Empty (EF) 0 FIFO RSTA RSTB 2 RSTA / FIFO FIFO RSTB FIFO FIFO EBR A B RSTA RSTB Port A Port B Global Reset(GSRN) 2-13 2-13 EBR 2-21 Low EBR GSR 1 MachXO 2-12
2-14 EBR GSR GSR / 1/f MAX (EBR ) EBR GSR I/O GSR EBR RAM ROM FIFO EBR FIFO GSR WE RE 2-14 RPReset RE RE RST WE RE RST RPReset EBR EBR EBR GSR MachXO 2-13
PIO MachXO PIO 2 PIO 6PIO 4PIO PIO sysio PIO 2 T C 2 PIO MachXO1200 MachXO2280 IO PIO PIO LVDS PIO PCI 2-14 4 I/O 2-15 6 I/O MachXO 2-14
PIO PIO sysio PFU PFU PFU sysio I/O 2-16 MachXO PIO (TSALL) sysio PIO sysio 2-16 MachXO PIO sysio I/O sysio 8 sysio LVCMOS LVTTL BLVDS LVDS LVPECL sysio MachXO (LVTTL LVCMOS PCI) V CCIO V CCIO MachXO V CC V CCAUX MachXO256 MachXO640 MachXO1200 MachXO2280 2 sysio 1. sysio MachXO 2-15
sysio 2 2 ( ) I/O PCI PCI V CC V CCAUX V CCIO 2 True" Comp" True Comp( ) 2. sysio sysio 2 2 ( ) 2 True" Comp" True I/O ( ) Comp( ) I/O ( ) I/O POR V CC V CCAUX POR FPGA I/O V CCIO V CC V CCAUX FPGA V CCIO I/O I/O FPGA I/O V CCIO V CC V CCAUX MachXO sysio LVCMOS LVTTL LVTTL LVCMOS1.2/1.5/1.8/2.5/3.3V LVCMOS LVTTL ( ) BLVDS LVPECL MachXO1200 MachXO2280 I/O 50% LVDS MachXO1200 MachXO2280 LVDS BLVDS LVPECL MachXO1200 MachXO2280 PCI 2-8 MachXO I/O 2-9 2-10 MachXO I/O sysio TN1091 MachXO 2-16
2-8 I/O MachXO256 MachXO640 MachXO1200 MachXO2280 I/O 2 4 8 8 ( I/O ) ( I/O ) ( I/O ) ( I/O ) ( I/O ) ( I/O ) ( I/O ) LVDS ( 50%) ( I/O ) ( I/O ) ( I/O ) LVDS ( 50%) I/O I/O I/O I/O PCI 2-9 V CCIO (Typ.) 3.3V 2.5V 1.8V 1.5V 1.2V LVTTL LVCMOS33 LVCMOS25 LVCMOS18 LVCMOS15 LVCMOS12 PCI 1 BLVDS 2, LVDS 2, LVPECL 2, RSDS 2 1. MachXO1200 MachXO2280 2. MachXO1200 MachXO2280 2-10 V CCIO ( ) LVTTL 4mA, 8mA, 12mA, 16mA 3.3 LVCMOS33 4mA, 8mA, 12mA, 14mA 3.3 LVCMOS25 4mA, 8mA, 12mA, 14mA 2.5 LVCMOS18 4mA, 8mA, 12mA, 14mA 1.8 LVCMOS15 4mA, 8mA 1.5 LVCMOS12 2mA, 6mA 1.2 LVCMOS33, 4mA, 8mA, 12mA 14mA LVCMOS25, 4mA, 8mA, 12mA 14mA MachXO 2-17
LVCMOS18, 4mA, 8mA, 12mA 14mA LVCMOS15, 4mA, 8mA LVCMOS12, 2mA, 6mA PCI33 3 N/A 3.3 LVDS 1, 2 N/A 2.5 BLVDS, RSDS 2 N/A 2.5 LVPECL 2 N/A 3.3 1, MachXO1200 MachXO2280 LVDS 2, 3, MachXO1200 MachXO2280 sysio 2 MachXO1200 MachXO2280 8 (1 2 ) MachXO640 4 (1 1 ) (MachXO256) 2 sysio I/O I/O (V CCIO ) 2-17 2-18 2-19 2-20 sysio 2-17 MachXO2280 MachXO 2-18
2-18 MachXO1200 2-19 MachXO640 MachXO 2-19
2-20 MachXO256 ( ) MachXO I/O MachXO MachXO C (Vcc=1.8/2.5/3.3V) SLEEPN FPGA EBR I/O 2-9 2-11 SLEEPN High - Low Icc Typical <10mA 0 Typical <100uA I/O < 10uA < 1mA < 10uA Vcc/Vccio/Vccaux 0 I/O JTAG EBR MachXO 2-20
SLEEPN SLEEPN V CC LVCMOS 10uA V CC SLEEPN Low ns AC DC MachXO CMOS 18MHz 26MHz MachXO IEEE 1149.1 MachXO IEEE1149.1 (TAP) TDI TDO TCK TMS I/O V CCIO MachXO256: V CCIO1 ; MachXO640: V CCIO2 ; MachXO1200 MachXO2280: V CCIO5 LVCMOS3.3/2.5/1.8/1.5/1.2 MachXO MachXO 2 IEEE1149.1 IEEE1532 I/O BSCAN IEEE1149.1 SRAM 3 IEEE1149.1 IEEE1149.1 IEEE1532 2-21 MachXO SRAM IEEE1532 IEEE1149.1 TAP MachXO 2-21
(Leave Alone) I/O IEEE1532 SRAM I/O Low High TransFR TM (Transparent Field Reconfiguration) TransFR(TFR) ispvm TN1087 (Minimizing System Interruption During Configuration Using TransFR) MachXO SRAM (TN1086) 2-21 MachXO MachXO MachXO 2-22
1 2 3 DC V CC... -0.5 1.32V -0.5 3.75V V CCAUX.... -0.5 3.75V -0.5 3.75V V CCIO.-0.5 3.75V -0.5 3.75V I/O 4-0.5 3.75V -0.5 3.75V 4...-0.5 3.75V -0.5 4.25V ( ).....-65 150-65 150 (Tj) +125 +125 1 Min. Max. 1.2V 1.14 1.26 V V CC 1.8V/2.5V/3/3V 1.71 3.465 V V CCAUX 3 V CCIO 2 (Auxiliary) 3.135 3.465 V I/O 1.14 3.465 V t JCOM 0 85 t JIND -40 100 t JFLASHCOM 0 85 t JFLASHIND -40 100 1 V CCIO V CC 2.5V 3.3V V CCIO V CCAUX LCMXO E 1.2V V CCIO V CC 2 I/O 3 V CCAUX 2.5V V CC MachXO256, MachXO640 ( ) 1 2 3 Min. Typ. Max I DK I/O 0 V IN V IH (MAX) +/-1000 ua 1 V CC V CCAUX V CCIO 2 0 V CC V CC (MAX) 0 V CCIO V CCIO (MAX) 0 V CCAUX V CCAUX (MAX) 3 I DK I PU I PW I BH MachXO 3-1
MachXO1200, MachXO2280 ( ) 1 2 3 4 Min. Typ. Max LVDS sysio I DK I/O 0 V IN V IH (MAX) +/-1000 ua LVDS sysio V IN V CCIO +/-1000 ua I DK I/O V IN V CCIO 35 ma 1 V CC V CCAUX V CCIO 2 0 V CC V CC (MAX) 0 V CCIO V CCIO (MAX) 0 V CCAUX V CCAUX (MAX) 3 I DK I PU I PW I BH 4 LVCMOS LVTTL DC Min. Typ. Max. I IL, I IH 1 4 5 I/O 0 V IN (V CCIO 0.2V) 10 ua (V CCIO - 0.2V) V IN 3.6V 40 ua I PU I/O 0 V IN 0.7 V CCIO -30-150 ua I PD I/O V IL (MAX) V IN V IH (MAX) 30 150 ua I BHLS Low V IN = V IL (MAX) 30 ua I BHHS High V IN = 0.7V CCIO -30 ua I BHLO I BHLH V BHT 3 Low High 0 V IN V IH (MAX) 150 ua 0 V IN V IH (MAX) -150 ua 0 V IN V IH (MAX) V IL (MAX) V IH (MIN) V C1 I/O 2 V CCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V, V CC = TYP., V IO = 0 to V IH (MAX) C2 2 V CCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V, V CC = TYP., V IO = 0 to V IH (MAX) 8 pf 8 pf 1. I/O I/O 2. TA 25 f = 1.0MHz 3. sysio DC VIL VIH 4. SLEEPN 5. VIH VCCIO Hi Lo 30ns 6mA MachXO1200 MachXO2280 LVDS VIH VCCIO MachXO 3-2
( ) 1 2 Typ. 3 MAX I CC I CCAUXyy (Auxiliary) LCMXO256C 12 25 ua LCMXO640C 12 25 ua LCMXO1200C 12 25 ua LCMXO2280C 12 25 ua LCMXO256C 1 15 ua LCMXO640C 1 25 ua LCMXO1200C 1 45 ua LCMXO2280C 1 85 ua I CCIO 4 LCMXO C 2 30 ua 1 LVCMOS V CCIO GND 2 0MHz. 3 T A =25 4 ( ) 1 2 3 4 Typ. 5 I CC I CCAUX (Auxiliary) V CCAUX = 3.3V LCMXO256C 7 ma LCMXO640C 9 ma LCMXO1200C 14 ma LCMXO2280C 20 ma LCMXO256E 4 ma LCMXO640E 6 ma LCMXO1200E 10 ma LCMXO2280E 12 ma LCMXO256E/C 5 ma LCMXO640E/C 7 ma LCMXO1200E/C 12 ma LCMXO2280E/C 13 ma I CCIO 6 2 ma 1 2 LVCMOS V CCIO GND 3 0MHz. 4 5 T A =25 6 V CCIO =2.5V, MachXO 3-3
1 2 3 4 Typ. 5 I CC I CCAUX (Auxiliary) V CCAUX = 3.3V LCMXO256C 13 ma LCMXO640C 17 ma LCMXO1200C 21 ma LCMXO2280C 23 ma LCMXO256E 10 ma LCMXO640E 14 ma LCMXO1200E 18 ma LCMXO2280E 20 ma LCMXO256E/C 10 ma LCMXO640E/C 13 ma LCMXO1200E/C 24 ma LCMXO2280E/C 25 ma I CCio 6 2 ma 1 2 I/O V CCIO GND 3 0MHz. 4 5 T A =25 6 V CCIO =2.5V, MachXO 3-4
1 2 3 4 Typ. 5 I CC I CCAUX (Auxiliary) V CCAUX = 3.3V LCMXO256C 9 ma LCMXO640C 11 ma LCMXO1200C 16 ma LCMXO2280C 22 ma LCMXO256E 6 ma LCMXO640E 8 ma LCMXO1200E 12 ma LCMXO2280E 14 ma LCMXO256E/C 8 ma LCMXO640E/C 10 ma LCMXO1200E/C 15 ma LCMXO2280E/C 16 ma I CCJ V CCJ 6 2 ma 1 2 V CCIO GND 3 4 JTAG 25MHz 5 T A =25 6 V CCIO =2.5V, MachXO 3-5
sysio V CCIO Min. Typ. Max. LVCMOS 3.3 3.135 3.3 3.465 LVCMOS 2.5 2.375 2.5 2.625 LVCMOS 1.8 1.71 1.8 1.89 LVCMOS 1.5 1.425 1.5 1.575 LVCMOS 1.2 1.14 1.2 1.26 LVTTL 3.135 3.3 3.465 PCI 3 3.135 3.3 3.465 LVDS 1 2 2.375 2.5 2.625 LVPECL 1 3.135 3.3 3.465 RSDS 1, BLVDS 1 2.375 2.5 2.625 1. 2. MachXO 1200 MachXO 2280 LVDS 3. MachXO 1200 MachXO 2280 MachXO 3-6
sysio DC V IL V IH Min. (V) Max. (V) Min. (V) Max. (V) LVCMOS 3.3-0.3 0.8 2.0 3.6 LVTTL -0.3 0.8 2.0 3.6 LVCMOS 2.5-0.3 0.7 1.7 3.6 LVCMOS 1.8-0.3 0.35V CCIO 0.65V CCIO 3.6 LVCMOS 1.5-0.3 0.35V CCIO 0.65V CCIO 3.6 LVCMOS 1.2-0.3 0.35V CCIO 0.65V CCIO 3.6 V OL Max. (V) V OH Min. (V) I OL 1 (ma) I OH 1 (ma) 0.4 V CCIO - 0.4 16, 12, 8, 4-14, -12, -8, -4 0.2 V CCIO - 0.2 0.1-0.1 0.4 2.4 16-16 0.4 V CCIO - 0.4 12, 8, 4-12, -8, -4 0.2 V CCIO - 0.2 0.1-0.1 0.4 V CCIO - 0.4 16, 12, 8, 4-14, -12, -8, -4 0.2 V CCIO - 0.2 0.1-0.1 0.4 V CCIO - 0.4 16, 12, 8, 4-14, -12, -8, -4 0.2 V CCIO - 0.2 0.1-0.1 0.4 V CCIO - 0.4 8, 4-8, -4 0.2 V CCIO - 0.2 0.1-0.1 0.4 V CCIO - 0.4 6, 2-6, -2 0.2 V CCIO - 0.2 0.1-0.1 PCI -0.3 0.3V CCIO 0.5V CCIO 3.6 0.1V CCIO 0.9V CCIO 1.5-0.5 1. I/O GND I/O GND I/O DC n*8ma n GND GND I/O The average DC current drawn by I/Os between GND connections, or between the last GND in an I/O bank and the end of an I/O bank, as shown in the logic signal connections table shall not exceed n * 8mA. Where n is the number of I/Os between bank GND connections or between the last GND in a bank and the end of a bank. MachXO 3-7
sysio LVDS Min. Typ. Max. V INP, V INM 0 2.4 V V THD +/-100 mv V CM 100mV V THD V THD /2 1.2 1.8 V 200mV V THD V THD /2 1.2 1.9 V 350mV V THD V THD /2 1.2 2.0 V I IN +/-10 ua V OH V OP V OM High R T = 100 1.38 1.60 V V OL V OP V OM Low R T = 100 0.9V 1.03 V V OD (V OP - V OM ), R T = 100 250 350 450 mv V OD High Low V OD 50 mv V OS (V OP - V OM )/2, R T = 100 1.125 1.25 1.375 V V OS H L V OS 50 mv I OSD V OD = 0V 6 ma MachXO 3-8
LVDS MachXO LVDS LVDS LVDS25E LVCMOS 3-1 1% LVDS 3-1 LVDS LVDS25E 3-1 LVDS25E Z OUT 20 Rs 294 Rp 121 R T 100 V OH High 1.43 V V OL Low 1.07 V V OD 0.35 V V CM 1.25 V Z BACK 100 I DC 3.66 ma MachXO 3-9
BLVDS MachXO BLVDS LVCMOS LVDS BLVDS 3-2 1 3-2 BLVDS 3-2 BLVDS 1 Typical Zo = 45 Zo = 90 Z OUT 100 100 R TLEFT 45 90 R TRIGHT 45 90 V OH High 1.375 1.48 V V OL Low 1.125 1.02 V V OD 0.25 0.46 V V CM 1.25 1.25 V I DC DC 11.2 10.2 ma 1. LVDS MachXO 3-10
LVPECL MachXO LVPECL LVCMOS LVDS 3-3 1 3-3 LVPECL 3-3 LVPECL 1 Typical Z OUT 100 R P 150 R T 100 V OH High 2.03 V V OL Low 1.27 V V OD 0.76 V V CM 1.65 V Z BACK 85.7 I DC DC 12.7 ma 1. LVDS MachXO 3-11
RSDS LatticeECP/EC RSDS LVCMOS LVDS 3-4 RSDS 1 RSDS LVDS25E 3-4 1% 3-4 RSDS (Reduced Swing Differential Standard) 3-4 RSDS DC Typical Z OUT 20 R S 294 R P 121 R T 100 V OH High 1.35 V OL Low 1.15 V OD 0.20 V CM 1.25 Z BACK 101.5 I DC DC 3.66 MachXO 3-12
1 (LVCMOS25 12mA ) -5 16 6.7 ns 4:1 MUX 4.5 ns 16:1 MUX 5.1 ns -5 16:1 MUX 487 MHz 16 292 MHz 16 388 MHz 64 200 MHz 1200 2280 256 36 RAM 284 MHz 512 18 RAM 284 MHz 16 2 RAM 434 MHz 64 2 RAM 320 MHz 128 4 RAM 261 MHz 32 2 RAM 314 MHz 64 4 RAM 271 MHz isplever Rev.A 0.19 isplever isplever MachXO 3-13
MachXO 1 I/O (PLL ) 1 t PD t CO t SU t H f MAX_IO t SKEW_PRI PFU I/O PFU -5-4 -3 Min. Max. Min. Max. Min. Max. LCMXO256 3.5 4.2 4.9 ns LCMXO640 3.5 4.2 4.0 ns LCMXO1200 3.6 4.4 5.1 ns LCMXO2280 3.6 4.4 5.1 ns LCMXO256 4.0 4.8 5.6 ns LCMXO640 4.0 4.8 5.7 ns LCMXO1200 4.3 5.2 6.1 ns LCMXO2280 4.3 5.2 6.1 ns LCMXO256 1.3 1.6 1.8 ns LCMXO640 1.1 1.3 1.5 ns LCMXO1200 1.1 1.3 1.6 ns LCMXO2280 1.1 1.3 1.5 ns LCMXO256-0.3-0.3-0.3 ns LCMXO640-0.1-0.1-0.1 ns LCMXO1200 0.0 0.0 0.0 ns LCMXO2280-0.4-0.4-0.4 ns LCMXO256 600 550 500 MHz LCMXO640 600 550 500 MHz LCMXO1200 600 550 500 MHz LCMXO2280 600 550 500 MHz LCMXO256 200 220 240 ps LCMXO640 200 220 240 ps I/O LCMXO1200 200 220 240 ps 1. LVCMOS2.5V 12mA Rev.A 0.19 LCMXO2280 200 220 240 ps MachXO 3-14
MachXO 1 PFU/PFF -5-4 -3 Min. Max. Min. Max. Min. Max. t LUT4_PFU LUT4 (A D F ) 0.28 0.34 0.39 ns t LUT6_PFU LUT6 (A D OFX ) 0.44 0.53 0.62 ns t LSR_PFU / PFU 0.90 1.08 1.26 ns t SUM_PFU Mux(M0 M1) 0.10 0.13 0.15 ns t HM_PFU Mux(M0 M1) -0.05-0.06-0.07 ns t SUD_PFU D 0.13 0.16 0.18 ns t HD_PFU D -0.03-0.03 - -0.04 ns t CK2Q_PFU Q D- 0.40 0.48 0.56 ns t LE2Q_PFU Q 0.53 0.64 0.74 ns t LD2Q_PFU D Q 0.55 0.66 0.77 ns PFU t CORAM_PFU 0.40 0.48 0.56 ns t SUDATA_PFU -0.18-0.22-0.25 ns t HDATA_PFU 0.28 0.34 0.39 ns t SUADDR_PFU -0.46-0.56-0.65 ns t HADDR_PFU 0.71 0.85 0.99 ns t SUWREN_PFU / -0.22-0.26-0.30 ns t HWREN_PFU / 0.33 0.40 0.47 ns PIO / t IN_PIO 0.75 0.90 1.06 ns t OUT_PIO 1.29 1.54 1.80 ns EBR t CO_EBR 2.24 2.69 3.14 ns t COO_EBR EBR 0.54 0.64 0.75 ns t SUDATA_EBR EBR -0.26-0.31-0.37 ns t HDATA_EBR EBR 0.41 0.49 0.57 ns t SUADDR_EBR EBR -0.26-0.31-0.37 ns t HADDR_EBR EBR 0.41 0.49 0.57 ns t SUWREN_EBR / EBR -0.17-0.20-0.23 ns t HWREN_EBR / EBR 0.26 0.31 0.36 ns t SUCE_EBR EBR 0.19 0.23 0.27 ns t HCE_EBR EBR -0.13-0.16-0.18 ns t RSTO_EBR EBR 1.03 1.23 1.44 ns PLL t RSTREC 1.00 1.00 1.00 ns t RSTSU 1.00 1.00 1.00 ns 1 Rev.A 0.19 MachXO 3-15
MachXO 1 2 3-5 -4-3 LVDS25 4 LVDS 0.44 0.53 0.61 ns BLVDS25 4 BLVDS 0.44 0.53 0.61 ns LVPECL33 4 LVPECL 0.42 0.50 0.59 ns LVTTL33 LVTTL 0.01 0.01 0.01 ns LVCMOS33 LVCMOS 3.3 0.01 0.01 0.01 ns LVCMOS25 LVCMOS 2.5 0.00 0.00 0.00 ns LVCMOS18 LVCMOS 1.8 0.07 0.08 0.10 ns LVCMOS15 LVCMOS 1.5 0.14 0.17 0.19 ns LVCMOS12 LVCMOS 1.2 0.40 0.48 0.56 ns PCI33 4 PCI 0.01 0.02 0.01 ns LVDS25E LVDS 2.5 E -0.13-0.15-0.18 ns LVDS25 4 LVDS 2.5-0.21-0.26-0.30 ns BLVDS25 BLVDS 2.5-0.03-0.03-0.04 ns LVPECL33 LVPECL 3.3 0.04 0.04 0.05 ns LVTTL33_4mA LVTTL 4mA 0.04 0.04 0.05 ns LVTTL33_8mA LVTTL 8mA 0.06 0.07 0.08 ns LVTTL33_12mA LVTTL 12mA -0.01-0.01-0.01 ns LVTTL33_16mA LVTTL 16mA 0.50 0.60 0.70 ns LVCMOS33_4mA LVCMOS 3.3 4mA 0.04 0.04 0.05 ns LVCMOS33_8mA LVCMOS 3.3 8mA 0.06 0.07 0.08 ns LVCMOS33_12mA LVCMOS 3.3 12mA -0.01-0.01-0.01 ns LVCMOS33_16mA LVCMOS 3.3 16mA 0.50 0.60 0.70 ns LVCMOS25_4mA LVCMOS 2.5 4mA 0.05 0.06 0.07 ns LVCMOS25_8mA LVCMOS 2.5 8mA 0.10 0.12 0.13 ns LVCMOS25_12mA LVCMOS 2.5 12mA 0.00 0.00 0.00 ns LVCMOS25_16mA LVCMOS 2.5 16mA 0.34 0.40 0.47 ns LVCMOS18_4mA LVCMOS 1.8 4mA 0.11 0.13 0.15 ns LVCMOS18_8mA LVCMOS 1.8 8mA 0.05 0.06 0.06 ns LVCMOS18_12mA LVCMOS 1.8 12mA -0.06-0.07-0.08 ns LVCMOS18_16mA LVCMOS 1.8 16mA 0.06 0.07 0.09 ns LVCMOS15_4mA LVCMOS 1.5 4mA 0.15 0.19 0.22 ns LVCMOS15_8mA LVCMOS 1.5 8mA 0.05 0.06 0.07 ns LVCMOS12_2mA LVCMOS 1.2 2mA 0.26 0.31 0.36 ns LVCMOS12_6mA LVCMOS 1.2 6mA 0.05 0.06 0.07 ns PCI33 4 PCI33 1.85 2.22 2.59 ns 1 2 LVCMOS 3 4 I/O LCMXO1200 LCMXO2280 Rev.A 0.19 MachXO 3-16
sysclock PLL Min. Max. f IN (CLKI CLKFB) 25 420 MHz f OUT (CLKOP CLKOS) 25 420 MHz f OUT2 K (CLKOK) 0.195 210 MHz f VCO PLL VCO 420 840 MHz f PFD 25 MHz AC t DT 3 45 55 % 4 t PH 0.05 UI t OPJIT 1 f OUT 100MHz +/- 120 ps f OUT < 100MHz 0.02 UIPP t SK = +/- 200 ps t W 90% 10% 3 1 ns 2 t LOCK PLL 150 us t PA 100 400 ps t IPJIT +/- 200 ps t FBKDLY 10 ns t HI High 90% 90% 0.5 ns t LO Low 10% 10% 0.5 ns t RST RST 10 ns 1. 10,000, 2. PLL t LOCK 3. LVDS 4. CLKOS CLKOP (Rev.A 0.19) MachXO 3-17
MachXO C Min Typ. Max t PWRDN SLEEPN Low 400 ns t PWRUP SLEEPN High LCMXO256 400 us LCMXO640 600 us LCMXO1200 800 us LCMXO2280 1000 us t WSLEEPN SLEEPN 400 ns t WAWAKE Rev.A 0.19 SLEEPN 100 ns MachXO 3-18
Min. Typ. Max. LCMXO256 0.4 ms t FEFRESH V CC V CCAUX LCMXO640 0.6 ms LCMXO1200 0.8 ms LCMXO2280 1.0 ms JTAG Min. Max. f MAX TCK 25 MHz t BTCP TCK [BSCAN] 40 ns t BTCPH TCK [BSCAN] High 20 ns t BTCPL TCK [BSCAN] Low 20 ns t BTS TCK [BSCAN] 8 ns t BTH TCK [BSCAN] 10 ns t BTRF TCK [BSCAN] / 50 mv/ns t BTCO TAP 10 ns t BTCODIS TAP 10 ns t BTCOEN TAP 10 ns t BTCRS BSCAN 8 ns t BTCRH BSCAN 25 ns t BUTCO BSCAN 25 ns t BTUODIS BSCAN 25 ns t BTUPOEN BSCAN 25 ns Rev.A 0.19 MachXO 3-19
3-14 AC 3-4 3-14 LVTTL LVCMOS 3-5 R 1 C L Ref. V T LVTTL, LVCMOS 3.3 = 1.5V LVCMOS 2.5 = V CCIO /2 LVTTL LVCMOS (L -> H, H -> L) 0pF LVCMOS 1.8 = V CCIO /2 LVCMOS 1.5 = V CCIO /2 LVCMOS 1.2 = V CCIO /2 LVTTL LVCMOS 3.3 Z -> H 1.5 LVTTL LVCMOS 3.3 Z -> L LVCMOS (Z -> H) V CCIO /2 V OL 188 0pF LVCMOS (Z -> L) V CCIO /2 V OH LVTTL + LVCMOS (H -> Z) V OH - 0.15 V OL LVTTL + LVCMOS (L -> Z) V OL - 0.15 : V OL V OH V OH MachXO 3-20
I/O [Edge] ( ) L( ) B( ) R( ) T( ) P[Edge] [Row/Column Number*]_[A/B] I/O [Row/Column Number] PIC PFU Row( ) Column( ) Edge T B Row Edge L R Column [A/B] PIC PIO I/O GSRN I I/O ( ) (Low ) I/O TSALL I Hi I/O NC (NC) GND V CC V CCAUX V CCIOx I/O x SLEEPN 1 I (Auxiliary) High Low Vcc PLL (PLL I/O ) [LOC][0]_PLL[T, C]_IN [LOC][0]_PLL[T, C]_FB PCLK[n]_[1:0] ) (PLL) : [LOC] ULM(Upper PLL) LLM)Lower PLL) T = true and C = complement (PLL) : [LOC] ULM(Upper PLL) LLM)Lower PLL) T = true and C = complement n TMS I 1149.1 TCK I 1149.1 TDI TDO *1 MachXO C E NC I O 1149.1 1149.1 MachXO 4-1
MachXO 4-2