r_init_clock_c - メモ帳

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1 * System Name : RX210 initialization example * File Name : r_init_clock.c * Version : Ver 2.00 * Device : R5F52108ADFP(RX210 Group) * Abstract : Program example of RX210 initialization * Tool-Chain : High-performance Embedded Workshop (Version ) * : C/C++ Compiler Package for RX Family (V.1.02 Release 01) * OS : not use * H/W Platform : Renesas Starter Kit for RX210 * Description : Initialize the clock. * Limitation : none * History : DD.MM.YYYY Version Description * : First Release Includes <System Includes>, "Project Includes" #include <stdint.h> #include "iodefine.h" #include "r_init_clock.h" Macro definitions #define MAIN_CLOCK_CYCLE ( L/MAIN_CLOCK_Hz) #define SUB_CLOCK_CYCLE ( L/SUB_CLOCK_Hz) /* Time for one count of CMT0 is approximately ns when the count source is LOCO divided by 32 (max. of LOCO = khz) */ #define FOR_CMT0_TIME (232727) Private variables and functions static void oscillation_subclk(void); static void no_use_subclk_as_sysclk(void); static void resetting_wtcr_subclk(void); static void enable_rtc(void); ペペペ (1)

2 static void cmt0_wait(uint32_t); * Outline : Clock initialization * Header : r_init_clock.h * Function Name: R_INIT_Clock * Description : Initialize the clock. void R_INIT_Clock(void) /* ---- Enable write protection /* PRCR - Protect Register b15 - b8:prkey - PRC Key Code - A5h (The write value should be A5h to permission writing PRCi bit) b3 PRC3 - Protect Bit 3 - LVD 関関レペレレへへ書書み禁禁 b2 PRC2 - Protect Bit 2 - クククク発発発発レペレレへへ書書書書 b1 PRC1 - Protect Bit 1 - 動動モペモ低低低低低低低クククク発発発発ソソソソソソソレペレレへへ書書み書書クククク発発発発レペレレへへ書書み書書 b0 PRC0 - Protect Bit 0 - */ SYSTEM.PRCR.WORD = 0xA507; /* ---- Set the VRCR register // SYSTEM.VRCR = 0x00; RX111 にに存存ししし /* ---- Turn off the HOCO power supply //#if (SEL_HOCO == B_NOT_USE) /* HOCOPCR - High-Speed On-Chip Oscillator Power Supply Control Register b7:b1 Reserved - The write value should be 0. b0 HOCOPCNT - High-Speed On-Chip Oscillator Power Supply Control - HOCO power supply is turned off. */ // SYSTEM.HOCOPCR.BYTE = 0x01; ----RX111にに存存ししし // /* ---- Turn off the PLL power supply //#if (SEL_PLL == B_NOT_USE) && (SEL_CHIP == VERSION_B) /* PLLPCR - PLL Power Control Register b7:b1 Reserved - The write value should be 0. b0 PLLPCNT - PLL Power Control - Powered off */ ペペペ (2)

3 // SYSTEM.PLLPCR.BYTE = 0x01; -----RX111 にに存存ししし // /* ---- Set the sub-clock #if (SEL_SUB == B_USE) (SEL_RTC == B_USE) CGC_oscillation_sub(); #else CGC_disable_subclk(); /* ---- Set the main clock #if (SEL_MAIN == B_USE) (SEL_PLL == B_USE) CGC_oscillation_main(); /* ---- Set the PLL clock #if (SEL_PLL == B_USE) CGC_oscillation_PLL(); /* ---- Set the HOCO clock #if (SEL_HOCO == B_USE) CGC_oscillation_HOCO(); #if (REG_OPCCR == OPCM_HIGH) /* ---- Set the operating power control mode /* OPCCR - Operating Power Control Register b7-b5 Reserved - 予予 b4 OPCMTSF - 動動低低動動モモソ遷遷遷遷フフフ b3 Reserved - 予予 b2:b0 OPCM - 動動低低動動モモソ選選ビクビ */ SYSTEM.OPCCR.BYTE = REG_OPCCR; while (0!= SYSTEM.OPCCR.BIT.OPCMTSF) /* OPCMTSF = 0 ( 遷遷遷遷 ) まま待つ */ /* ---- Set the internal clock division ratio /* SCKCR - シレシシククククココビクペコレペレレ b31-b28 FCK - フフクシフIF クククク (FCLK) 選選 - divide-by-4 b27-b24 ICK - シレシシクククク (ICK) 選選 - divide-by-4 ペペペ (3)

4 b23-b12 予予 - 0 b11-b8 PCLKB - 周周モペフペコククククB (PCLKB) 選選 - divide-by-4 b7-b4 予予 - 0 b3-b0 PCLKD - 周周モペフペコククククD (PCLKD) 選選 - divide-by-2 */ SYSTEM.SCKCR.LONG = REG_SCKCR; // SYSTEM.SCKCR.LONG = 0x ; while (REG_SCKCR!= SYSTEM.SCKCR.LONG) /* ---- Set the BCLK pin output /* BCKCR - External Bus Clock Control Register b7:b1 Reserved - The write value should be 0. b0 BCLKDIV - BCLK Pin Output Select - divide-by-2 */ // SYSTEM.BCKCR.BYTE = 0x01; RX111にに存存ししし // while (0x01!= SYSTEM.BCKCR.BYTE) // // /* ---- Set the internal clock source /* SCKCR3 - シレシシククククココビクペコレペレレ 3 b10-b8 CKSEL - クククククペレ選選 - PLL circuit is selected. */ SYSTEM.SCKCR3.WORD = SEL_SYSCLK; // SYSTEM.SCKCR3.WORD = 0x0200; /* メメコクククク発発発選選 */ // while (SEL_SYSCLK!= SYSTEM.SCKCR3.WORD) #if (REG_OPCCR > OPCM_MID_1A) /* ---- Set the operating power control mode /* OPCCR - 動動低低ココビクペコレペレレ b7-b5 予予 - 0 b4 OPCMTSF - 動動低低動動モモソ遷遷遷遷フフフ b3 予予 - 0 b2-b0 OPCM - - */ 動動低低動動モモソ選選ビクビ SYSTEM.OPCCR.BYTE = REG_OPCCR; while (0!= SYSTEM.OPCCR.BIT.OPCMTSF) /* 遷遷遷遷すすまま待つ */ ペペペ (4) 高高動動モペモ

5 /* ---- Disable write protection /* PRCR - プクシクビレペレレ b15-b8 PRKEY - PRC Key Code - A5h (The write value should be A5h to permission writing PRCi bit) b2 PRC2 - クククク発発発発レペレレへへ書書み禁禁 b1 PRC1 - 動動モペモ低低低低低低低クククク発発発発クフビソソソソソソソレペレレへへ書書み禁禁 b0 PRC0 - クククク発発発発レペレレへへ書書み禁禁 */ SYSTEM.PRCR.WORD = 0xA500; * Outline : Configure main clock oscillation * Header : r_init_clock.h * Function Name: CGC_oscillation_main * Description : Set the drive capability and the MOSCWTCR register, * then enable main clock oscillation. * Wait for the main clock oscillation stabilization * wait time by a software. void CGC_oscillation_main(void) /* ---- Set the main clock oscillator drive capability /* MOFCR - メメコクククク発発発強動発発ココビクペコレペレレ b7 予予 - 0 b6 MOSEL - メメコクククク発発発発発ビクビ (0: 発発発 ) b5 MODRV21 - メメコクククク発発発モフメド低低発発ビクビ ( VCC: 3.3V/1: 16MHz) b4-b0 予予 - 0 */ SYSTEM.MOFCR.BYTE = REG_MOFCR; /* ---- Set wait time until the main clock oscillator stabilizes /* MOSCWTCR - メメコクククク発発発ソウメビココビクペコレペレレ b7-b5 予予 - 0 b4-b0 MSTS - メメコクククク発発発待低発発発発 - 待低発発に 16MHZ/62.5nsec * cycles ( 約 ms). */ SYSTEM.MOSCWTCR.BYTE = REG_MOSCWTCR; ペペペ (5)

6 /* ---- Operate the main clock oscillator /* MOSCCR - メメコクククク発発発ココビクペコレペレレ b7-b1 予予 - 0 b0 MOSTP - メメコクククク発発発発禁ビクビ */ SYSTEM.MOSCCR.BYTE = 0x00; while (0x00!= SYSTEM.MOSCCR.BYTE) /* ---- Wait processing for the clock oscillation stabilization cmt0_wait((wait_time_for_main_oscillation/for_cmt0_time)+1); /* oscillation stabilize (4.096 ms). */ * Outline : Configure PLL clock oscillation * Header : r_init_clock.h * Function Name: CGC_oscillation_PLL * Description : Set the PLL input frequency division ratio and * frequency multiplication factor, set the PLLWTCR, * then enable PLL clock oscillation. * Wait for the PLL clock oscillation stabilization time. void CGC_oscillation_PLL(void) /* ---- Set the PLL division ratio and multiplication factor /* PLLCR - PPP ココビクペコレペレレ b15-b14 予予 - 0 b13-b8 STC - 周周周周周発発 b7-b2 予予 - 0 b1-b0 PLIDIV - PPP 入低入周入選選 */ SYSTEM.PLLCR.WORD = REG_PLLCR; /* ---- Set wait time until the PLL clock oscillator stabilizes /* PLLWTCR - PLL Wait Control Register b7:b5 Reserved - The write value should be 0. ペペペ (6)

7 b4:b0 PSTS - PLL Waiting Time - Wait time is cycles (approx us). */ // SYSTEM.PLLWTCR.BYTE = REG_PLLWTCR; -----PLLWTCR RX111 存存ししし /* ---- Operate the PLL clock oscillator /* PLLCR2 - PPP ココビクペコレペレレ b7-b1 予予 - 0 b0 PLLEN - PPP 発禁動動ビクビ- PPP 動動 */ SYSTEM.PLLCR2.BYTE = 0x00; /* ---- Wait processing for the clock oscillation stabilization cmt0_wait((wait_time_for_pll_oscillation/for_cmt0_time)+1); /* oscillation stabilize (1.50 ms). */ ににに * Outline : Configure the HOCO clock oscillation * Header : r_init_clock.h * Function Name: CGC_oscillation_HOCO * Description : Set the frequency and the HOCOWTCR2 register, * then enable the HOCO. * Wait for the HOCO stabilization wait time by a software. void CGC_oscillation_HOCO(void) /* ---- Set the HOCO frequency /* HOCOCR2 - High-Speed On-Chip Oscillator Control Register 2 b7:b2 Reserved - The write value should be 0. b1:b0 HCFRQ - HOCO Frequency Setting - 50 MHz */ // SYSTEM.HOCOCR2.BYTE = REG_HOCOCR2; -----RX111 にに存存ししし */ /* ---- Set wait time until the HOCO oscillator stabilizes ---- /* HOCOWTCR2 - HOCO Wait Control Register 2 b7:b4 Reserved - The write value should be 0. b3:b0 HSTS2 - HOCO Wait Time Select 2 - Wait time is 9216 cycles (approx ペペペ (7)

8 us). */ // SYSTEM.HOCOWTCR2.BYTE = REG_HOCOWTCR2; -----RX111 にに存存ししし /* ---- Operate the HOCO clock b7-b1 予予 - 0 b0 HCSTP - HOCO 動動 */ SYSTEM.HOCOCR.BYTE = 0x00; /* HOCOCR - 高高オコオクプオシレレココビクペコレペレレ /* ---- Wait processing for the clock oscillation stabilization cmt0_wait((wait_time_for_hoco_oscillation/for_cmt0_time)+1); /* oscillation stabilize (350 us). */ * Outline : Configure the Sub-clock oscillation * Header : r_init_clock.h * Function Name: CGC_oscillation_sub * Description : Configure the setting when the sub-clock is used * as the system clock or RTC count source. void CGC_oscillation_sub(void) /* ---- Setting of the sub-clock oscillation oscillation_subclk(); /* ---- When using the RTC enable_rtc(); /* ---- Resetting the wait control register resetting_wtcr_subclk(); /* ---- Setting of the sub-clock do not use the system clock no_use_subclk_as_sysclk(); ペペペ (8)

9 * Outline : Configure the Sub-clock stop * Header : r_init_clock.h * Function Name: CGC_disable_subclk * Description : Configure the setting when the sub-clock is not used * as the system clock or RTC count source. void CGC_disable_subclk(void) uint8_t i; volatile uint8_t dummy; /* ---- Stop the sub-clock oscillator /* SOSCCR - サドクククク発発発ココビクペコレペレレ b7-b1 予予 - 0 b0 SOSTP - サドクククク発発発発禁ビクビ - 発禁 */ SYSTEM.SOSCCR.BYTE = 0x01; while (0x01!= SYSTEM.SOSCCR.BYTE) /* RCR3 - RRRココビクペコレペレレ b0 RTCEN - サドクククク発発発動動ビクビ - 発禁 */ RTC.RCR3.BIT.RTCEN = 0; /* dummy read three times */ for (i = 0; i < 3; i++) dummy = RTC.RCR3.BIT.RTCEN; * Outline : Sub-clock oscillation * Header : none * Function Name: oscillation_subclk * Description : Configure the sub-clock oscillation setting. static void oscillation_subclk(void) ペペペ (9)

10 r_init_clock.c uint8_t i; volatile uint8_t dummy; #if (SEL_SUB == B_USE) && (SEL_RTC == B_USE) /* ---- Wait processing for the clock oscillation stabilization cmt0_wait((wait_time_for_sub_oscillation/for_cmt0_time)+1); /* Oscillation stabilize (4.0s). */ /* ---- Stop the Sub-clock oscillator /* SOSCCR - サドクククク発発ココビクペコレペレレ b0 SOSTP - サドクククク発発発禁ビクビ - 発禁 */ SYSTEM.SOSCCR.BYTE = 0x01; while (0x01!= SYSTEM.SOSCCR.BYTE) /* RCR3 - RRRココビクペコレペレレ3 b0 RTCEN - サドクククク発発動動ビクビ - 発禁 */ RTC.RCR3.BIT.RTCEN = 0; /* dummy read three times */ for (i = 0; i < 3; i++) dummy = RTC.RCR3.BIT.RTCEN; while (0!= RTC.RCR3.BIT.RTCEN) /* Confirm that the written */ /* ---- Wait for five sub-clock cycles cmt0_wait((sub_clock_cycle*5/for_cmt0_time)+1); time is 5 sub-clock cycles (approx. 152 us). */ /* Wait /* ---- Setting of the sub-clock drive strength /* RCR3 - RRR ココビクペコレペレレ 3 b7-b4 予予 - 0 b3-b1 RTCDV - サドクククク発発発モフメド低低動動ビクビ - 中 ( 4.4PF/ ) 高( 6.0PF) 低( 3.7PF) -低選選 b0 RTCEN - サドクククク発発発動動ビクビペペペ (10)

11 - 発禁 */ RTC.RCR3.BYTE = REG_RCR3; /* dummy read three times */ for (i = 0; i < 3; i++) dummy = RTC.RCR3.BYTE; while (REG_RCR3!= RTC.RCR3.BYTE) /* Confirm that the written */ /* ---- Set wait time until the sub-clock oscillator stabilizes /* SOSCWTCR - Sub-Clock Oscillator Wait Control Register b7:b5 Reserved - The write value should be 0. b4:b0 SSTS - Sub-Clock Oscillator Waiting Time - Waiting time is 2 s + 2 cycles. */ // SYSTEM.SOSCWTCR.BYTE = REG_SOSCWTCR; -----RX111にに存存ししし /* Wait time is 2 s + 2 sub-clock cycles (approx. 2 s). */ /* ---- Operate the Sub-clock oscillator /* SOSCCR - サドクククク発発発ココビクペコレペレレサドクククク発発発発禁ビクビ動動中 b0 SOSTP - - */ SYSTEM.SOSCCR.BYTE = 0x00; while (0x00!= SYSTEM.SOSCCR.BYTE) /* Confirm that the written */ /* ---- Wait processing for the clock oscillation stabilization cmt0_wait(wait_time_for_sub_oscillation/for_cmt0_time+1); /* oscillation stabilize (4.0s). */ * Outline : Configure when not using the sub-clock as the system clock * Header : none * Function Name: no_use_subclk_as_sysclk * Description : Set the SOSTP bit to 1 (sub-clock stops) ペペペ (11)

12 * when the sub-clock is used only as the RTC count source. static void no_use_subclk_as_sysclk(void) #if (SEL_RTC == B_USE) && (SEL_SUB!= B_USE) /* ---- Stop the Sub-clock oscillator /* SOSCCR - サドクククク発発発ココビクペコレペレレサドクククク発発発発禁ビクビ発禁 b0 SOSTP - - */ SYSTEM.SOSCCR.BYTE = 0x01; while (0x01!= SYSTEM.SOSCCR.BYTE) * Outline : Set the wait control register * (the sub-clock is used as the RTC count source.) * Header : none * Function Name: resetting_wtcr_subclk * Description : Set the wait control register when exiting * from the software standby mode. static void resetting_wtcr_subclk(void) #if (SEL_RTC == B_USE) && (SEL_SUB == B_USE) /* ---- Stop the Sub-clock oscillator /* SOSCCR - サドクククク発発発ココビクペコレペレレサドクククク発発発発禁ビクビ発禁 b0 SOSTP - - */ SYSTEM.SOSCCR.BYTE = 0x01; while (0x01!= SYSTEM.SOSCCR.BYTE) ペペペ (12)

13 r_init_clock.c /* ---- Wait for five sub-clock cycles cmt0_wait((sub_clock_cycle*5/for_cmt0_time)+1); time is five sub-clock cycles (approx. 152 us).*/ /* Wait /* ---- Set wait time until the sub-clock oscillator stabilizes /* SOSCWTCR - Sub-Clock Oscillator Wait Control Register b4:b0 SSTS - Sub-Clock Oscillator Waiting Time - Waiting time is 2 cycles. */ // SYSTEM.SOSCWTCR.BYTE = 0x00; /* RX111にに存存ししし Wait time is two sub-clock cycles (approx. 61 us).*/ /* ---- Operate the sub-clock oscillator /* SOSCCR - サドクククク発発発ココビクペコレペレレサドクククク発発発動動ビクビ動動中 b0 SOSTP - - */ SYSTEM.SOSCCR.BYTE = 0x00; /* Sub-clock oscillator is operating. */ while (0x00!= SYSTEM.SOSCCR.BYTE) /* ---- Wait processing for the clock oscillation stabilization cmt0_wait((sub_clock_cycle*2/for_cmt0_time)+1 ); /* Wait time is two sub-clock cycles (approx. 61 us).*/ * Outline : Initialization when using the RTC * Header : none * Function Name: enable_rtc * Description : Configure the initialization when using the RTC. static void enable_rtc(void) #if (SEL_RTC == B_USE) ペペペ (13)

14 uint8_t i; volatile uint8_t dummy; /* ---- Set RCR3 register /* RCR3 - RRRココビクペコレペレレ3 サドクククク発発発動動ビクビ動動中 b0 RTCEN - - */ RTC.RCR3.BIT.RTCEN = 1; /* dummy read three times */ for (i = 0; i < 3; i++) dummy = RTC.RCR3.BIT.RTCEN; while (1!= RTC.RCR3.BIT.RTCEN) /* ---- Wait for six the sub-clock cycles cmt0_wait((sub_clock_cycle*6/for_cmt0_time)+1); /* ---- Stop prescaler and counter /* RCR2 - RRRココビクペコレペレレ2 b7-b1 各低低 - そへまま 0=ププレプ-フと発時カソコレに発禁 b0 START - */ RTC.RCR2.BYTE &= 0x7E; while (0!= RTC.RCR2.BIT.START) /* ---- RTC Software Reset /* RCR2 - RRRココビクペコレペレレ2 b1 RESET - クフビソソソプソクビ - ププレプ-フと対対レペレレを初初初 */ RTC.RCR2.BIT.RESET = 1; while (0!= RTC.RCR2.BIT.RESET) ペペペ (14)

15 r_init_clock.c * Outline : Software wait with CMT0 * Header : none * Function Name: cmt0_wait * Description : This function is to wait for the oscillation stabilization wait time. * Arguments : cnt : Wait for the time specified by an arument multiplied * by FOR_CMT0_TIME (us). static void cmt0_wait(uint32_t cnt) /* ---- Exit the module stop state MSTP(CMT0) = 0; /* CMT0 and CMT1 レビクプ遷遷状状 */ /* ---- Stop CMT0 counting /* CMSTR0 - ココペソコクオレメコペレシペレレ 0 b15-b2 予予 - 0 b1 STR1 - レレペビビクビ - RCR1.RCR.R b0 STR0 - レレペビビクビ - RCR0.RCR.R 動動発禁 */ CMT.CMSTR0.BIT.STR0 = 0; /* CMT0 count is stopped. */ /* ---- Set the CMT0 count source and Enable the CMT0 compare match interrupt /* CMCR - ココペソコクオレメコペココビクペコレペレレ b15-b8 予予 - 0 b7 - 予予不発 ( 書書み発に 1 ) b6 CMIE - 割書み書書ビクビ b5-b2 予予 - 0 b1-b0 CKS - - PCLK/32 */ CMT0.CMCR.WORD = 0x00C1; クククク選選 /* ---- クプソ the CMT0 count /* CMCNT - ココペソコクオレメコペカソコレ */ CMT0.CMCNT = 0x0000; /* ---- Wait time set is other than 0? if (0!= cnt) ペペペ (15)

16 r_init_clock.c /* ---- Decrement the wait time cnt = cnt - 1; /* ---- Set the CMT0 wait time /* CMCOR - ココペソコクオレメコペココレレコビレペレレ */ CMT0.CMCOR = cnt; /* ---- Clear the CMT0 interrupt request while (1 == IR(CMT0,CMI0)) IR(CMT0,CMI0) = 0; /* CMT0.CMI0 割書み要要クプソ */ /* ---- Start CMT0 counting /* CMSTR0 - ココペソコクオレメコペレシペレレ0 b0 STR0 - RCR0.RCR.R カソコビ開開 */ CMT.CMSTR0.BIT.STR0 = 1; /* ---- CMI0 interrupt request generated? while (0 == IR(CMT0,CMI0)) /* ---- Stop CMT0 counting /* CMSTR0 - Compare Match Timer Start Register 0 b0 STR0 - Count Start 0 - CMT0.CMCNT カソコビ発禁 */ CMT.CMSTR0.BIT.STR0 = 0; /* ---- Initialize CMT0 /* CMCR - ココペソコクオレメコペココビクペコレペレレ b15-b8 予予 - 0 b7 - 予予不発但し書書み発に 1 b6 CMIE - 割書み書書ビクビ禁禁 b5:b2 予予 - 0 b1:b0 CKS - - PCLK/8 */ CMT0.CMCR.WORD = 0x0080; クククク選選 /* CMCNT - ココペソコクオレメコペカソコレクプソ */ CMT0.CMCNT = 0x0000; /* CMCOR - ココペソコクオレメコペココレレコビレペレレ 0ソクビ */ CMT0.CMCOR = 0x0000; ペペペ (16)

17 /* CMI0 割書みフフフクプソ */ IR(CMT0,CMI0) = 0; r_init_clock.c /* ---- RCR0モペフペコ発禁 MSTP(CMT0) = 1; /* End of File */ ペペペ (17)

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