アトラスバレルSCT用量産モジュールの品質保証のシステム

1 5 1 LHC 5 2 6 2 SCT 8 1 SCT 8 2 SCT 9 3 10 4 14 5 ABCD3T 17 6 21 3 SCT DAQ 22 1 SCTDAQ 22 4 25 1 25 2 27 5 37 1 37 2 40 6 55 4

1 1 LHC (LHC) ( ) (CERN) 2006 4 14 TeV LHC 1989 2000 (LEP) LHC 27 km 14 TeV 40 MHz 10 34 cm 2 s 1 ( 3 10 33 cm 2 s 1 ) 10 LHC 1.1 [1] LHC 10 t W b t Z 0 c Bd Bs µ µ 5

主リング周長陽子エネルギールミノシティー入射エネルギーバンチ衝突間隔バンチ陽子数バンチ数ルミノシティー寿命双極電磁石数 1232 台 (14.2 m 長 ) 双極電磁石磁場四極電磁石数 26.66 km 7.0 TeV 10 33 cm - 2 s - 1 ( 低ルミノシティーで 3 年 ) 10 34 cm - 2 s - 1 ( 高ルミノシティーで 7 年 ) 450 GeV 25 nsec 1 10 11 個 2835 バンチ 10 時間 1232 台 8.4 T アーク部四極磁場勾配 223 T/m 衝突点でのビーム径 16 µm ビーム衝突角度アーク部に 386 台 (3.1 m 長 ) 他に 402 台 200 µrad 1.1 LHC 2 (ATLAS) LHC 4 ( CMS LHCb ALICE) LHC 22 m 46 m 15,000 t (SCT) (TRT) 1.1 1.2 検出器テクノロジー性能ピクセル 3 層 50 µm 300 µm 内部飛跡検出器シリコンストリップ 4 層 80 µm ピッチストローチューブ 36 層 ~200 µm/ 層電磁カロリメータ液体アルゴン ( アコーディオン型 ) 10%/ E 0.7% ハドロンカロリメータタイルファイバーバレル部 50%/ E 3% 前後方部 100%/ E 10% ミュー粒子検出器ドリフトチューブ 10% pt = 1 TeV 1.2 6

1.1 7

2 SCT 1 SCT SCT (Semi-Conductor Tracker) ( ) SCT 1.4 1.4 2.5 2112 2373 ( 2.1) LHC SCT 10 2.1 10 14 /cm 2 1 MeV [2][3] SCT 2.1 SCT 8

2 SCT 4 6cm 6cm 63.96 mm 63.56 mm 285 µm SCT 8448 SCT 2 ASIC ASIC ASIC SCT ASIC 4 ASIC12 2 (40 mrad) 0 (link0) 1 (link1) ( 2.2) 2.2 SCT 9

3 ( ) 1 SCT 285 µm ( 2.3) ( ) ( ) AC ( 2.4) SCT 2 2.3 10

2.4 2 CMOS 1 µm 5 µm [1] SCT 80 µm 1 SCT x0 h x0 h/2 x0 /2 x RMS 2 σ x0 h 2 x0 h 2 = + ( x x 1/ 12 23 µm 0 ) 11 2 dx h = ( h ) 12 2

[4] 300 µm 8 nsec 25 nsec [1] SCT 50 nsec 100% LHC 100 500 V 300 µm 3 [4] V d εv N A + N D d = 2 (2.1) e N N A D e ε NA ND C C = S eε 2V N N A A N D + N D S p-n CV (IV ) 2.1 V I 12

[4] a T Eg (1.21 ev) kb (8.62 10 5 ev/k) 7 2 IV 2 3 I ( T ) = at Eg exp( ) 2k T 2.5 B 2.5 K3111 677 ( ) 13

4 ASIC ASIC 1 3 L1 L4 L2 L3 CO2 (through-hole) (via-hole) L1 L2 L1 L2 L3 L4 ( 2.6)[5] [6] [7] 2.3 2.6 2 2.7 L1 L2 L3 L4 L1 ABCD3T ( 14

) L2 ABCD3T ABCD3T L4 (Vcc, Vdd) L2 (HV) ABCD3T L3 L2 L1 ABCD3T ( ABCD3T ) ABCD3T (Vdd) (Vcc) L4 (HV) L1 L3 ABCD3T ( ) L4 ABCD3T 15

2.7 16

5 ABCD3T ABCD3T ATLAS Binary Chip DMILL ATLAS SCT ASIC CEA CERN DMILL BiCMOS 1 rad-hard 取り入れた 40 MHz 50 MHz 128 1576 12 ABCD3T 132 FIFO ( 2.8)[8] 2.8 ABCD3T 1 1 ( ) CMOS ( ) 17

50 mv/fc 0 4 fc 5 20 nsec ENC 1500 e 1 0 DAC DAC 2.5 mv 0 640 mv 0 12.8 fc 3.0 fc ( DAC ) 2 1 ( ) 0 1 1 0 0 ( ) 0 1 ( 4 2 ) 3 128 (FIFO ) 132 40 MHz 18

L1 L1 3.3 µs ) 4 L1 L1 L1 3 3 L1 3 1 128 ( ) 24 (3 8 L1) 8 L1 L1 100 khz 1 1 FIFO Barrel Store 2 Over Flow Empty L1 5 data-avail 3 data-valid end ( 2.1 ( X 1 0 ) 19

6 ID end No hit data send-id 7 ABCD Master Mode Master L1 ABCD Master L1 Master 4 8 L1 3 ( ) ( ) 9 4 4 (32 ) 100fF 20 (3σ) 0.625 mv (0.0625 fc) 0 160 mv (0 16 fc) 0.1 fc 20

(CAL0 CAL1 CAL2 CAL3) 4 1 4 8 6 0.8 nsec ± 0.2 nsec 64 ( 50 nsec) 40 MHz (25 nsec) DAC ( DAC) 4 DAC DAC ( DAC ) 2 ( 2.2) DAC DAC DAC 0 0 mv 60 mv 4 mv 1 0 mv 120 mv 8 mv 2 0 mv 180 mv 12 mv 3 0 mv 240 mv 16 mv 2.2 DAC 6 TPG1700 ( HVCPG) ( ) ( ) 0 100 Ω ( Pt100 ) 21

3 SCT DAQ SCT DAQ SCT DAQ VME VME PC PC ROOT SCTDAQ ( 3.1)[9] 3.1 SCTDAQ 1 SCTDAQ SCTDAQ SCT SCTDAQ Windows OS (DLL) ROOT ROOT C++ PAW CERN Windows PC National Instruments VME-MXI VME VME 22

1 SCT DAQ 3.2 4 VME HV MuSTARD (Multi-channel SCT ABC (D) Readout Device) SCT 12 FIFO MuSTARD LVDS (Low Voltage Differential Signaling) [10] SLOG (SLOw command Generator) SLOG ABCD SCT SLOG LVDS CLOAC 12 SCT 40MHz SLOG RAM 3 14 (14-bit Output Enable Register) [11] CLOAC (CLOck And Control) SCTLV ASIC ASIC (Vcc) (Vdd) (Icc Idd) SCTDAQ 2 HV SCTHV KEITHLEY 6517A TAKASAGO CCP500-005R KEITHLEY 196 SYSTEM DMM ABCD MuSTARD SLOG 40 MHz LVDS LVDS MuSTARD 23

3.2 ( 2 ) 2 VME C C++ ROOT stdll CINT C++ ROOT ST.cpp stdll ROOT DCS (Detector Control System) ROOT [9] 24

4 SCT 2,000 3 700 1 1 ( 4.1) [12] 4.1 25

2 IV (INITIAL) (TC) (LT) 3 TC Temperature Cycle LT Long-Term 3 350 V 24 15 Pt100 ASIC 4 30 50 3 5 ( 4.2) ASIC 4.2 5 150 V ASIC 24 ASIC 15 ASIC (Icc Idd) 1 26

2 1 [12] ( 4.3) x ( 20 mrad ) y z (x-y) (z) 5 5 3 MITSUTOYO Quick Vision Pro Quick Vision Pro (z ) x-y x-y 1 µm z 10 µm 4 ( 23 µm 23 µm/sin0.040) x 25 µm y 5 µm x y z ( ) r-φ 3 ( ) 4 8 (x,y) 6 26 x-y 4.4 (Xm,Ym) 4 C1 C4 C1 C2 C3 C4 4.1 27

4.3 ( ) 4.4 28

x mhx [µm] -6500 30 y mhy [µm] -37000 30 x msx [µm] 38500 100 msy [µm] 37000 30 x ( ) midx [µm] 0 10 0 5 y ( ) midy [µm] ( ) sepf [µm] 64090 10 ( ) sepb[µm] 64090 10 1 a1 [mrad] 0 0.13 2 a2 [mrad] 0 0.13 3 a3 [mrad] 0 0.13 4 a4 [mrad] 0 0.13 half-stereo [mrad] 4.1-20 0.13 5 5 2 1 2 3 1 mm 200 µm z, (z = ax+ by+ c) ( 4.5) r-φ 8 µm 50 µm ( 4.2) 29

4.5 z ( ) maxzlower [µm] z ( ) maxzupper [µm] diffmodulethickness[µm] ( ) optimalmaxzerrorlower [µm] ( ) optimalmaxzerrorupper [µm] OptimalMaxZerrorLower RMS OptimalRMSZerrorLower [µm] OptimalMaxZerrorUpper RMS OptimalRMSZerrorUpper [µm] locoolingfacing a [mrad] locoolingfacing b [mrad] 4.2 0 200 0 200 0 100 0 50 0 50 0 25 0 25 0 0.5 0 3 30

2 IV 0 500 V 10 V 5 (Pt100) 15 ASIC IV IV 0 500 V 4 A 3 150 V DAC [9] Vdd Vdd 4.0 3.5 V Vdd 3.5V 4.6 2 N B 31

12 0 1 2 1. ( ) 2. ( ) ON 01X 4.0 fc 2.0 fc 50% 50% 50 1/4 0.8 nsec ( 4.7) 0 35 28 63 4.7 32

(4 mv) DAC DAC ( ) 4 DAC DAC 1.0 fc VT50 ( 50 ) DAC VT50 2.5 mv 2.5 mv 300 mv DAC DAC 1 ( 125% ) 0 1 S S 50 VT50 S ( 4.8) 4.8 S VT50 S S 1 ( ) 33

[14] 10 (0.5 8.0 fc) S VT50 10 VT50 VT50( Q) Q a b c Gain a 1+ e = + Q / b ae b(1 + e Q / b ( Q) = Q / b ( 4.9) 2.0 fc dead unbonded lost ) c 2 4.9 ( 10 ) dodgy 50 mv/fc 1 fc ( 6250 e) 4 1 1550 e ( 1500 e) 1 34

100 khz 10 6 10 6 2000 1 2000 50 1.0 fc 1.0 fc 2 (fc 2 ) (ln) ( 5.10) 1 fc 5 10 4 4.10 1.0 fc 10.0 fc 1.25 fc ( 4.11)[9] 35

( 0.8 nsec) 10.0 fc ON 01X 10 fc 25 nsec nsec 16 nsec 4 4.11 (TM0, TM1) (Pt100) ASIC 15 [13] 4.12 36

5 1 Mod1 (20220170200001) Mod2 (20220170200002) Mod3 (20220170200003) Mod4 (20220170200004) Mod5 (20220170200005) ID 1 Mod1 Mod2 CERN (PS) CERN Mod1 CERN 22 Mod3 Mod4 Mod5 3 2 3 5.1 350 V 15 Mod1 Mod2 24 15 Mod2 Mod3 Mod4 Mod5 Mod1 Mod2 37

5.1 350V 24 Mod2 ASIC 4 5 5 5.2 ( 5.2 ) Mod2 LT Mod1 350 V Mod3 Mod4 Mod5 ASIC ASIC 1 Confirmation Test ASIC ( 5.2 ) 38

5.2 (Vbias)150 V 350 V ASIC 24 ( ) ASIC ( ) Idet TM0 TM1 Icc Idd ASIC Mod2 39

2 1 5.3 x midf ( 5 m) 0.13 mrad 5.4 5.5 x 5.4 optimalrmszerrorlower (Upper) RMS 0 25 µm 40

5.3 41

5.4 (1) 42

5.5 (2) 43

2 IV 20 IV 3 IV 500 V 4 µa IV ( 5.6) 5.8 IV 5.6 IV 20 44

3 Vdd 3.3 4.2 V Vdd 3.3 V Vdd 3.5 V Mod1 0 ( 5.7 ) 6 ( 5.7 ) 0 16 unit 6 17 unit 5.7 45

モジュール Mod1 Mod2 Mod3 Mod4 Mod5 状態 1 fc 相当の閾値電圧マスクチャンネル [mv] ( トリム不能チャンネル ) INITIAL 87.5 2 (2) TC 87.5 2 (2) LT 87.5 3 (3) INITIAL 90.0 12 (12) TC 87.5 12 (12) LT 90.0 12 (12) INITIAL 92.5 3 (3) TC 92.5 3 (3) LT 92.5 3 (3) INITIAL 90.0 0 (0) TC 92.5 0 (0) LT 95.0 0 (0) INITIAL 87.5 4 (2) TC 95.0 4 (3) LT 95.0 4 (3) 5.1 5.1 0 3 Mod5 S LT S ( 5.8) Mod1 1 Mod2 1 fc 46

5.8 S 47

2.0 fc 5.9 5.10 5.11 5.9 ( 5.2) 55 mv/fc 1550 e ( 5.3) ( LT ) 5 36 7680 (5 ) 0.47 Mod2 0.9 1% 48

5.10 INITIAL TC LT LT INITIAL 49

5.11 INITIAL TC LT LT INITIAL 50

モジュール状態増幅率 [mv/fc] 入力ノイズ [e] Mod1 Mod2 Mod3 Mod4 Mod5 INITIAL 55.92 ± 1.20 1446 ± 65 TC 56.49 ± 1.22 1412 ± 63 LT 56.23 ± 1.22 1395 ± 62 INITIAL 55.20 ± 1.11 1493 ± 40 TC 54.33 ± 1.12 1481 ± 38 LT 54.51 ± 1.09 1419 ± 36 INITIAL 55.69 ± 1.11 1492 ± 38 TC 56.42 ± 1.15 1498 ± 37 LT 56.28 ± 1.13 1455 ± 36 INITIAL 55.56 ± 1.13 1530 ± 45 TC 55.28 ± 1.15 1504 ± 44 LT 55.43 ± 1.11 1546 ± 48 INITIAL 54.99 ± 1.09 1532 ± 46 TC 55.24 ± 1.09 1445 ± 43 LT 55.10 ± 1.08 1417 ± 42 5.2 55 mv/fc 1550 e RMS モジュール Mod1 Mod2 Mod3 Mod4 Mod5 センサーとマスク高ノイズ割合状態未接続の合計チャンネルチャンネル [%] チャンネル INITIAL 2 7 0 9 0.59 TC 2 7 1 10 0.65 LT 3 7 0 10 0.65 INITIAL 12 1 1 14 0.91 TC 12 1 1 14 0.91 LT 12 1 0 13 0.85 INITIAL 3 1 2 6 0.39 TC 3 1 0 4 0.26 LT 3 1 0 4 0.26 INITIAL 0 2 4 6 0.39 TC 0 2 0 2 0.13 LT 0 2 1 3 0.20 INITIAL 4 2 0 6 0.39 TC 4 2 0 6 0.39 LT 4 2 0 6 0.39 5.3 1 51

( 5.4) 1 fc 5 10-4 Mod1 Mod2 10 7 10 6 モジュール平均占有率 (1 fc) ノイズ [e] Mod1 5.0 ± 4.3 10-6 1361 Mod2 1.7 ± 1.7 10-5 1463 Mod3 2.9 ± 2.1 10-5 1551 Mod4 6.0 ± 4.7 10-5 1663 Mod5 2.1 ± 1.5 10-5 1500 5.4 1 fc 5 10 4 RMS 52

( 4.12) 16 nsec 10 14 nsec 5.12 16 nsec 53

Mod1 Mod2 Mod3 Mod4 Mod5 2 3 Mod1 Mod2 4.5 Mod3 Mod4 Mod5 3.2 3.7 ASIC 12 5.3 W ( 5.5) モジュール Mod1 Mod2 Mod3 Mod4 Mod5 サーミスタ1 フェイシング ASICの状態温度差 [degc] [degc] [degc] 発熱量 [W] INITIAL 30.5 26.1 4.4 5.18 TC 30.5 25.4 5.1 5.18 LT 31.5 27.4 4.1 5.25 INITIAL 31 26.3 4.7 5.39 TC 31 28.7 2.3 5.26 LT 32 25.4 6.6 5.50 INITIAL 30 26.9 3.1 5.20 TC 30.5 27.1 3.4 5.18 LT 30 26.9 3.1 5.16 INITIAL 30 27.1 2.9 5.32 TC 31 27.6 3.4 5.33 LT 30 27.1 2.9 5.28 INITIAL 28 24.7 3.3 5.28 TC 28 24.4 3.6 5.26 LT 27 24.3 2.7 5.14 5.5 54

6 2006 LHC LHC SCT SCT Site Qualification 24 15 20 60 (5 ) 24 5 µm 15 3.7 IV 2 fc ENC 55 mv/fc 1450 e 10 4 16 nsec 1 (2002 )2 1 12 55

[1] Particle Data Group, Review of Particle Physics", The European Physical Journal C3 (1998) 1. [2] ATLAS Inner Detector Technical Design Report",CERN/LHCC/99-17. [3] G. Lindstrom et al., Radiation hardness of silicon detectors - a challenge from high-nergy physics " Nucl. Instrum. and Methods in Phys. Res. A426 (1999) 1-15. [4] William R.Leo, Techniques for Nuclear and Particle Physics Experiment", Springer-Verlag (1987). [5] 2000 2 [6] 2001 2 [7] T. Kondo et al., Construction and Performance of the ATLAS Silicon Microstrip Barrel Modules, submitted to the 5th International Conference on Large Scale Applications and Radiation Hardness of Semiconductor Detectors (RD01), July 4-6, 2001, Firenze, Italy. [8] ABCD3T Chip Specification Version V1.2, July 24, 2000 [9] P. W. Phillips and L. Eklund, Electrical Tests of SCT Hybrids and Modules Version 3.01, 24.08.01 [10] M. Morrissey, SLOG, 28/08/99 [11] M. Goodrick and M. Morrissey, MuSTARD, 17/09/98 [12] ModuleQA SCT-BM-FDR-7 [13] Mechanical and Thermal Performance of Modules SCT-BM-FDR-8 [14] Electrical Performance of Modules SCT-BM-FDR-9 57