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Transcription:

swk(at)ic.is.tohoku.ac.jp

2

Outline 3

? 4

S/N CCD 5

Q Q V 6

CMOS 1 7

1 2 N 1 2 N 8

CCD: CMOS: 9

: / 10

A-D A D C A D C A D C A D C A D C A D C ADC 11

A-D ADC ADC ADC ADC ADC ADC ADC ADC ADC A-D 12

ADC TX reset analog ramp digita ramp 1 8 write 8-bit read mem 8 digital pixel value row read [Kleinfelder2001] CMOS 0.18um 352x288 pixels ~ 10,000fps 8 13

CCD: CMOS: 14

( PC ) e.g. [ 2002] [Muehlmann2004] frame N frame N+1 15

SIMD (Single Instruction stream, Multiple Data stream) + + + + + + + + 16

SIMD ILLIAC IV (64 x 64-bit processors) [ed-thelen.org] CM-2, by Thinking Machines Corp. (65536 x 1-bit processors) [svisions.com] Several attempts, no lasting successes. [Hennessy2003] 17

SIMD Intel MMX SSE SSE2 AMD 3D Now! Enhanced 3D Now! 18

SIMD Pixel-Parallel Image Processor (MIT) [Gealow1999] IMAP-VISION (NEC) (linear processor array) [ 1995] [nec.co.jp] 19

SIMD Programmable Artificial Retina ( ) Near Sensor Image Processing ( ) Sensory Processing Element ( ) 20

Programmable Artificial Retina [Bernard1993] 3 2 AND NOT AND / NOT 21

Near Sensor Image Processing [Astrom1996] 9 22

Sensory Processing Element [ 1998] 24 23

SIMD 3? 24

A D C A D C A D C high-speed image processor 25

IVP MAPP [Johansson2003] 26

Column-Parallel Vision System II ADC ADC ADC (S 3 PE) [ 2001] 27

SIMD [ 2003] 1000fps CMOS (Micron ) + FPGA + PC [ 2005] 1000fps CMOS (Micron ) + FPGA 28

? ASIC? FPGA 29

References [Kleinfelder2001] S. Kleinfelder, S. Lim, X. Liu and A. El Gamal: A 10000 Frames/s CMOS Digital Pixel Sensor, IEEE J. Solid-State Circuits, vol.36, no.12, pp.2049-2059, 2001. [ 2002] :, 20, 3A15, 2002. [Muehlmann2004] U. Muehlmann, M. Ribo, P. Lang and A. Pinz, A New High Speed CMOS Camera for Real-Time Tracking Applications, Proc. 2004 IEEE Int. Conf. Robotics and Automation, pp. 5195-5200, 2004. [ed-thelen.org] http://ed-thelen.org/comp-hist/vs-illiac-iv.html [svisions.com] http://www.svisions.com/sv/cm-dv.html [Hennessy2003] J. L. Hennessy and D. A. Patterson: Computer Architecture A Quantitative Approach, Third Edition, Morgan Kaufmann, 2003. [Gealow1999] J. C. Gealow and C. G. Sodini: A Pixel-Parallel Image Processor Using Logic Pitch-Matched to Dynamic Memory, IEEE J. Solid-State Circuits, vol.34, no.6, pp.831-839, 1999. [ 1995],,,, : SIMD IMAP, (D-I), vol.j78-d-ii, no.2, pp.82-90, 1995. [nec.co.jp] http://www.incx.nec.co.jp/imap-vision/ [Bernard1993] T. M. Bernard, Y. Zavidovique and F. J. Devos: A Programmable Artificial Retina, IEEE J. Solid-State Circuits, vol.28, no.7, pp.789-798, 1993. [Astrom1996] A. Astrom, J.-E. Eklund and R. Forchheimer: Global Feature Extraction Operations for Near-Sensor Image Processing, IEEE Trans. Image Processing, vol.5, no.1, pp.102-110, 1996. [ 1998],,, :, (D-I), vol.j81-d-i, no.2, pp.70-76, 1998. [Johansson2003] R. Johansson, L. Lindgren, J. Melander and B. Moller: A Multi-Resolution 1000 GOPS 4 Gpixels/s Programmable CMOS Image Sensor for Machine Vision, Proc. IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, 2003. [ 2001] : : CPV-II 19, pp.383-384, 2001. [ 2003],, : -- 1000fps --, 21, 1K13, 2003. [ 2005] CMOS FPGA,, 2A1-N-094, 2005. 30

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