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1 PIC/CPLD

2 1 4 2 PIC MPLAB IDE CCSC LED LCD UART PCB CAD DRC

3 LED MATRIX LED UART LED LCD UART LED UART LED LED LED ( ) 107 3

4 1 PIC (Peripheral Interface Controller) CLPD PIC 4

5 2 PIC Microchip Technology Co. PIC 2.1 PIC I/O LED 2.2 PIC 1. PIC10 PIC12 12bit 2. PIC16 14bit A/D PIC18 16bit 2.3 PIC 5

6 Windows XP Home Edition Ver 2002 Service Pack 2 MPLAB IDE CCSC PIC AKI-PIC Ver 3.5 PIC Ver MPLAB IDE CCSC MPLAB IDE Windows Microchip Technology Co. CCSC CCS PICmicro MCU PIC C 6

7 3 LED 3.1 PIC16F628 4 **H**M**S** **M**S**** 2 LED 1 1: LED 7

8 Reserve memory area initialization START Timer1 STOP LED CONT Initialize variables main loop goto START Reset switch? Timer1 start letgo flag? letgo flag = 1 goto START LED CONT 2: LED PIC I/O Timer1 Stop LED CONT Reset START Reset letgo (=0x00 ) START (0x01 ) Timer1 letgo LED CONT START 8

9 LED CONT Mode switch? hyoji 0x00 hyoji 0x01 Serect factor Wreg Display data Convert Display data to LED data keta < 8 PortB LED data 1m Sec Wait Stop bottom check PortB 0xFF Increment keta return 3: LED LED CONT Mode High hyoji 0x00 **H**M**S** Low hyoji 0x01 **M**S**** 8 keta < 8 Warking Regester( Wreg) LED PortB 1 milli second?? START PortB 0xFF keta 9

10 Save register from TMR1? Count up Recover register 4: LED (Wreg Status regester) Timer1 10

11 3.3 5 LED Tr Tr PortA 0,1,2 3bit 74HC138 PortB LED 15mA LED 1V R R = (3 1) = 13 3 ; 130 [Ω] 5: LED 11

12 4 LCD 4.1 TZ-250A 6 6: LCD 12

13 LED PIC TMR1 LCD 500m Sec LCD 1 LCD LED / SS Low gogoch gogo 0x05 B letgo SS letgo letgo SS SS letgo A letgo B 13

14 Reseive memory area Initialization Timer 1 stop Reset HIGH Initialize LCD units 500mSec wait Reset LOW 500mSec wait Set LCD initial value Display routine First display Main routine A TMR 1 STOP B Start/Stop botton check Set gogoch flag gogo 0x05 Idle loop Initialize time variables Display routine goto B Reset = 0? TMR1 start letgo = 1 Start/Stop button Display routine letgo=1? goto A goto B 7: LCD 14

15 8 gogoch gogo LCD bit 855µSec Step 4bit 15

16 0 1 2 gogo = Display Display from 1 10 Sec only Sec to end Display from 1 Sec to end Display from 10 Sec to end Display from 1 Min to end Display all Get display code Convert display code into LCD code Make and output lower 4 digit code A Strobe HIGH LCD Busy = 1 Wait Strobe LOW gogoch = 1? Wait 855 µ Sec LCD Busy = 1 Wait goto next time digit had send upper 4 digits? Make and output upper 4 digit code goto A return 8: LCD 16

17 Save regester Set gogoch flag Increment gogo Count up Recover regester 9: LCD gogoch gogo 17

18 4.3 LCD 10: LCD PortA HC138 74LS251 LCD PortA 0 2 PortB 18

19 5 5.1 MR-999 PIC16F628A UART( ) AM-RT5 AM-HRR3 AM C C : 19

20 : 20

21 STX ETX 8bit STX Initialization Define variables Get unit code Make send data A Make send data B Send STX Main loop Send STX Send data A Send data B Send data A Send data B Send ETX 13: 21

22 MODE 2bit RA 4,5 RB 2 UART AM-RT5 UART PB1 14: 22

23 V TA7291P 6V 15: 23

24 state idle UART data state state idle ( STX) STX state wait STX wait idle state ready1 ready1 data STX STX data ( ETX) state idle ETX STX data data1 state ready2 ready2 data STX ETX data data2 state compare1 data STX ETX compare1 ready1 data1 data state compare2 compare2 compare1 data2 data1 data2 state ready1 17 data Elbow, Shoulder, Wrist 24

25 Initialization Get unit code state idle Get Receive data Receive error idle data = STX? state wait Receive error Main loop RS232 ERRORS? wait ready1 data = STX? data = STX? state ready1 Receive error data = ETX? state idle Save data as data1 state ready2 state = ready2 data = STX or ETX? Receive error Save data as data2 state compare1 compare1 data = data1? state compare2 Receive error Make Motor drive code compare2 data = data2? code match? Motor drive state ready1 Receive error 16: 25

26 Grip data = default Stop Reverse Run Stop (Elbow, Shoulder, Wrist) Base data = default Stop Reverse Run Stop 17: V PIC 78L05 5V 26

27 18: 27

28 : PIC AD ADC LM C 1000 C PIC Vref V 10bit OP ADC 0 0 LM35 ADC Set Wait ADC 28

29 Initialization Set ADC ch 0 Wait Get ADC ch 0 data Fine adjust data Set ADC ch 1 Display ch 0 data Get ADC ch 1 Set ADC ch 0 data 5 7or=1020? Indefinate Fine adjust data Display ch1 data Get ch 0 data Mode? Fine adjust data Set ADC ch 2 Display ch 0 data Main loop Get ADC ch 2 Set ADC ch 0 data 5 7or=1020? Indefinate Fine adjust data Display ch2 data Get ch 0 data Fine adjust data Wait 20: 29

30 ADC Mode True ADC ADC 0 1 (Indefinate) UART MIN 1 Sec CCP UART 10mSec 6 1mSec 625kbps 1.5µSec High 1.5µSec SA MOS FET 2SJ

31 21: 31

32 22: UART MOS ( 23) ( 24) ( 25) running routine 1mSec CCP CCP UART 1 Display Main Loop LCD 100 0xA 0xD 0xC 0xB 60bit

33 23: MOS FET 24: 33

34 25: Initialization Set up CCP enable Grobal interrupt disable CCP interrupt enable CCP interrupt Main Loop Start is pushed? running routine Reset is pushed? Stop button check Now running? ClearNumberdata Display flag? Display 26: 34

35 27: PCB CAD DRC Trax Maker mm DC-DC MCP1252 PVA OHP Tracs Maker Design Rule Check(DRC) Clearance Net list 35

36 28: UART LED MATRIX LED MATRIX LED LED PIC CPLD CPLD UART 31 LED UART LED LED Circuit Maker Trax Maker PCB Netlist ( 34) 36

37 29: PCB 37

38 30: LED MATRIX 31: LED MATRIX 3 38

39 32: LED 33: LED 39

40 34: 100mil CPLD UEW( ) UEW 40

41 35: LED 36: LED 41

42 8.1.3 UART 37: UART CPLD 1 6V 5V 3V CPLD LED CPLD 5V CPLD Low 2.5V kΩ UART 10MHz LED CPLD kHz

43 38: LED MATRIX 43

44 40 0xA 41 0xD 42 0x5 0x5 39: A bit 44

45 40: A 41: D 45

46 42: 5 [1] PIC16F [2] C PIC [3] VHDL [4] VHDL CPLD [5] PIC/CPLD 46

47 9 47

48 10 LED ;******************************************************** ; ; StopWatch ; ;******************************************************** list p=pic16f648a include P16F648A.inc ;**************** Label Definition ******************* c10h equ h 20 ;Counter adr (10th hour) c01h equ h 21 ;Counter adr (1st hour) c10m equ h 22 ;Counter adr (10th min) c01m equ h 23 ;Counter adr ( 1st min) c10s equ h 24 ;Counter adr (10th sec) c01s equ h 25 ;Counter adr ( 1st sec) c1000 equ h 26 ;Counter adr (1000th sub-sec) c100 equ h 27 ;Counter adr (100th sub-sec) c10 equ h 28 ;Counter adr (10th sub-sec) c001 equ h 29 ;Counter adr (1st sub-sec) hyoji equ h 2a ;0 -> --h--m--s-- / 1 -> --m--s---- temp equ h 2b ;Adjust waiting time running equ h 30 pushed equ h 31 ;0 -> pushed, 1 -> release chnum equ h 32 pushch equ h 33 relech equ h 34 letgo equ h 35 keta equ h 3a ;display position 0~7 bcd_in equ h 3b ;display substance seg7_0 equ b ;Pattern 0 seg7_1 equ b ;Pattern 1 seg7_2 equ b ;Pattern 2 seg7_3 equ b ;Pattern 3 seg7_4 equ b ;Pattern 4 seg7_5 equ b ;Pattern 5 48

49 seg7_6 equ b ;Pattern 6 seg7_7 equ b ;Pattern 7 seg7_8 equ b ;Pattern 8 seg7_9 equ b ;Pattern 9 seg70 equ h 40 ;Pattern 0 set address seg71 equ h 41 ;Pattern 1 set address seg72 equ h 42 ;Pattern 2 set address seg73 equ h 43 ;Pattern 3 set address seg74 equ h 44 ;Pattern 4 set address seg75 equ h 45 ;Pattern 5 set address seg76 equ h 46 ;Pattern 6 set address seg77 equ h 47 ;Pattern 7 set address seg78 equ h 48 ;Pattern 8 set address seg79 equ h 49 ;Pattern 9 set address w_save equ h 4a ;W Register save adr s_save equ h 4b ;STATUS Register save adr CNT1 equ h 4c ;1m sec conter address CNT2 equ h 4d ;1m sec conter address ;**************** Program Start *********************** org 0 ;Reset Vector goto init org 4 ;Interrupt Vector goto int ;**************** Initial Process ********************* init bcf status, rp0 movlw h 07 movwf cmcon ;All digital bsf status, rp0 ;Change to Bank1 movlw b ;RA012 out / RA345 in movwf trisa ;Set PORTA clrf trisb ;RB all out movlw b ;not RBPU/TOCS/PSA=0,PS=111 movwf option_reg ;Set OPTION_REG movlw b ;CCP1IE -ON 49

50 movwf pie1 bcf status, rp0 ;Change to Bank0 movlw 0xff movwf portb ;Set OFF all 7seg movlw b movwf intcon ;PEIE-ON / GIE-OFF movlw b movwf ccp1con ;compare mode Spcial event trigger movlw 0x01 movwf ccpr1h movlw 0xF4 movwf ccpr1l ;compare = 0.2u*500 = 100u Sec clrf t1con ;TMR1:prescaler 1:1 not use clrf tmr1h clrf tmr1l movlw seg7_0 ;Set 7segment pattern 0 movwf seg70 ;Save pattern 0 movlw seg7_1 ;Set 7segment pattern 1 movwf seg71 ;Save pattern 1 movlw seg7_2 ;Set 7segment pattern 2 movwf seg72 ;Save pattern 2 movlw seg7_3 ;Set 7segment pattern 3 movwf seg73 ;Save pattern 3 movlw seg7_4 ;Set 7segment pattern 4 movwf seg74 ;Save pattern 4 movlw seg7_5 ;Set 7segment pattern 5 movwf seg75 ;Save pattern 5 movlw seg7_6 ;Set 7segment pattern 6 movwf seg76 ;Save pattern 6 movlw seg7_7 ;Set 7segment pattern 7 movwf seg77 ;Save pattern 7 movlw seg7_8 ;Set 7segment pattern 8 movwf seg78 ;Save pattern 8 50

51 movlw seg7_9 ;Set 7segment pattern 9 movwf seg79 ;Save pattern 9 ;************* Timer stand-by Process ***************** stand_by clrf c10h clrf c01h clrf c10m clrf c01m clrf c10s clrf c01s clrf c1000 clrf c100 clrf c10 clrf c001 clrf running clrf letgo clrf pushed clrf tmr1h clrf tmr1l ;Clear just in case ; movlw 0 ; movwf c10h ; movlw 0 ; movwf c01h ; movlw 0 ; movwf c10m ; movlw 0 ; movwf c01m ; movlw 0 ; movwf c10s ; movlw 0 ; movwf c01s ; movlw 0 ; movwf c1000 ; movlw 0 ; movwf c100 ; movlw 0 ; movwf c10 51

52 ; movlw 0 ; movwf c01 ;If you want to change initial display, change here loopin bcf intcon, gie bcf t1con, 0 ;TMR 1 STOP clrf tmr1h clrf tmr1l ;Clear just in case hloop call led_cont ;Call LED Countrol sub btfsc porta, 4 goto go ;reset check clrf c10h clrf c01h clrf c10m clrf c01m clrf c10s clrf c01s clrf c1000 clrf c100 clrf c10 clrf c001 goto hloop ;************** Timer start Process ******************* go btfss letgo, 0 goto loopin bsf intcon, gie ;Interruption enable bsf t1con, 0 ;TMR1 start loop call led_cont ;Call LED Countrol sub btfss letgo, 0 goto loopin goto loop ;************* 1msec Timer Subroutine ***************** wait movlw 0x04 movwf cnt2 52

53 t1m2 movlw 0xF2 movwf cnt1 timloop nop decfsz cnt1, f goto timloop decfsz cnt2, f goto t1m2 return ;************ Bottom Check ************************* checkin movlw 9 movwf chnum clrf pushch clrf relech btfsc running, 0 goto stopchk btfss pushed, 0 goto Lcheck1_stop ; L goto Hcheck1_stop ; H Lcheck1_stop btfsc porta, 3 return goto LinL_stop LinL_stop bcf pushch, 0 rlf pushch, f Lcheck2_stop decfsz chnum goto Lcheck1_stop movf pushch, w btfsc status, z bsf pushed, 0 bsf letgo, 0 return Hcheck1_stop btfsc porta, 3 goto HinH_stop 53

54 return HinH_stop bsf relech, 0 rlf relech, f goto Hcheck2_stop Hcheck2_stop decfsz chnum goto Hcheck1_stop movlw 0xff subwf relech, w btfss status, z return bcf pushed, 0 bsf running, 0 return ;********************************** stopchk btfss pushed, 0 goto Lcheck1_run ; L goto Hcheck1_run ; H Lcheck1_run btfsc porta, 3 return goto LinL_run LinL_run bcf pushch, 0 rlf pushch, f Lcheck2_run decfsz chnum goto Lcheck1_run movf pushch, w btfsc status, z bsf pushed, 0 bcf letgo, 0 return Hcheck1_run btfsc porta, 3 goto HinH_run return 54

55 HinH_run bsf relech, 0 rlf relech, f goto Hcheck2_run Hcheck2_run decfsz chnum goto Hcheck1_run movlw 0xff subwf relech, w btfss status, z return bcf pushed, 0 bcf running, 0 return ;************ Begin Interruption Process ************** int movwf w_save ;Save W register movf status,w ;Read STATUS reg movwf s_save ;Save STATUS reg bcf status,rp0 ;Change to Bank0 btfss pir1, ccp1if goto int_end ;*********** Interruption routine by ccp1if ************** count incf c001, f movlw 10 subwf c001, w ;freg - wreg -> wreg btfss status, z goto int_end ;10 0 -> clrf c001 incf c10, f movlw 10 subwf c10, w btfss status, z goto int_end clrf c10 incf c100, f movlw 10 subwf c100, w 55

56 btfss status, z goto int_end clrf c100 incf c1000, f movlw 10 subwf c1000, w btfss status, z goto int_end clrf c1000 incf c01s, f movlw 10 subwf c01s, w btfss status, z goto int_end clrf c01s incf c10s, f movlw 6 subwf c10s, w btfss status, z goto int_end clrf c10s incf c01m, f movlw 10 subwf c01m, w btfss status, z goto int_end clrf c01m incf c10m, f movlw 6 subwf c10m, w btfss status, z goto int_end clrf c10m incf c01h, f movlw 10 subwf c01h, w btfss status, z goto int_end clrf c01h 56

57 incf c10h, f movlw 10 subwf c10h, w btfss status, z goto int_end clrf c10h ;************ END of Interruption Process ************** int_end bcf pir1, ccp1if ;Clear interrupt flag movf s_save,w ;Read saved STATUS reg movwf status ;Recover STATUS reg swapf w_save,f ;Read saved W register swapf w_save,w ;Recover W register retfie ;***************************************************** ;************** LED Control Subroutine ************* ;***************************************************** led_cont btfss porta, 5 ;mode switch check goto type2 ;type2:2ndmode type1 clrf hyoji ;--h--m--s-- clrf keta ;HC138-Q0:L ; movf keta, w movwf porta movf c10h, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c01h, w 57

58 movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c10m, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c01m, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c10s, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb 58

59 incf keta, f ; movf keta, w movwf porta movf c01s, w movwf bcd_in call bcd_7seg bcf portb, 7 ;dot call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c1000, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c100, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb return ; type2 movlw h 01 ;--m--s---- movwf hyoji 59

60 clrf keta ;HC138-Q0:L ; movf keta, w movwf porta movf c10m, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c01m, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c10s, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c01s, w movwf bcd_in 60

61 call bcd_7seg bcf portb, 7 ;dot call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c1000, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c100, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb incf keta, f ; movf keta, w movwf porta movf c10, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb 61

62 incf keta, f ; movf keta, w movwf porta movf c001, w movwf bcd_in call bcd_7seg call wait call checkin movlw h ff movwf portb return ; bcd_7seg movlw seg70 addwf bcd_in, w movwf fsr movf indf, w movwf portb return end 62

63 11 LCD ;******************************************************** ; ; LCD TZ250A Stop Watch ; ;******************************************************** list p=pic16f628a include P16F628A.inc config _xt_osc & _wdt_off & _pwrte_off & _boden_of& _mclre_off & _cp_off & _lvp_off ;**************** Label Definition ******************* c10m equ h 20 ;Counter adr (10th min) c01m equ h 21 ;Counter adr (1st min) c10s equ h 22 ;Counter adr (10th sec) c01s equ h 23 ;Counter adr (1st sec) c10 equ h 24 ;Counter adr (10th sub-sec) c01 equ h 25 ;Counter adr (100th sub-sec) t0tmp equ h 26 ;TMR0 work1 equ h 27 ; work2 equ h 28 w_save equ h 30 ;W Register save adr s_save equ h 31 ;STATUS Register save adr gogo equ h 32 running equ h 33 pushed equ h 34 chnum equ h 35 pushch equ h 36 rerech equ h 37 letgo equ h 38 first equ h 39 gogoch equ h 3A d10m d01m equ h 40 equ h 41 63

64 d10s d01s d10 d01 equ h 42 equ h 43 equ h 44 equ h 45 segch blight equ h 46 equ h 47 seg_code equ h 48 ;**************** Program Start *********************** org 0 ;Reset Vector goto init org 4 ;Interrupt Vector goto int ;**************** Initial Process ********************* init bcf status, rp0 movlw h 07 movwf cmcon ;All digital bsf status, rp0 ;Change to Bank1 movlw b ;RA012 out / RA345 in movwf trisa ;Set PORTA movlw b movwf trisb ;RB6 in others out movlw b ;not RBPU/TOCS/PSA=0,PS=111 movwf option_reg ;Set OPTION_REG movlw b ;CCP1IE -ON movwf pie1 movlw 200 movwf pr2 bcf status, rp0 ;Change to Bank0 bsf portb, 5 ;RESET->ON movlw b movwf intcon ;PEIE-ON / GIE-OFF movlw b movwf ccp1con ;compare mode, special event trigger movlw 0x27 movwf ccpr1h movlw 0x10 64

65 movwf ccpr1l ;compare = 1u*10000 = 10mSec clrf t1con ;TMR1:pre1:1 not use clrf tmr1h clrf tmr1l ;tmr1 reset clrf c10m clrf c01m clrf c10s clrf c01s clrf c10 clrf c01 clrf gogo clrf gogoch clrf letgo ; Reset bsf portb, 5 ;RESET->ON movlw 8 movwf t0tmp clrf tmr0 reset_wait1_1 bcf intcon, t0if reset_wait1_2 btfss intcon, t0if goto reset_wait1_2 decfsz t0tmp, f goto reset_wait1_1 ;500mSecWait bcf portb, 5 ;RESET ->Low movlw 8 movwf t0tmp clrf tmr0 reset_wait2_1 bcf intcon, t0if reset_wait2_2 btfss intcon, t0if goto reset_wait2_2 decfsz t0tmp, f goto reset_wait2_1 ;500m Sec Wait ; bsf status, rp0 ;Bank1 movlw b

66 movwf option_reg ;prescaler 1:4 bcf status, rp0 ;Bank0 movlw 0xA1 movwf d10m movlw 0x96 movwf d01m movlw 0xA5 movwf d10s movlw 0xA5 movwf d01s movlw 0xB0 movwf d10 movlw 0xC6 movwf d01 ;initial display movlw 1 movwf first movlw 5 movwf gogo ; bsf gogoch, 0 movlw 0x01 movwf segch movlw 0x00 movwf blight ;00,FF movlw 0xE0 movwf seg_code ; dokokara ikimasuka? dokokara? btfss gogoch, 0 return clrf gogoch clrf porta movf gogo, w btfsc status, z goto keta0.01 ;1/100 movf gogo, w sublw 1 btfsc status, z goto keta0.1 ;1/10 movf gogo, w 66

67 sublw 2 btfsc status, z goto keta01s ;1Sec movf gogo, w sublw 3 btfsc status, z goto keta10s ;10Sec movf gogo, w sublw 4 btfsc status, z goto keta01m ; Min ; min keta10m btfsc first, 0 goto keta10m_2 movf c10m, w call tenkai movwf d10m ; keta10m_2 movlw 0 movwf porta movf d10m, w ;d01 andlw b ; 4bit movwf portb ; bsf portb, 4 ;strobe high busylp_d10m btfss portb, 6 ;busy high goto busylp_d10m bcf portb, 4 ;strobe low bcf intcon, t0if ;TMR0 flag clear movlw 42 movwf tmr0 ;TMR0 count 42 clear t0lp1_d10m btfss intcon, t0if ;855u sec wait goto t0lp1_d10m btfss portb, 6 ;check busy clear goto highb_d10m busyc1_d10m btfsc portb, 6 ;busy low 67

68 goto busyc1_d10m highb_d10m swapf d10m, w ; andlw b ; 4bit movwf portb ; bsf portb, 4 ;strobe high busylp2_d10m btfss portb, 6 ;busy high goto busylp2_d10m bcf portb, 4 ;strobe low bcf intcon, t0if ;TMR0 flag clear movlw 42 movwf tmr0 ;TMR0 count 42 clear t0lp2_d10m btfss intcon, t0if ;855u sec wait goto t0lp2_d10m btfss portb, 6 ;check busy clear goto keta01m busyc2_d10m btfsc portb, 6 ;busy low goto busyc2_d10m ; min keta01m btfsc first, 0 goto keta01m_2 movf c01m, w call tenkai movwf d01m keta01m_2 movlw 1 movwf porta movf d01m, w andlw b movwf portb bsf portb, 4 busylp_d01m btfss portb, 6 goto busylp_d01m bcf portb, 4 68

69 bcf intcon, t0if movlw 42 movwf tmr0 t0lp1_d01m btfss intcon, t0if goto t0lp1_d01m btfss portb, 6 goto highb_d01m busyc1_d01m btfsc portb, 6 goto busyc1_d01m highb_d01m swapf d01m, w andlw b movwf portb bsf portb, 4 busylp2_d01m btfss portb, 6 goto busylp2_d01m bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 t0lp2_d01m btfss intcon, t0if goto t0lp2_d01m btfss portb, 6 goto keta10s busyc2_d01m btfsc portb, 6 goto busyc2_d01m ; Sec keta10s btfsc first, 0 goto keta10s_2 movf c10s, w call tenkai movwf d10s keta10s_2 69

70 movlw 2 movwf porta movf d10s, w andlw b movwf portb bsf portb, 4 busylp_d10s btfss portb, 6 goto busylp_d10s bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 t0lp1_d10s btfss intcon, t0if goto t0lp1_d10s btfss portb, 6 goto highb_d10s busyc1_d10s btfsc portb, 6 goto busyc1_d10s highb_d10s swapf d10s, w andlw b movwf portb bsf portb, 4 busylp2_d10s btfss portb, 6 goto busylp2_d10s bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 t0lp2_d10s btfss intcon, t0if goto t0lp2_d10s btfss portb, 6 goto keta01s busyc2_d10s 70

71 btfsc portb, 6 goto busyc2_d10s ; Sec keta01s btfsc first, 0 goto keta01s_2 movf c01s, w call tenkai movwf d01s keta01s_2 movlw 3 movwf porta movf d01s, w andlw b movwf portb bsf portb, 4 busylp_d01s btfss portb, 6 goto busylp_d01s bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 t0lp1_d01s btfss intcon, t0if goto t0lp1_d01s btfss portb, 6 goto highb_d01s busyc1_d01s btfsc portb, 6 goto busyc1_d01s highb_d01s swapf d01s, w andlw b movwf portb bsf portb, 4 busylp2_d01s btfss portb, 6 goto busylp2_d01s 71

72 bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 t0lp2_d01s btfss intcon, t0if goto t0lp2_d01s btfss portb, 6 goto keta0.1 busyc2_d01s btfsc portb, 6 goto busyc2_d01s ; /10 keta0.1 btfsc first, 0 goto keta0.1_2 movf c10, w call tenkai movwf d10 keta0.1_2 movlw 4 movwf porta movf d10, w andlw b movwf portb bsf portb, 4 busylp_d10 btfss portb, 6 goto busylp_d10 bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 t0lp1_d10 btfss intcon, t0if goto t0lp1_d10 btfss portb, 6 goto highb_d10 busyc1_d10 72

73 btfsc portb, 6 goto busyc1_d10 highb_d10 swapf d10, w andlw b movwf portb bsf portb, 4 busylp2_d10 btfss portb, 6 goto busylp2_d10 bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 t0lp2_d10 btfss intcon, t0if goto t0lp2_d10 btfss portb, 6 goto keta0.01 busyc2_d10 btfsc portb, 6 goto busyc2_d10 ; /100 keta0.01 btfsc first, 0 goto keta0.01_2 movf c01, w call tenkai movwf d01 keta0.01_2 movlw 5 movwf porta movf d01, w andlw b movwf portb bsf portb, 4 busylp_d01 btfss portb, 6 goto busylp_d01 73

74 bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 t0lp1_d01 btfss intcon, t0if goto t0lp1_d01 btfss portb, 6 goto highb_d01 busyc1_d01 btfsc portb, 6 goto busyc1_d01 highb_d01 swapf d01, w andlw b movwf portb bsf portb, 4 busylp2_d01 btfss portb, 6 goto busylp2_d01 bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 t0lp2_d01 btfss intcon, t0if goto t0lp2_d01 btfss portb, 6 goto segments busyc2_d01 btfsc portb, 6 goto busyc2_d01 ; segments btfss segch, 0 goto seg_end movf blight, f btfss status, z ;Z flag -> goto seg_off 74

75 seg_on movlw 3 addwf seg_code, f goto seg_1min seg_off movlw 3 subwf seg_code, f seg_1min comf blight, f movlw 1 movwf porta movf seg_code, w andlw b movwf portb bsf portb, 4 seg_busylp_1min btfss portb, 6 goto seg_busylp_1min bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 seg_t0lp1_1min btfss intcon, t0if goto seg_t0lp1_1min btfss portb, 6 goto seg_highb_1min seg_busyc1_1min btfsc portb, 6 goto seg_busyc1_1min seg_highb_1min swapf seg_code, w andlw b movwf portb bsf portb, 4 seg_busylp2_1min btfss portb, 6 goto seg_busylp2_1min bcf portb, 4 75

76 bcf intcon, t0if movlw 42 movwf tmr0 seg_t0lp2_1min btfss intcon, t0if goto seg_t0lp2_1min btfss portb, 6 goto seg_1sec seg_busyc2_1min btfsc portb, 6 goto seg_busyc2_1min seg_1sec movlw 3 movwf porta movf seg_code, w andlw b movwf portb bsf portb, 4 seg_busylp_1sec btfss portb, 6 goto seg_busylp_1sec bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 seg_t0lp1_1sec btfss intcon, t0if goto seg_t0lp1_1sec btfss portb, 6 goto seg_highb_1sec seg_busyc1_1sec btfsc portb, 6 goto seg_busyc1_1sec seg_highb_1sec swapf seg_code, w andlw b movwf portb bsf portb, 4 seg_busylp2_1sec 76

77 btfss portb, 6 goto seg_busylp2_1sec bcf portb, 4 bcf intcon, t0if movlw 42 movwf tmr0 seg_t0lp2_1sec btfss intcon, t0if goto seg_t0lp2_1sec btfss portb, 6 goto seg_end seg_busyc2_1sec goto seg_busyc2_1sec seg_end clrf segch first_check btfss first, 0 return clrf first ; Idle Loop loop_in bcf intcon, gie ; bcf t1con, 0 ;TMR1STOP clrf tmr1h clrf tmr1l ; clrf gogo Idle call checkin btfsc porta, 4 goto go ;reset check bsf gogoch, 0 movlw 5 movwf gogo clrf c10m clrf c01m clrf c10s clrf c01s clrf c10 clrf c01 77

78 call dokokara? goto Idle go btfss letgo, 0 goto Idle bsf intcon, gie ;Interruption enable bsf t1con, 0 ;TMR1 start loop call checkin call dokokara? btfss letgo, 0 goto loop_in goto loop ; Button Check checkin movlw 9 movwf chnum clrf pushch clrf rerech btfsc running, 0 goto stopchk btfss pushed, 0 goto Lcheck_stop ; L goto Hcheck_stop ; H Lcheck_stop btfsc porta, 3 return bcf pushch, 0 rlf pushch, f decfsz chnum goto Lcheck_stop movf pushch, w btfss status, z return bsf pushed, 0 bsf letgo, 0 return Hcheck_stop btfss porta, 3 78

79 return bsf rerech, 0 rlf rerech, f decfsz chnum goto Hcheck_stop movlw 0xff subwf rerech, w btfss status, z return bcf pushed, 0 bsf running, 0 return stopchk btfss pushed, 0 goto Lcheck_run ; L goto Hcheck_run ; H Lcheck_run btfsc porta, 3 return bcf pushch, 0 rlf pushch, f decfsz chnum goto Lcheck_run movf pushch, w btfss status, z return bsf pushed, 0 bcf letgo, 0 return Hcheck_run btfss porta, 3 return bsf rerech, 0 rlf rerech, f decfsz chnum goto Hcheck_run movlw 0xff subwf rerech, w 79

80 btfss status, z return bcf pushed, 0 bcf running, 0 return ; Interrupt int movwf w_save ;Save W register movf status,w ;Read STATUS reg movwf s_save ;Save STATUS reg bcf status,rp0 ;Change to Bank0 btfsc pir1, ccp1if goto count ;ccp1if count goto int_end ;*********** Interruption routine by ccp1if ************** count bcf pir1, ccp1if ; bsf gogoch, 0 ; dokokara? incf c01, f movlw 10 subwf c01, w ;freg - wreg -> wreg btfss status, z goto int_end ;10 0 -> clrf c01 ;0 ->10 -> incf gogo incf c10, f ;*** movlw 10 subwf c10, w btfss status, z goto int_end clrf c10 incf gogo incf c01s, f ;*** bsf segch, 0 movlw 10 subwf c01s, w btfss status, z goto int_end clrf c01s 80

81 incf gogo incf c10s, f ;*** movlw 6 subwf c10s, w btfss status, z goto int_end clrf c10s incf gogo incf c01m, f ;*** movlw 10 subwf c01m, w btfss status, z goto int_end clrf c01m incf gogo incf c10m, f ;*** movlw 10 subwf c10m, w btfss status, z goto int_end clrf c10m goto int_end ;************ END of Interruption Process ************** int_end movf s_save,w ;Read saved STATUS reg movwf status ;Recover STATUS reg swapf w_save,f ;Read saved W register swapf w_save,w ;Recover W register retfie ; Sub Rutine tenkai movwf work1 movlw 8 subwf work1, w movlw b btfsc status, c movlw b movwf work2 movlw b

82 andwf iorwf return work1, w work2,w end 82

83 12 #include<16f628a.h> #fuses HS,NOWDT,PUT,NOPROTECT,NOMCLR,NOLVP,NOBROWNOUT #use delay(clock = ) #use rs232(baud = 2400, XMIT = PIN_B2, RCV = PIN_B1) #use fast_io(a) #use fast_io(b) // #define STX 0x02 #define ETX 0x03 /////Main///// void main(void) { setup_comparator(nc_nc_nc_nc); set_tris_a(0xff); set_tris_b(0xf9); port_b_pullups(true); setup_uart(true); //Main Loop while(1) { unsigned int a_data, a_data_1, b_data, b_data_1, code; code = ((~input_a()) & 0x30) + 0x10; a_data = code; a_data_1 = ((~input_b()) & 0x08); a_data = a_data_1; a_data_1 = ((~input_b()) & 0x01) << 2; a_data = a_data_1; a_data_1 = ((~input_a()) & 0x03); a_data = a_data_1; b_data = 0x40; b_data_1 = (~input_b()) & 0x30; 83

84 b_data = b_data_1; b_data_1 = ((~input_a()) & 0x0c); b_data = b_data_1; b_data_1 = ((~input_b()) & 0xc0) >> 6 ; b_data = b_data_1; putc(stx); putc(stx); putc(a_data); putc(b_data); putc(a_data); putc(b_data); putc(etx); // delay_ms(200); // } } 84

85 13 #include<16f628a.h> #fuses HS,NOWDT,PUT,NOPROTECT,NOMCLR,NOLVP,NOBROWNOUT #use delay(clock = ) #use rs232(baud = 2400, XMIT = PIN_B2, RCV = PIN_B1, PARITY = N, ERRORS) #use fast_io(a) #use fast_io(b) #byte PORTA = 0x05 #byte PORTB = 0x06 // #define STX 0x02 #define ETX 0x03 #define idle 0 #define wait 1 #define ready1 2 #define ready2 3 #define compare1 4 #define compare2 5 // char state, code, data1, data2; // void RcvErr(void); void motor_cont(char mt1, char mt2, char mt3, char mt4, char mt5); void RcvState(char data); /////Main///// void main(void) { char data; // setup_comparator(nc_nc_nc_nc); set_tris_a(0x30); //RA4,5 input 85

86 set_tris_b(0x02); port_b_pullups(false); setup_uart(true); //RB1 input output_a(0); output_b(0); code = (~PORTA & 0x30) + 0x10; //device code state = idle; } while(1) { data = getc(); if (( RS232_ERRORS & 0x06 ) == 0) RcvState(data); else RcvErr(); } void RcvErr(void) { state = idle; RS232_ERRORS = 0; } void RcvState(char data) { char motor1, motor2, motor3, motor4, motor5; switch(state) { case idle: if (data == STX) state = wait; else RcvErr(); break; case wait: if(data == STX) state = ready1; 86

87 else RcvErr(); break; case ready1: if(data!= STX) { if (data == ETX) state = idle; else { data1 = data ; state = ready2; } } break; case ready2: if (data == STX data == ETX) RcvErr(); else { data2 = data; state = compare1; } break; case compare1: if (data!= data1) RcvErr(); //A data else state = compare2; break; case compare2: if (data!= data2) RcvErr(); //B data else { if ((data1 & 0xF0) == code) { motor1 = (data1 & 0x0C) >> 2; motor2 = data1 & 0x03; motor3 = (data2 & 0x30) >> 4; motor4 = (data2 & 0x0C) >> 2; motor5 = data2 & 0x03; } } } motor_cont(motor1, motor2, motor3, motor4, motor5); state = ready1; } break; default: break; 87

88 void motor_cont(char mt1, char mt2, char mt3, char mt4, char mt5) { switch(mt1) { case 0: output_low(pin_a2); output_low(pin_a3); break; case 1: output_high(pin_a2); output_low(pin_a3); break; case 2: output_low(pin_a2); output_high(pin_a3); break; default: output_low(pin_a2); output_low(pin_a3); } switch(mt2) { case 0: output_low(pin_b0); output_low(pin_b3); break; case 1: output_high(pin_b0) output_low(pin_b3); break; case 2: output_low(pin_b0); output_high(pin_b3); break; default: output_low(pin_b0); output_low(pin_b3); 88

89 } switch(mt3) { case 0: output_low(pin_b5); output_low(pin_b4); break; case 1: output_high(pin_b5); output_low(pin_b4); break; case 2: output_low(pin_b5); output_high(pin_b4); break; default: output_low(pin_b5); output_low(pin_b4); } switch(mt4) { case 0: output_low(pin_a0); output_low(pin_a1); break; case 1: output_high(pin_a0); output_low(pin_a1); break; case 2: output_low(pin_a0); output_high(pin_a1); break; default: output_low(pin_a0); output_low(pin_a1); } 89

90 } switch(mt5) { case 0: output_low(pin_b7); output_low(pin_b6); break; case 1: output_high(pin_b7); output_low(pin_b6); break; case 2: output_low(pin_b7); output_high(pin_b6); break; default: output_low(pin_b7); output_low(pin_b6); } 90

91 14 #include <16F819.h> #fuses INTRC_IO,NOWDT,PUT,NOPROTECT,NOMCLR,NOLVP,NOBROWNOUT #device ADC=10 #use delay(clock = ) #use fast_io(b) #use fast_io(a) #include "lcd_drive.c" static float situ_data; static float cap_data; static float cam_data; void indefinite() { lcd_cmd(0xc0); printf(lcd_data, " indefinite "); } void disp_cap() { lcd_cmd(0xc0); printf(lcd_data, "CA+ = %4.0f DegC ",cap_data); } void disp_cam() { lcd_cmd(0xc0); printf(lcd_data, "CA- = %4.0f DegC ",cam_data); } void main() { setup_oscillator(osc_4mhz); setup_adc_ports(an0_an1_an2_an4_vss_vref); setup_adc(adc_clock_div_8); set_tris_a(0x3f); 91

92 set_tris_b(0x00); lcd_init(); lcd_clear(); set_adc_channel(0); //analog LM35 delay_us(50); situ_data = read_adc(); situ_data = situ_data * ; while(1) { if(input(pin_a5)) //Plus thermo mode { set_adc_channel(1); lcd_cmd(0x80); printf(lcd_data, "LM35 = %2.1f DegC ",situ_data); //display LM35 thermo cap_data = read_adc(); //get AD set_adc_channel(0); if(cap_data <= 7 cap_data >=1020) indefinite(); else{ cap_data = 0.887*cap_data+54.5; //convert AD to Theremo disp_cap(); } disp_cap(); situ_data = read_adc(); situ_data = situ_data * ; } else //Minus thermo mode { set_adc_channel(2); lcd_cmd(0x80); printf(lcd_data, "LM35 = %2.1f DegC ",situ_data); //display LM35 thermo 92

93 } cam_data = read_adc(); //get AD set_adc_channel(0); if((cam_data <= 77) (cam_data >1000)) indefinite(); else if((cam_data > 78) && (cam_data <= 377)){ cam_data = *cam_data-7.0; disp_cam(); } else if((cam_data > 377) && (cam_data <= 1000)){ cam_data = *cam_data*cam_data *cam_data-72.0; disp_cam(); } disp_cam(); situ_data = read_adc(); situ_data = situ_data * ; } delay_ms(500); } 93

94 15 UART #include <16F628A.h> #fuses HS,NOWDT,NOPROTECT,NOMCLR,NOLVP,NOBROWNOUT #use delay(clock = ) #use rs232(baud = , xmit = PIN_B2, rcv = PIN_B1) #use fast_io(b) #use fast_io(a) #define ST PIN_B3 #define RES PIN_B0 #define LED PIN_A3 #define RW PIN_A1 #define rs PIN_A2 #define str PIN_A0 static int trans_table[16] = {0x55, 0x57, 0x5D, 0x5F, 0x75, 0x77, 0x7D, 0x7F, 0xD5, 0xD7 0xDD, 0xDF, 0xF5, 0xF7, 0xFD, 0xFF}; struct counter_mix { int digit; //[0] : 1/100 [1] : 1/10 [2] : 1sec [3] : 10sec int num; //[4] : 1min [5] : 10min }time[6]; int count0001 = 0; int trans_dig = 0; short disp_flag; void lcd_out(int code, int flag) { output_b(code); output_low(rw); if (flag == 0) output_high(rs); else output_low(rs); output_high(str); delay_cycles(3); output_low(str); output_high(rw); } 94

95 void lcd_data(int asci) { lcd_out(asci, 0); lcd_out(swap(asci), 0); delay_us(50); } void lcd_cmd(int cmd) { lcd_out(cmd, 1); lcd_out(swap(cmd), 1); delay_us(50); } void lcd_clear() { lcd_cmd(0x01); delay_ms(20); } void lcd_init() { delay_ms(15); lcd_out(0xff, 1); delay_ms(5); lcd_out(0x30, 1); delay_ms(1); lcd_out(0x30, 1); delay_ms(1); lcd_out(0x20, 1); delay_ms(1); lcd_cmd(0x2e); //fanc set DL=4 lcd_cmd(0x08); //Disp off lcd_cmd(0x0c); //Disp on cursol [off] brink [off] lcd_cmd(0x06); //Entry Mode set lcd_clear(); } 95

96 void disp() { disp_flag = 0; lcd_cmd(0xc0); printf(lcd_data, "%d%d:%d%d;%d%d", time[5].num, time[4].num, time[3].num, time[2].num, time[1].num, time[0].num); } #int_ccp1 void tmr1_ccp_isr() { ++count0001; if(count0001 > 9){ ++(time[0].num); disp_flag = 1; count0001 = 0; if(time[0].num > 9){ ++time[1].num; time[0].num = 0; if(time[1].num > 9){ ++time[2].num; time[1].num = 0; if(time[2].num > 9){ ++time[3].num; time[2].num = 0; if(time[3].num > 5){ ++time[4].num; time[3].num = 0; } } if(time[4].num > 9){ ++time[5].num; time[4].num = 0; } 96

97 } } } putc(trans_table[10]); // A delay_us(35); putc(trans_table[13]); // D delay_us(35); putc(trans_table[time[trans_dig].num+1]); //Number 0-9 delay_us(35); putc(trans_table[12]); // C delay_us(35); putc(trans_table[11]); // B delay_us(35); putc(trans_table[time[trans_dig].digit+1]); //digit trans_dig; } if(trans_dig > 5) trans_dig = 0; void main() { int i; short release, condition; delay_ms(100); //condition TRUE = run,false = stop //release FALSE = pushed // for(i = 0 ; i < 6 ; i++){ time[i].digit = i; //1/100 : [0]...10m : [5] time[i].num = 0; //data initialize } release = TRUE; condition = FALSE; port_b_pullups(true); setup_timer_1(t1_internal t1_div_by_1); 97

98 setup_ccp1(ccp_compare_reset_timer); CCP_1 = 0x1388; set_tris_a(0x00); set_tris_b(0x0f); output_low(led); lcd_init(); lcd_clear(); lcd_cmd(0x80); printf(lcd_data, "STOP WATCH"); lcd_cmd(0xc0); printf(lcd_data, "00:00;00"); set_uart_speed(625000); //625k pbs disable_interrupts(int_ccp1); enable_interrupts(global); while(1) { if(!(input(st)) && release){ //Start/Stop check delay_ms(20); if(!(input(st)) && (condition == FALSE)){ set_timer1(0x0000); ENABLE_INTERRUPTS(INT_CCP1); condition = TRUE; release = FALSE; } else if(!(input(st)) && (condition == TRUE)){ DISABLE_INTERRUPTS(INT_CCP1); condition = FALSE; release = FALSE; } } if(!(input(res)) && release){ delay_ms(20); 98

99 } } if(!(input(res)) && (condition == FALSE)){ for(i = 0 ; i < 6 ; i++) time[i].num = 0; count0001 = 0; release = FALSE; set_timer1(0x0000); lcd_cmd(0xc0); printf(lcd_data, "reset!!!"); delay_ms(1000); lcd_cmd(0xc0); printf(lcd_data, "00:00;00 "); } } if(input(st)){ //release check delay_ms(30); if(input(st)) release = TRUE; } if(disp_flag == 1) disp(); 99

100 16 LED UART library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following lines to use the declarations that are -- provided for instantiating Xilinx primitive components. --library UNISIM; --use UNISIM.VComponents.all; entity UART is Port ( RxD : in std_logic; -- Read 10 bit data RESET : in std_logic; F10M : in std_logic; -- Main Clock Digit_sel : out std_logic_vector(5 downto 0); -- Display unit select Number : out std_logic_vector(3 downto 0) -- Transmit data ); end UART; architecture RTL of UART is signal RxD0 : std_logic; signal RxShiftReg : std_logic_vector(8 downto 0); signal Detect_counter : std_logic_vector(3 downto 0); signal Num_of_catch : std_logic_vector(3 downto 0); signal Data_ready : std_logic; signal Fst_start_bit : std_logic; signal Detect_start : std_logic; signal Go_to_next : std_logic; signal Framing_err : std_logic; signal Read_Digit : std_logic; signal Read_Number : std_logic; signal pre_read_number : std_logic; signal pre_read_digit : std_logic; signal keep_data : std_logic_vector(3 downto 0); signal one_check : std_logic_vector(3 downto 0); signal idigit_sel : std_logic_vector(5 downto 0); signal inumber : std_logic_vector(3 downto 0); begin process (F10M, RESET) begin if(reset = 0 ) then RxD0 <= 0 ; RxShiftReg <= (others => 0 ); Detect_counter <= (others => 0 ); Num_of_catch <= (others => 0 ); Data_ready <= 0 ; Fst_start_bit <= 0 ; Detect_start <= 0 ; Go_to_next <= 0 ; 100

101 Framing_err <= 0 ; Read_Number <= 0 ; Read_Digit <= 0 ; pre_read_number <= 0 ; pre_read_digit <= 0 ; idigit_sel <= (others => 1 ); inumber <= (others => 0 ); keep_data <= (others => 0 ); one_check <= (others => 0 ); elsif(f10m event and F10M = 1 ) then -- LV1 RxD0 <= RxD; --** Detect first start bit ************************************ if(rxd0 = 1 and RxD = 0 and Detect_start = 0 and Fst_start_bit = 0 ) then Fst_start_bit <= 1 ; Detect_counter <= "1100"; end if; --** Fix start bit ********************************************** if(fst_start_bit = 1 and Detect_start = 0 ) then if(detect_counter = "1111") then if(rxd0 = 0 ) then Detect_start <= 1 ; Detect_counter <= "0000"; else Fst_start_bit <= 0 ; Detect_counter <= "0000"; end if; end if; end if; --** 8 bit data and stop bit get ******************************** if(detect_start = 1 and Data_ready = 0 ) then if(detect_counter = "1111") then if(num_of_catch < "1001")then RxShiftReg(7 downto 0) <= RxShiftReg(8 downto 1); RxShiftReg(8) <= RxD0; Num_of_catch <= Num_of_catch + 1; Detect_counter <= "0000"; else Data_ready <= 1 ; keep_data <= (RxShiftReg(7) & RxShiftReg(5) & RxShiftReg(3) & RxShiftReg(1)); one_check <= (RxShiftReg(6) & RxShiftReg(4) & RxShiftReg(2) & RxShiftReg(0)); end if; end if; end if; --**************************************************** if(data_ready = 1 and Go_to_next = 0 and Framing_err = 0 ) then if(rxshiftreg(8) = 1 and one_check = "1111") then if(read_number = 1 ) then case keep_data is when "0001" => inumber <= "0000"; when "0010" => inumber <= "0001"; when "0011" => inumber <= "0010"; when "0100" => inumber <= "0011"; when "0101" => inumber <= "0100"; 101

102 when "0110" => inumber <= "0101"; when "0111" => inumber <= "0110"; when "1000" => inumber <= "0111"; when "1001" => inumber <= "1000"; when "1010" => inumber <= "1001"; when others => inumber <= "0000"; end case; Read_Number <= 0 ; pre_read_number <= 0 ; end if; if(read_digit = 1 ) then idigit_sel <= "111111"; case keep_data is when "0001" => idigit_sel <= "011111"; when "0010" => idigit_sel <= "101111"; when "0011" => idigit_sel <= "110111"; when "0100" => idigit_sel <= "111011"; when "0101" => idigit_sel <= "111101"; when "0110" => idigit_sel <= "111110"; when others => idigit_sel <= "111111"; end case; Read_Digit <= 0 ; pre_read_digit <= 0 ; end if; -- B if(keep_data = "1101" and pre_read_number = 1 ) then -- D Read_Number <= 1 ; Read_Digit <= 0 ; elsif(keep_data = "1011" and pre_read_digit = 1 ) then Read_Number <= 0 ; Read_Digit <= 1 ; elsif(keep_data = "1010") then -- A pre_read_number <= 1 ; pre_read_digit <= 0 ; idigit_sel <= "111111"; elsif(keep_data = "1100") then -- C pre_read_number <= 0 ; pre_read_digit <= 1 ; else Read_Number <= 0 ; Read_Digit <= 0 ; pre_read_number <= 0 ; pre_read_digit <= 0 ; end if; Go_to_next <= 1 ; else Framing_err <= 1 ; end if; end if; if(go_to_next = 1 or Framing_err = 1 ) then 102

103 Detect_start <= 0 ; Data_ready <= 0 ; Go_to_next <= 0 ; Framing_err <= 0 ; fst_start_bit <= 0 ; Detect_counter <= (others => 0 ); RxShiftReg <= (others => 0 ); Num_of_catch <= (others => 0 ); keep_data <= (others => 0 ); one_check <= (others => 0 ); end if; --*********************************************************************** Detect_counter <= Detect_counter + 1; end if; end process; Digit_sel <= idigit_sel; Number <= inumber; end RTL; 103

104 17 LED LED library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following lines to use the declarations that are -- provided for instantiating Xilinx primitive components. --library UNISIM; --use UNISIM.VComponents.all; entity display is Port ( Data_in : in std_logic_vector(3 downto 0); Active : in std_logic; Reset : in std_logic; CLK : in std_logic; Data_out : out std_logic_vector(15 downto 0); Line_out : out std_logic_vector(15 downto 0) ); end display; architecture RTL of display is component rom16x14 port( i : in std_logic_vector(7 downto 0); o : out std_logic_vector(15 downto 0) ); end component; signal Keep_data : std_logic_vector(3 downto 0); signal Disp_data : std_logic_vector(7 downto 0); signal Digit : std_logic_vector(3 downto 0); signal Active0 : std_logic; signal Get_flag : std_logic; begin process (Reset, CLK) begin if(reset = 0 ) then Keep_data <= "1010"; 104

105 Digit <= (others => 0 ); Get_flag <= 0 ; elsif(clk event and CLK = 1 ) then if(active0 = 1 and Active = 1 ) then Get_flag <= 1 ; end if; if(active0 = 1 and Active = 0 ) then if(get_flag = 1 ) then Keep_data <= Data_in; Get_flag <= 0 ; end if; end if; Disp_data <= Keep_data & Digit; case Digit is when "0000" => Line_out <= " "; when "0001" => Line_out <= " "; when "0010" => Line_out <= " "; when "0011" => Line_out <= " "; when "0100" => Line_out <= " "; when "0101" => Line_out <= " "; when "0110" => Line_out <= " "; when "0111" => Line_out <= " "; when "1000" => Line_out <= " "; when "1001" => Line_out <= " "; when "1010" => Line_out <= " "; when "1011" => Line_out <= " "; when "1100" => Line_out <= " "; when "1101" => Line_out <= " "; when "1110" => Line_out <= " "; when "1111" => Line_out <= " "; when others => Line_out <= " "; end case; Digit <= Digit + 1; Active0 <= Active; end if; end process; rom : rom16x14 port map( 105

106 i => Disp_data, o => Data_out); end RTL; 106

107 18 LED ( ) library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following lines to use the declarations that are -- provided for instantiating Xilinx primitive components. --library UNISIM; --use UNISIM.VComponents.all; entity rom16x14 is port( i : in std_logic_vector(7 downto 0); o : out std_logic_vector(15 downto 0)); end rom16x14; architecture RTL of rom16x14 is signal num_1_line_1 : std_logic_vector(15 downto 0); signal num_1_line_2 : std_logic_vector(15 downto 0); signal num_1_line_3 : std_logic_vector(15 downto 0); signal num_1_line_4 : std_logic_vector(15 downto 0); signal num_1_line_5 : std_logic_vector(15 downto 0); signal num_1_line_6 : std_logic_vector(15 downto 0); signal num_1_line_7 : std_logic_vector(15 downto 0); signal num_1_line_8 : std_logic_vector(15 downto 0); signal num_1_line_9 : std_logic_vector(15 downto 0); signal num_1_line_0 : std_logic_vector(15 downto 0); signal num_1_line_a : std_logic_vector(15 downto 0); signal num_1_line_b : std_logic_vector(15 downto 0); signal num_1_line_c : std_logic_vector(15 downto 0); signal num_1_line_d : std_logic_vector(15 downto 0); signal num_1_line_e : std_logic_vector(15 downto 0); signal num_1_line_f : std_logic_vector(15 downto 0);

108 begin num_1_line_1 <= " "; num_1_line_2 <= " "; num_1_line_3 <= " "; num_1_line_4 <= " "; num_1_line_5 <= " "; num_1_line_6 <= " "; num_1_line_7 <= " "; num_1_line_8 <= " "; num_1_line_9 <= " "; num_1_line_0 <= " "; num_1_line_a <= " "; num_1_line_b <= " "; num_1_line_c <= " "; num_1_line_d <= " "; num_1_line_e <= " "; num_1_line_f <= " "; ******************************************************** with i select o <= num_1_line_f when " ", num_1_line_e when " ", num_1_line_d when " ", num_1_line_c when " ", num_1_line_b when " ", num_1_line_a when " ", num_1_line_0 when " ", num_1_line_9 when " ", num_1_line_8 when " ", num_1_line_7 when " ", num_1_line_6 when " ", num_1_line_5 when " ", num_1_line_4 when " ", num_1_line_3 when " ", num_1_line_2 when " ", 108

109 num_1_line_1 when " ", end RTL; " " when others; 109